X-Git-Url: https://git.kernelconcepts.de/?a=blobdiff_plain;f=include%2Ffpga.h;h=15e603a169d9f643173d84baf914e7690f56b5f0;hb=4b774ff114201175ea9c05dfa12eef3ff1704753;hp=e0b1fe71a83a24340b6f913825ed63c42a2b27ca;hpb=e6a857da746d5d7d450e59c0f86664c6b279b1c2;p=karo-tx-uboot.git diff --git a/include/fpga.h b/include/fpga.h index e0b1fe71a8..15e603a169 100644 --- a/include/fpga.h +++ b/include/fpga.h @@ -2,24 +2,7 @@ * (C) Copyright 2002 * Rich Ireland, Enterasys Networks, rireland@enterasys.com. * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * + * SPDX-License-Identifier: GPL-2.0+ */ #include /* for ulong typedef */ @@ -31,24 +14,6 @@ #define CONFIG_MAX_FPGA_DEVICES 5 #endif -/* these probably belong somewhere else */ -#ifndef FALSE -#define FALSE (0) -#endif -#ifndef TRUE -#define TRUE (!FALSE) -#endif - -/* CONFIG_FPGA bit assignments */ -#define CONFIG_SYS_FPGA_MAN(x) (x) -#define CONFIG_SYS_FPGA_DEV(x) ((x) << 8 ) -#define CONFIG_SYS_FPGA_IF(x) ((x) << 16 ) - -/* FPGA Manufacturer bits in CONFIG_FPGA */ -#define CONFIG_SYS_FPGA_XILINX CONFIG_SYS_FPGA_MAN( 0x1 ) -#define CONFIG_SYS_FPGA_ALTERA CONFIG_SYS_FPGA_MAN( 0x2 ) - - /* fpga_xxxx function return value definitions */ #define FPGA_SUCCESS 0 #define FPGA_FAIL -1 @@ -76,7 +41,10 @@ extern void fpga_init(void); extern int fpga_add(fpga_type devtype, void *desc); extern int fpga_count(void); extern int fpga_load(int devnum, const void *buf, size_t bsize); +extern int fpga_loadbitstream(int devnum, char *fpgadata, size_t size); extern int fpga_dump(int devnum, const void *buf, size_t bsize); extern int fpga_info(int devnum); +extern const fpga_desc *const fpga_validate(int devnum, const void *buf, + size_t bsize, char *fn); #endif /* _FPGA_H_ */