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(parent: 41fb7e0) | patch
u-boot: Disables MPC8548CDS 2T_TIMING for DDR by default
authorebony.zhu@freescale.com <ebony.zhu@freescale.com>
Mon, 18 Dec 2006 08:25:15 +0000 (16:25 +0800)
committerAndrew Fleming-AFLEMING <afleming@freescale.com>
Tue, 24 Apr 2007 00:58:27 +0000 (19:58 -0500)
commit39b18c4f3e0b6d0dc00f4e68bad2da3766c85f09
treedf783cf7d54f509c2202875f506c937509822947tree | snapshot
parent41fb7e0f1ec9b91bdae2565bab5f2e3ee15039c7commit | diff
u-boot: Disables MPC8548CDS 2T_TIMING for DDR by default

This patch disables MPC8548CDS 2T_TIMING for DDR by default.

Signed-off-by:Ebony Zhu <ebony.zhu@freescale.com>
include/configs/MPC8548CDS.h diff | blob | history
UBoot for KaRo TX COM modules