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(parent: f2d264b) | patch
powerpc/mpc8xxx: fix DDR data width checking
authorYork Sun <yorksun@freescale.com>
Mon, 27 Jun 2011 20:35:25 +0000 (13:35 -0700)
committerKumar Gala <galak@kernel.crashing.org>
Mon, 11 Jul 2011 18:24:20 +0000 (13:24 -0500)
commit4c99cb9190358e11ad96ba95b38d1e83cc053b46
treecccb23d6a1c90aaa2dc6aa8a654fae14345b8779tree | snapshot
parentf2d264b6603239d6d214c4e2faf17dde64cf81e2commit | diff
powerpc/mpc8xxx: fix DDR data width checking

Checking width before setting DDR controller. SPD for DDR1 and DDR2 has
data width and primary sdram width. The latter one has different meaning
for DDR3.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/cpu/mpc8xxx/ddr/options.c diff | blob | history
UBoot for KaRo TX COM modules