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(parent: e284022) | patch
drm/amdgpu: fix handling order in scheduler CS
authorChristian König <christian.koenig@amd.com>
Fri, 13 Nov 2015 12:04:50 +0000 (13:04 +0100)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 16 Nov 2015 16:05:59 +0000 (11:05 -0500)
commit5d82730af746abca2aa74e00de6370d338df7e95
tree14a6e0a63c5a24f3940843a5f66aacda8838343dtree | snapshot
parente284022163716ecf11c37fd1057c35d689ef2c11commit | diff
drm/amdgpu: fix handling order in scheduler CS

We need to clear parser.ibs and num_ibs before amd_sched_fence_create,
otherwise the IB could be freed twice if fence creates fails.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c diff | blob | history
Linux kernel for KaRo TX COM modules