ENGR00275246-04: net: fec: fix phy reset operation
Current driver only do phy reset in probe function, which is
not right. Since some phy clock is disabled after module probe,
the phy enter abnormal status, which needs do reset to recovery
the phy. And do ifconfig ethx up/down test, the phy also enter
abnormal status.
The log as:
libphy:
2188000.ethernet:04 - Link is Up - 10/Full
libphy:
2188000.ethernet:04 - Link is Up - 100/Full
libphy:
2188000.ethernet:04 - Link is Down
libphy:
2188000.ethernet:04 - Link is Up - 10/Half
libphy:
2188000.ethernet:04 - Link is Up - 10/Full
libphy:
2188000.ethernet:04 - Link is Up - 100/Full
...
So, do phy reset if ethx up/down or do clock enable/disable
operation.
Signed-off-by: Fugang Duan <B38611@freescale.com>