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(parent: 7e4db27) | patch
powerpc/mpc8xxx DDR: Fall back to raw timing for first controller only
authorYork Sun <yorksun@freescale.com>
Fri, 17 Aug 2012 08:22:42 +0000 (08:22 +0000)
committerAndy Fleming <afleming@freescale.com>
Thu, 23 Aug 2012 17:16:56 +0000 (12:16 -0500)
commit62f739fe465c41a2c5be0a46b3330c12b213dc07
tree84d1764a5c706e3618b10b999781eab6e3b02142tree | snapshot
parent7e4db27ffd11f3eea7e4dfc33354fd087f9257d8commit | diff
powerpc/mpc8xxx DDR: Fall back to raw timing for first controller only

Only the first DIMM of first controller should fall back to raw timing
parameters if SPD is missing or corrupted.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
arch/powerpc/cpu/mpc8xxx/ddr/main.c diff | blob | history
UBoot for KaRo TX COM modules