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cxgb4: Add PTP Hardware Clock (PHC) support
authorAtul Gupta <atul.gupta@chelsio.com>
Tue, 4 Jul 2017 11:16:21 +0000 (16:46 +0530)
committerDavid S. Miller <davem@davemloft.net>
Wed, 5 Jul 2017 08:21:54 +0000 (09:21 +0100)
commit9c33e4208bce512e1708781711b2846f463d2eb4
treed9dd10077bbefbb6b8408b3913fb222c21913a6dtree | snapshot
parenta456950445a075f5c28a331474dc71e4133ccd3bcommit | diff
cxgb4: Add PTP Hardware Clock (PHC) support

Add PTP IEEE-1588 support and make it accessible via PHC subsystem.
The functionality is enabled for T5/T6 adapters. Driver interfaces with
Firmware to program and adjust the clock offset.

Cc: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: Atul Gupta <atul.gupta@chelsio.com>
Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c diff | blob | history
drivers/net/ethernet/chelsio/cxgb4/cxgb4_ptp.c diff | blob | history
Linux kernel for KaRo TX COM modules