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(parent: 92ef67c) | patch
clk: sunxi: Add Allwinner A20/A31 GMAC clock unit
authorChen-Yu Tsai <wens@csie.org>
Mon, 10 Feb 2014 10:35:47 +0000 (18:35 +0800)
committerEmilio López <emilio@elopez.com.ar>
Tue, 18 Feb 2014 13:34:28 +0000 (10:34 -0300)
commite4c6d6c11bee5ff11feb837a0a76103b3eba252f
treede46fbc31e9fa56f85dcf2182a44d383fc7176datree | snapshot
parent92ef67c53ad92487c3c8de75e7940384c2edd793commit | diff
clk: sunxi: Add Allwinner A20/A31 GMAC clock unit

The Allwinner A20/A31 clock module controls the transmit clock source
and interface type of the GMAC ethernet controller. Model this as
a single clock for GMAC drivers to use.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Documentation/devicetree/bindings/clock/sunxi.txt diff | blob | history
drivers/clk/sunxi/clk-sunxi.c diff | blob | history
Linux kernel for KaRo TX COM modules