Update TX28 support and add support for TX28S AKA TX28-4130

Note: This code does not fully work on TX28 because mx28_power_init()
      does not properly support powering the chip from a fixed supply
      on the battery input rather than from the 5V supply.

diff --git a/board/karo/tx28/Makefile b/board/karo/tx28/Makefile
index c847293f462bb52a3f96e75c798bae8065ff5c04..e7931405f3ac1d3d6daccebc8998befd10629f5b 100644 (file)
--- a/board/karo/tx28/Makefile
+++ b/board/karo/tx28/Makefile
@@ -26,10 +26,13 @@ include $(TOPDIR)/config.mk
 LIB    = $(obj)lib$(BOARD).o
 
 COBJS  := tx28.o
 LIB    = $(obj)lib$(BOARD).o
 
 COBJS  := tx28.o

+ifeq ($(CONFIG_SPL_BUILD),y)
+       COBJS += spl_boot.o
+else

 ifeq ($(CONFIG_CMD_ROMUPDATE),y)
        COBJS += flash.o
 endif
 ifeq ($(CONFIG_CMD_ROMUPDATE),y)
        COBJS += flash.o
 endif

-SOBJS  := lowlevel_init.o
+endif

 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS))
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS))


@@ -38,6 +41,9 @@ SOBJS := $(addprefix $(obj),$(SOBJS))
 $(LIB):        $(obj).depend $(OBJS) $(SOBJS)
        $(call cmd_link_o_target, $(OBJS) $(SOBJS))
 
 $(LIB):        $(obj).depend $(OBJS) $(SOBJS)
        $(call cmd_link_o_target, $(OBJS) $(SOBJS))
 

+$(obj)u-boot.db: u-boot.db.in
+       sed "s:@@BUILD_DIR@@:${BUILD_DIR:-.}/:" $< > $@
+

 #########################################################################
 
 include $(SRCTREE)/rules.mk
 #########################################################################
 
 include $(SRCTREE)/rules.mk

diff --git a/board/karo/tx28/config.mk b/board/karo/tx28/config.mk
index b2ee5f608bc11f9c64f276836db8328d8370521d..17aa892e09e77dc2d18c2be72b64eda3c7d3912d 100644 (file)
--- a/board/karo/tx28/config.mk
+++ b/board/karo/tx28/config.mk
@@ -1,3 +1,5 @@
-LDSCRIPT := $(SRCTREE)/board/$(VENDOR)/$(BOARD)/u-boot.lds
+# stack is allocated below CONFIG_SYS_TEXT_BASE
+CONFIG_SYS_TEXT_BASE := 0x40001000
+CONFIG_SPL_TEXT_BASE := 0x00000000

 
 

-CONFIG_SYS_TEXT_BASE = 0x47f80000
+PLATFORM_CPPFLAGS += -Werror

diff --git a/board/karo/tx28/flash.c b/board/karo/tx28/flash.c
index 22cd48db3b8a2873d9f13eac9afa269bfbcc733d..55a4e076bf5a72f85d7562ee004cb7b1dfa36d7e 100644 (file)
--- a/board/karo/tx28/flash.c
+++ b/board/karo/tx28/flash.c
@@ -149,11 +149,13 @@ static int calc_bb_offset(nand_info_t *mtd, struct mx28_fcb *fcb)
        return bb_mark_offset;
 }
 
        return bb_mark_offset;
 }
 

-static struct mx28_fcb *create_fcb(void *buf, int fw1_start_block, int fw2_start_block,
-                               size_t fw_size)
+static struct mx28_fcb *create_fcb(void *buf, int fw1_start_block,
+                               int fw2_start_block, size_t fw_size)

 {
 {

-       volatile struct mx28_gpmi_regs *gpmi_base = __ioremap(MXS_GPMI_BASE, SZ_4K, 1);
-       volatile struct mx28_bch_regs *bch_base = __ioremap(MXS_BCH_BASE, SZ_4K, 1);
+       struct mx28_gpmi_regs *gpmi_base =
+               (struct mx28_gpmi_regs *)MXS_GPMI_BASE;
+       struct mx28_bch_regs *bch_base =
+               (struct mx28_bch_regs *)MXS_BCH_BASE;

        u32 fl0, fl1;
        u32 t0, t1;
        int metadata_size;
        u32 fl0, fl1;
        u32 t0, t1;
        int metadata_size;


@@ -165,10 +167,10 @@ static struct mx28_fcb *create_fcb(void *buf, int fw1_start_block, int fw2_start
                return ERR_PTR(-ENOMEM);
        }
 
                return ERR_PTR(-ENOMEM);
        }
 

-       fl0 = readl(bch_base->hw_bch_flash0layout0);
-       fl1 = readl(bch_base->hw_bch_flash0layout1);
-       t0 = readl(gpmi_base->hw_gpmi_timing0);
-       t1 = readl(gpmi_base->hw_gpmi_timing1);
+       fl0 = readl(&bch_base->hw_bch_flash0layout0);
+       fl1 = readl(&bch_base->hw_bch_flash0layout1);
+       t0 = readl(&gpmi_base->hw_gpmi_timing0);
+       t1 = readl(&gpmi_base->hw_gpmi_timing1);

 
        metadata_size = BF_VAL(fl0, BCH_FLASHLAYOUT0_META_SIZE);
 
 
        metadata_size = BF_VAL(fl0, BCH_FLASHLAYOUT0_META_SIZE);
 


@@ -197,7 +199,7 @@ static struct mx28_fcb *create_fcb(void *buf, int fw1_start_block, int fw2_start
 
        fcb->metadata_size = BF_VAL(fl0, BCH_FLASHLAYOUT0_META_SIZE);
        fcb->ecc_blocks_per_page = BF_VAL(fl0, BCH_FLASHLAYOUT0_NBLOCKS);
 
        fcb->metadata_size = BF_VAL(fl0, BCH_FLASHLAYOUT0_META_SIZE);
        fcb->ecc_blocks_per_page = BF_VAL(fl0, BCH_FLASHLAYOUT0_NBLOCKS);

-       fcb->bch_mode = readl(bch_base->hw_bch_mode);
+       fcb->bch_mode = readl(&bch_base->hw_bch_mode);

 /*
        fcb->boot_patch = 0;
        fcb->patch_sectors = 0;
 /*
        fcb->boot_patch = 0;
        fcb->patch_sectors = 0;


@@ -293,7 +295,13 @@ static int write_fcb(void *buf, int block)
        }                                                       \
 } while (0)
 
        }                                                       \
 } while (0)
 

-int do_update(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+#ifndef CONFIG_ENV_OFFSET_REDUND
+#define TOTAL_ENV_SIZE CONFIG_ENV_SIZE
+#else
+#define TOTAL_ENV_SIZE (CONFIG_ENV_SIZE * 2)
+#endif
+
+int do_update(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])

 {
        int ret;
        int block;
 {
        int ret;
        int block;


@@ -311,7 +319,7 @@ int do_update(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
        unsigned long mtd_num_blocks = mtd->size / mtd->erasesize;
        unsigned long env_start_block = CONFIG_ENV_OFFSET / mtd->erasesize;
        unsigned long env_end_block = env_start_block +
        unsigned long mtd_num_blocks = mtd->size / mtd->erasesize;
        unsigned long env_start_block = CONFIG_ENV_OFFSET / mtd->erasesize;
        unsigned long env_end_block = env_start_block +

-               DIV_ROUND_UP(CONFIG_ENV_SIZE, mtd->erasesize) - 1;
+               DIV_ROUND_UP(TOTAL_ENV_SIZE, mtd->erasesize) - 1;

        int optind;
        int fw1_set = 0;
        int fw2_set = 0;
        int optind;
        int fw1_set = 0;
        int fw2_set = 0;

diff --git a/board/karo/tx28/lowlevel_init.S b/board/karo/tx28/lowlevel_init.S
deleted file mode 100644 (file)
index d191640..0000000
--- a/board/karo/tx28/lowlevel_init.S
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * Board specific setup info
- *
- * Copyright (C) 2010 Freescale Semiconductor, Inc.
- *
- * (C) Copyright 2003, ARM Ltd.
- * Philippe Robin, <philippe.robin@arm.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-
-/* Set up the platform, once the cpu has been initialized */
-       .globl lowlevel_init
-lowlevel_init:
-
-       /* All SDRAM settings are done by sdram_prep */
-       mov pc, lr

diff --git a/board/karo/tx28/spl_boot.c b/board/karo/tx28/spl_boot.c
new file mode 100644 (file)
index 0000000..94edc2b
--- /dev/null
+++ b/board/karo/tx28/spl_boot.c
@@ -0,0 +1,322 @@
+/*
+ * Copyright (C) 2011 Lothar Waßmann <LW@KARO-electronics.de>
+ * based on: board/freesclae/mx28_evk.c (C) 2010 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <config.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+#include <asm/arch/iomux-mx28.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/sys_proto.h>
+
+#define        MUX_CONFIG_LED  (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL)
+#define        MUX_CONFIG_LCD  (MXS_PAD_3V3 | MXS_PAD_4MA)
+#define        MUX_CONFIG_TSC  (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
+#define        MUX_CONFIG_SSP0 (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_PULLUP)
+#define        MUX_CONFIG_SSP2 (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP)
+#define        MUX_CONFIG_GPMI (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL)
+#define        MUX_CONFIG_ENET (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP)
+#define        MUX_CONFIG_EMI  (MXS_PAD_1V8 | MXS_PAD_12MA | MXS_PAD_NOPULL)
+#define MUX_CONFIG_GPIO (MXS_PAD_3V3 | MXS_PAD_PULLUP)
+
+static iomux_cfg_t tx28_stk5_pads[] = {
+       /* LED */
+       MX28_PAD_ENET0_RXD3__GPIO_4_10 | MUX_CONFIG_LED,
+
+       /* framebuffer */
+       MX28_PAD_LCD_D00__LCD_D0 | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_D01__LCD_D1 | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_D02__LCD_D2 | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_D03__LCD_D3 | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_D04__LCD_D4 | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_D05__LCD_D5 | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_D06__LCD_D6 | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_D07__LCD_D7 | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_D08__LCD_D8 | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_D09__LCD_D9 | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_D10__LCD_D10 | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_D11__LCD_D11 | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_D12__LCD_D12 | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_D13__LCD_D13 | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_D14__LCD_D14 | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_D15__LCD_D15 | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_D16__LCD_D16 | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_D17__LCD_D17 | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_D18__LCD_D18 | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_D19__LCD_D19 | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_D20__LCD_D20 | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_D21__LCD_D21 | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_D22__LCD_D22 | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_D23__LCD_D23 | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_RD_E__LCD_VSYNC | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_RS__LCD_DOTCLK | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_CS__LCD_CS | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_VSYNC__LCD_VSYNC | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_HSYNC__LCD_HSYNC | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_DOTCLK__LCD_DOTCLK | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_ENABLE__GPIO_1_31 | MUX_CONFIG_LCD,
+       MX28_PAD_LCD_RESET__GPIO_3_30 | MUX_CONFIG_LCD,
+
+       /* DUART pads */
+       MX28_PAD_PWM0__GPIO_3_16,
+       MX28_PAD_PWM1__GPIO_3_17,
+       MX28_PAD_I2C0_SCL__GPIO_3_24,
+       MX28_PAD_I2C0_SDA__GPIO_3_25,
+
+       MX28_PAD_AUART0_RTS__DUART_TX,
+       MX28_PAD_AUART0_CTS__DUART_RX,
+       MX28_PAD_AUART0_TX__DUART_RTS,
+       MX28_PAD_AUART0_RX__DUART_CTS,
+
+       /* EMI */
+       MX28_PAD_EMI_D00__EMI_DATA0 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_D01__EMI_DATA1 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_D02__EMI_DATA2 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_D03__EMI_DATA3 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_D04__EMI_DATA4 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_D05__EMI_DATA5 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_D06__EMI_DATA6 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_D07__EMI_DATA7 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_D08__EMI_DATA8 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_D09__EMI_DATA9 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_D10__EMI_DATA10 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_D11__EMI_DATA11 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_D12__EMI_DATA12 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_D13__EMI_DATA13 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_D14__EMI_DATA14 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_D15__EMI_DATA15 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_ODT0__EMI_ODT0 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_ODT1__EMI_ODT1 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN | MUX_CONFIG_EMI,
+
+       MX28_PAD_EMI_A00__EMI_ADDR0 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_A01__EMI_ADDR1 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_A02__EMI_ADDR2 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_A03__EMI_ADDR3 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_A04__EMI_ADDR4 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_A05__EMI_ADDR5 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_A06__EMI_ADDR6 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_A07__EMI_ADDR7 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_A08__EMI_ADDR8 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_A09__EMI_ADDR9 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_A10__EMI_ADDR10 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_A11__EMI_ADDR11 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_A12__EMI_ADDR12 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_A13__EMI_ADDR13 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_A14__EMI_ADDR14 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_BA2__EMI_BA2 | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI,
+       MX28_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
+
+       /* FEC pads */
+       MX28_PAD_PWM4__GPIO_3_29 | MUX_CONFIG_ENET,
+       MX28_PAD_ENET0_RX_CLK__GPIO_4_13 | MUX_CONFIG_ENET,
+       MX28_PAD_ENET0_MDC__ENET0_MDC | MUX_CONFIG_ENET,
+       MX28_PAD_ENET0_MDIO__ENET0_MDIO | MUX_CONFIG_ENET,
+       MX28_PAD_ENET0_RX_EN__GPIO_4_2 | MUX_CONFIG_ENET,       /* COL/CRS_DV/MODE2 */
+       MX28_PAD_ENET0_RXD0__GPIO_4_3 | MUX_CONFIG_ENET,        /* RXD0/MODE0 */
+       MX28_PAD_ENET0_RXD1__GPIO_4_4 | MUX_CONFIG_ENET,        /* RXD1/MODE1 */
+       MX28_PAD_ENET0_TX_CLK__GPIO_4_5 | MUX_CONFIG_ENET,      /* nINT/TX_ER/TXD4 */
+       MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MUX_CONFIG_ENET,
+       MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MUX_CONFIG_ENET,
+       MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MUX_CONFIG_ENET,
+       MX28_PAD_ENET_CLK__CLKCTRL_ENET | MUX_CONFIG_ENET,
+
+       /* MMC pads */
+       MX28_PAD_SSP0_DATA0__SSP0_D0 | MUX_CONFIG_SSP0,
+       MX28_PAD_SSP0_DATA1__SSP0_D1 | MUX_CONFIG_SSP0,
+       MX28_PAD_SSP0_DATA2__SSP0_D2 | MUX_CONFIG_SSP0,
+       MX28_PAD_SSP0_DATA3__SSP0_D3 | MUX_CONFIG_SSP0,
+       MX28_PAD_SSP0_CMD__SSP0_CMD | MUX_CONFIG_SSP0,
+       MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT | MUX_CONFIG_SSP0,
+       MX28_PAD_SSP0_SCK__SSP0_SCK | MUX_CONFIG_SSP0,
+
+       /* GPMI pads */
+       MX28_PAD_GPMI_D00__GPMI_D0 | MUX_CONFIG_GPMI,
+       MX28_PAD_GPMI_D01__GPMI_D1 | MUX_CONFIG_GPMI,
+       MX28_PAD_GPMI_D02__GPMI_D2 | MUX_CONFIG_GPMI,
+       MX28_PAD_GPMI_D03__GPMI_D3 | MUX_CONFIG_GPMI,
+       MX28_PAD_GPMI_D04__GPMI_D4 | MUX_CONFIG_GPMI,
+       MX28_PAD_GPMI_D05__GPMI_D5 | MUX_CONFIG_GPMI,
+       MX28_PAD_GPMI_D06__GPMI_D6 | MUX_CONFIG_GPMI,
+       MX28_PAD_GPMI_D07__GPMI_D7 | MUX_CONFIG_GPMI,
+       MX28_PAD_GPMI_CE0N__GPMI_CE0N | MUX_CONFIG_GPMI,
+       MX28_PAD_GPMI_RDY0__GPMI_READY0 | MUX_CONFIG_GPMI,
+       MX28_PAD_GPMI_RDN__GPMI_RDN | MUX_CONFIG_GPMI,
+       MX28_PAD_GPMI_WRN__GPMI_WRN | MUX_CONFIG_GPMI,
+       MX28_PAD_GPMI_ALE__GPMI_ALE | MUX_CONFIG_GPMI,
+       MX28_PAD_GPMI_CLE__GPMI_CLE | MUX_CONFIG_GPMI,
+       MX28_PAD_GPMI_RESETN__GPMI_RESETN | MUX_CONFIG_GPMI,
+
+       /* unused pads */
+       MX28_PAD_GPMI_RDY1__GPIO_0_21 | MUX_CONFIG_GPIO,
+       MX28_PAD_GPMI_RDY2__GPIO_0_22 | MUX_CONFIG_GPIO,
+       MX28_PAD_GPMI_RDY3__GPIO_0_23 | MUX_CONFIG_GPIO,
+       MX28_PAD_GPMI_CE1N__GPIO_0_17 | MUX_CONFIG_GPIO,
+       MX28_PAD_GPMI_CE2N__GPIO_0_18 | MUX_CONFIG_GPIO,
+       MX28_PAD_GPMI_CE3N__GPIO_0_19 | MUX_CONFIG_GPIO,
+
+       MX28_PAD_SSP0_DATA4__GPIO_2_4 | MUX_CONFIG_GPIO,
+       MX28_PAD_SSP0_DATA5__GPIO_2_5 | MUX_CONFIG_GPIO,
+       MX28_PAD_SSP0_DATA6__GPIO_2_6 | MUX_CONFIG_GPIO,
+       MX28_PAD_SSP0_DATA7__GPIO_2_7 | MUX_CONFIG_GPIO,
+};
+
+
+static void tx28_stk5_led_on(void)
+{
+       gpio_direction_output(MX28_PAD_ENET0_RXD3__GPIO_4_10, 1);
+}
+
+void board_init_ll(void)
+{
+       mx28_common_spl_init(tx28_stk5_pads, ARRAY_SIZE(tx28_stk5_pads));
+       tx28_stk5_led_on();
+}
+
+#ifndef CONFIG_TX28_S
+static uint32_t tx28_dram_vals[] = {
+       /* TX28-41x0: NT5TU32M16DG-AC */
+       /* 000 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 010 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 020 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 030 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 040 */ 0x00000000, 0x00000100, 0x00000000, 0x00000000,
+       /* 050 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 060 */ 0x00000000, 0x00000000, 0x00010101, 0x01010101,
+       /* 070 */ 0x000f0f01, 0x0102020a, 0x00000000, 0x00010101,
+       /* 080 */ 0x00000100, 0x00000100, 0x00000000, 0x00000002,
+       /* 090 */ 0x01010000, 0x07080403, 0x06005003, 0x0a0000c8,
+       /* 0a0 */ 0x02009c40, 0x0002030c, 0x0036a609, 0x031a0612,
+       /* 0b0 */ 0x02030202, 0x00c8001c, 0x00000000, 0x00000000,
+       /* 0c0 */ 0x00012100, 0xffff0303, 0x00012100, 0xffff0303,
+       /* 0d0 */ 0x00012100, 0xffff0303, 0x00012100, 0xffff0303,
+       /* 0e0 */ 0x00000003, 0x00000000, 0x00000000, 0x00000000,
+       /* 0f0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 100 */ 0x00000000, 0x00000000, 0x00000612, 0x01000f02,
+       /* 110 */ 0x06120612, 0x00000200, 0x00020007, 0xf4004a27,
+       /* 120 */ 0xf4004a27, 0xf4004a27, 0xf4004a27, 0x07400300,
+       /* 130 */ 0x07400300, 0x07400300, 0x07400300, 0x00000005,
+       /* 140 */ 0x00000000, 0x00000000, 0x01000000, 0x01020408,
+       /* 150 */ 0x08040201, 0x000f1133, 0x00000000, 0x00001f04,
+       /* 160 */ 0x00001f04, 0x00001f04, 0x00001f04, 0x00001f04,
+       /* 170 */ 0x00001f04, 0x00001f04, 0x00001f04, 0x00000000,
+       /* 180 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 190 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 1a0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 1b0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 1c0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 1d0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 1e0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 1f0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 200 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 210 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 220 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 230 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 240 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 250 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 260 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 270 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 280 */ 0x00000000, 0x00000000, 0x00010000, 0x00030404,
+       /* 290 */ 0x00000003, 0x00000000, 0x00000000, 0x00000000,
+       /* 2a0 */ 0x00000000, 0x00000000, 0x00000000, 0x01010000,
+       /* 2b0 */ 0x01000000, 0x03030000, 0x00010303, 0x01020202,
+       /* 2c0 */ 0x00000000, 0x02040303, 0x21002103, 0x00061200,
+       /* 2d0 */ 0x06120612, 0x04420442, 0x04420442, 0x00040004,
+       /* 2e0 */ 0x00040004, 0x00000000, 0x00000000, 0x00000000,
+       /* 2f0 */ 0x00000000, 0x00000000,
+};
+#else
+static uint32_t tx28_dram_vals[] = {
+       /* TX28-40x0: MT47H64M16HR-3 */
+       /* 000 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 010 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 020 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 030 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 040 */ 0x00000000, 0x00000100, 0x00000000, 0x00000000,
+       /* 050 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 060 */ 0x00000000, 0x00000000, 0x00010101, 0x00010101,
+       /* 070 */ 0x000f0f01, 0x0102010a, 0x00000000, 0x00000101,
+       /* 080 */ 0x00000100, 0x00000100, 0x00000000, 0x00000002,
+       /* 090 */ 0x01010000, 0x07080403, 0x06005003, 0x0a0000c8,
+       /* 0a0 */ 0x02009c40, 0x0002030c, 0x0036a609, 0x031a0612,
+       /* 0b0 */ 0x02030202, 0x00c8001c, 0x00000000, 0x00000000,
+       /* 0c0 */ 0x00012100, 0xffff0303, 0x00012100, 0xffff0303,
+       /* 0d0 */ 0x00012100, 0xffff0303, 0x00012100, 0xffff0303,
+       /* 0e0 */ 0x00000003, 0x00000000, 0x00000000, 0x00000000,
+       /* 0f0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 100 */ 0x00000000, 0x00000000, 0x00000612, 0x01000f02,
+       /* 110 */ 0x06120612, 0x00000200, 0x00020007, 0xf4004a27,
+       /* 120 */ 0xf4004a27, 0xf4004a27, 0xf4004a27, 0x07400300,
+       /* 130 */ 0x07400300, 0x07400300, 0x07400300, 0x00000005,
+       /* 140 */ 0x00000000, 0x00000000, 0x01000000, 0x01020408,
+       /* 150 */ 0x08040201, 0x000f1133, 0x00000000, 0x00001f04,
+       /* 160 */ 0x00001f04, 0x00001f04, 0x00001f04, 0x00001f04,
+       /* 170 */ 0x00001f04, 0x00001f04, 0x00001f04, 0x00000000,
+       /* 180 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 190 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 1a0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 1b0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 1c0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 1d0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 1e0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 1f0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 200 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 210 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 220 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 230 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 240 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 250 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 260 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 270 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       /* 280 */ 0x00000000, 0x00000000, 0x00010000, 0x00030404,
+       /* 290 */ 0x00000003, 0x00000000, 0x00000000, 0x00000000,
+       /* 2a0 */ 0x00000000, 0x00000000, 0x00000000, 0x01010000,
+       /* 2b0 */ 0x01000000, 0x03030000, 0x00010303, 0x01020202,
+       /* 2c0 */ 0x00000000, 0x02040303, 0x21002103, 0x00061200,
+       /* 2d0 */ 0x06120612, 0x04420442, 0x04420442, 0x00040004,
+       /* 2e0 */ 0x00040004, 0x00000000, 0x00000000, 0x00000000,
+       /* 2f0 */ 0x00000000, 0x00000000,
+};
+#endif
+
+void mx28_ddr2_setup(void)
+{
+       int i;
+
+       for (i = 0; i < ARRAY_SIZE(tx28_dram_vals); i++)
+               writel(tx28_dram_vals[i], MXS_DRAM_BASE + (4 * i));
+}

diff --git a/board/karo/tx28/tx28.c b/board/karo/tx28/tx28.c
index e8bece82ee627bbd54aee1f39bd0b5d825aeaf8d..7cec4c04f16e95a7559bd10e96aa081947f58f83 100644 (file)
--- a/board/karo/tx28/tx28.c
+++ b/board/karo/tx28/tx28.c
@@ -26,6 +26,7 @@
 #include <asm/io.h>
 #include <asm/gpio.h>
 #include <asm/arch/iomux-mx28.h>
 #include <asm/io.h>
 #include <asm/gpio.h>
 #include <asm/arch/iomux-mx28.h>

+#include <asm/arch/clock.h>

 #include <asm/arch/imx-regs.h>
 #include <asm/arch/regs-pinctrl.h>
 #include <asm/arch/regs-clkctrl.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/regs-pinctrl.h>
 #include <asm/arch/regs-clkctrl.h>


@@ -33,173 +34,199 @@
 #include <asm/arch/sys_proto.h>
 
 #include <mmc.h>
 #include <asm/arch/sys_proto.h>
 
 #include <mmc.h>

+#include <netdev.h>

 #include <imx_ssp_mmc.h>
 
 #include <imx_ssp_mmc.h>
 

-/* This should be removed after it's added into mach-types.h */
-
-static const int mach_type = MACH_TYPE_TX28;
-

 DECLARE_GLOBAL_DATA_PTR;
 
 DECLARE_GLOBAL_DATA_PTR;
 

-#ifdef CONFIG_IMX_SSP_MMC
-/* MMC pins */
-static iomux_cfg_t mmc0_pads[] = {
-       MX28_PAD_SSP0_DATA0__SSP0_D0,
-       MX28_PAD_SSP0_DATA1__SSP0_D1,
-       MX28_PAD_SSP0_DATA2__SSP0_D2,
-       MX28_PAD_SSP0_DATA3__SSP0_D3,
-       MX28_PAD_SSP0_DATA4__SSP0_D4,
-       MX28_PAD_SSP0_DATA5__SSP0_D5,
-       MX28_PAD_SSP0_DATA6__SSP0_D6,
-       MX28_PAD_SSP0_DATA7__SSP0_D7,
-       MX28_PAD_SSP0_CMD__SSP0_CMD,
-       MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT,
-       MX28_PAD_SSP0_SCK__SSP0_SCK,
-};
-#endif
-
-/* ENET pins */
-static iomux_cfg_t enet_pads[] = {
-       MX28_PAD_PWM4__GPIO_3_29,
-       MX28_PAD_ENET0_RX_CLK__GPIO_4_13,
-       MX28_PAD_ENET0_MDC__ENET0_MDC,
-       MX28_PAD_ENET0_MDIO__ENET0_MDIO,
-       MX28_PAD_ENET0_RX_EN__ENET0_RX_EN,
-       MX28_PAD_ENET0_RXD0__ENET0_RXD0,
-       MX28_PAD_ENET0_RXD1__ENET0_RXD1,
-       MX28_PAD_ENET0_TX_EN__ENET0_TX_EN,
-       MX28_PAD_ENET0_TXD0__ENET0_TXD0,
-       MX28_PAD_ENET0_TXD1__ENET0_TXD1,
-       MX28_PAD_ENET_CLK__CLKCTRL_ENET,
-};
-
-static iomux_cfg_t duart_pads[] = {
-       MX28_PAD_PWM0__GPIO_3_16,
-       MX28_PAD_PWM1__GPIO_3_17,
-       MX28_PAD_I2C0_SCL__GPIO_3_24,
-       MX28_PAD_I2C0_SDA__GPIO_3_25,
-
-       MX28_PAD_AUART0_RTS__AUART0_RTS,
-       MX28_PAD_AUART0_CTS__AUART0_CTS,
-       MX28_PAD_AUART0_TX__AUART0_TX,
-       MX28_PAD_AUART0_RX__AUART0_RX,
-};
-
-static iomux_cfg_t gpmi_pads[] = {
-       MX28_PAD_GPMI_D00__GPMI_D0,
-       MX28_PAD_GPMI_D01__GPMI_D1,
-       MX28_PAD_GPMI_D02__GPMI_D2,
-       MX28_PAD_GPMI_D03__GPMI_D3,
-       MX28_PAD_GPMI_D04__GPMI_D4,
-       MX28_PAD_GPMI_D05__GPMI_D5,
-       MX28_PAD_GPMI_D06__GPMI_D6,
-       MX28_PAD_GPMI_D07__GPMI_D7,
-       MX28_PAD_GPMI_CE0N__GPMI_CE0N,
-       MX28_PAD_GPMI_RDY0__GPMI_READY0,
-       MX28_PAD_GPMI_RDN__GPMI_RDN,
-       MX28_PAD_GPMI_WRN__GPMI_WRN,
-       MX28_PAD_GPMI_ALE__GPMI_ALE,
-       MX28_PAD_GPMI_CLE__GPMI_CLE,
-       MX28_PAD_GPMI_RESETN__GPMI_RESETN,
-};
-

 /*
  * Functions
  */
 /*
  * Functions
  */

-static void duart_init(void)
+int board_early_init_f(void)

 {
 {

-       mx28_common_spl_init(&duart_pads, ARRAY_SIZE(duart_pads));
+       /* IO0 clock at 480MHz */
+       mx28_set_ioclk(MXC_IOCLK0, 480000);
+       /* IO1 clock at 480MHz */
+       mx28_set_ioclk(MXC_IOCLK1, 480000);
+
+       /* SSP0 clock at 96MHz */
+       mx28_set_sspclk(MXC_SSPCLK0, 96000, 0);
+       /* SSP2 clock at 96MHz */
+       mx28_set_sspclk(MXC_SSPCLK2, 96000, 0);
+
+       return 0;

 }
 
 }
 

-int board_init(void)
+void coloured_LED_init(void)

 {
 {

-       gd->bd->bi_arch_number = mach_type;
+       /* Switch LED off */
+       gpio_set_value(MX28_PAD_ENET0_RXD3__GPIO_4_10, 0);
+}

 
 

+int board_init(void)
+{

        /* Address of boot parameters */
        gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x1000;
        /* Address of boot parameters */
        gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x1000;

-
-       duart_init();

        return 0;
 }
 
 int dram_init(void)
 {
        return 0;
 }
 
 int dram_init(void)
 {

-       gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-       gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
-       return 0;
+       return mx28_dram_init();

 }
 
 }
 

-#ifdef CONFIG_DYNAMIC_MMC_DEVNO
-int get_mmc_env_devno(void)
+#ifdef CONFIG_CMD_MMC
+int board_mmc_init(bd_t *bis)

 {
 {

-       unsigned long global_boot_mode;
-
-       global_boot_mode = REG_RD_ADDR(GLOBAL_BOOT_MODE_ADDR);
-       return ((global_boot_mode & 0xf) == BOOT_MODE_SD1) ? 1 : 0;
+       return mxsmmc_initialize(bis, 0, NULL);

 }
 }

+#endif /* CONFIG_CMD_MMC */
+
+#ifdef CONFIG_FEC_MXC
+#ifdef CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
+
+#ifdef CONFIG_FEC_MXC_MULTI
+#define FEC_MAX_IDX                    1
+#else
+#define FEC_MAX_IDX                    0

 #endif
 
 #endif
 

-#if defined(CONFIG_MXC_FEC) && defined(CONFIG_GET_FEC_MAC_ADDR_FROM_IIM)
-int fec_get_mac_addr(unsigned char *mac)
+static int fec_get_mac_addr(int index)

 {
 {

-       u32 val;
+       u32 val1, val2;

        int timeout = 1000;
        struct mx28_ocotp_regs *ocotp_regs =
                (struct mx28_ocotp_regs *)MXS_OCOTP_BASE;
        int timeout = 1000;
        struct mx28_ocotp_regs *ocotp_regs =
                (struct mx28_ocotp_regs *)MXS_OCOTP_BASE;

+       u32 *cust = &ocotp_regs->hw_ocotp_cust0;
+       char mac[6 * 3];
+       char env_name[] = "eth.addr";
+
+       if (index < 0 || index > FEC_MAX_IDX)
+               return -EINVAL;

 
        /* set this bit to open the OTP banks for reading */
        writel(OCOTP_CTRL_RD_BANK_OPEN,
 
        /* set this bit to open the OTP banks for reading */
        writel(OCOTP_CTRL_RD_BANK_OPEN,

-               ocotp_regs->hw_ocotp_ctrl_set);
+               &ocotp_regs->hw_ocotp_ctrl_set);

 
        /* wait until OTP contents are readable */
 
        /* wait until OTP contents are readable */

-       while (OCOTP_CTRL_BUSY & readl(ocotp_regs->hw_ocotp_ctrl)) {
+       while (OCOTP_CTRL_BUSY & readl(&ocotp_regs->hw_ocotp_ctrl)) {

                if (timeout-- < 0)
                        return -ETIMEDOUT;
                udelay(100);
        }
 
                if (timeout-- < 0)
                        return -ETIMEDOUT;
                udelay(100);
        }
 

-       val = readl(ocotp_regs->hw_ocotp_cust0);
-       mac[0] = (val >> 24) & 0xFF;
-       mac[1] = (val >> 16) & 0xFF;
-       mac[2] = (val >> 8) & 0xFF;
-       mac[3] = (val >> 0) & 0xFF;
-       val = readl(ocotp_regs->hw_ocotp_cust1);
-       mac[4] = (val >> 24) & 0xFF;
-       mac[5] = (val >> 16) & 0xFF;
-
+       val1 = readl(&cust[index * 8]);
+       val2 = readl(&cust[index * 8 + 4]);
+       if ((val1 | val2) == 0)
+               return 0;
+       snprintf(mac, sizeof(mac), "%02x:%02x:%02x:%02x:%02x:%02x",
+               (val1 >> 24) & 0xFF, (val1 >> 16) & 0xFF,
+               (val1 >> 8) & 0xFF, (val1 >> 0) & 0xFF,
+               (val2 >> 24) & 0xFF, (val2 >> 16) & 0xFF);
+       if (index == 0)
+               snprintf(env_name, sizeof(env_name), "ethaddr");
+       else
+               snprintf(env_name, sizeof(env_name), "eth%daddr", index);
+
+       setenv(env_name, mac);

        return 0;
 }
        return 0;
 }

-#endif
+#endif /* CONFIG_GET_FEC_MAC_ADDR_FROM_IIM */
+
+static iomux_cfg_t tx28_fec_pads[] = {
+       MX28_PAD_ENET0_RX_EN__ENET0_RX_EN,
+       MX28_PAD_ENET0_RXD0__ENET0_RXD0,
+       MX28_PAD_ENET0_RXD1__ENET0_RXD1,
+};

 
 

-void enet_board_init(void)
+int board_eth_init(bd_t *bis)

 {
 {

-       /* Set up ENET pins */
-       mx28_common_spl_init(&enet_pads, ARRAY_SIZE(enet_pads));
+       int ret;
+
+       /* Reset the external phy */
+       gpio_direction_output(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 0);

 
        /* Power on the external phy */
        gpio_direction_output(MX28_PAD_PWM4__GPIO_3_29, 1);
 
 
        /* Power on the external phy */
        gpio_direction_output(MX28_PAD_PWM4__GPIO_3_29, 1);
 

-       /* Reset the external phy */
-       gpio_direction_output(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 1);
-       udelay(200);
-       gpio_set_value(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 0);
-}
+       /* Pull strap pins to high */
+       gpio_direction_output(MX28_PAD_ENET0_RX_EN__GPIO_4_2, 1);
+       gpio_direction_output(MX28_PAD_ENET0_RXD0__GPIO_4_3, 1);
+       gpio_direction_output(MX28_PAD_ENET0_RXD1__GPIO_4_4, 1);
+       gpio_direction_input(MX28_PAD_ENET0_TX_CLK__GPIO_4_5);

 
 

-#ifdef CONFIG_MXS_NAND
-#include <linux/mtd/nand.h>
-extern int mxs_gpmi_nand_init(struct mtd_info *mtd, struct nand_chip *chip);
+       udelay(25000);
+       gpio_set_value(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 1);
+       udelay(100);

 
 

-int board_nand_init(struct mtd_info *mtd, struct nand_chip *chip)
-{
-       mx28_common_spl_init(&gpmi_pads, ARRAY_SIZE(gpmi_pads));
-       return mxs_gpmi_nand_init(mtd, chip);
-}
-#endif
+       mxs_iomux_setup_multiple_pads(tx28_fec_pads, ARRAY_SIZE(tx28_fec_pads));

 
 

-int checkboard(void)
-{
-       printf("Board: Ka-Ro TX28\n");
+       ret = cpu_eth_init(bis);
+       if (ret) {
+               printf("cpu_eth_init() failed: %d\n", ret);
+               return ret;
+       }
+
+       ret = fec_get_mac_addr(0);
+       if (ret < 0) {
+               printf("Failed to read FEC0 MAC address from OCOTP\n");
+               return ret;
+       }
+#ifdef CONFIG_FEC_MXC_MULTI
+       if (getenv("ethaddr")) {
+               ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
+               if (ret) {
+                       printf("FEC MXS: Unable to init FEC0\n");
+                       return ret;
+               }
+       }

 
 

+       ret = fec_get_mac_addr(1);
+       if (ret < 0) {
+               printf("Failed to read FEC1 MAC address from OCOTP\n");
+               return ret;
+       }
+       if (getenv("eth1addr")) {
+               ret = fecmxc_initialize_multi(bis, 1, 1, MXS_ENET1_BASE);
+               if (ret) {
+                       printf("FEC MXS: Unable to init FEC1\n");
+                       return ret;
+               }
+       }

        return 0;
        return 0;

+#else
+       if (getenv("ethaddr")) {
+               ret = fecmxc_initialize(bis);
+       }
+       return ret;
+#endif
+}
+#endif /* CONFIG_FEC_MXC */
+
+enum {
+       LED_STATE_INIT = -1,
+       LED_STATE_OFF,
+       LED_STATE_ON,
+};
+
+void show_activity(int arg)
+{
+       static int led_state = LED_STATE_INIT;
+       static ulong last;
+
+       if (led_state == LED_STATE_INIT) {
+               last = get_timer(0);
+               gpio_set_value(MX28_PAD_ENET0_RXD3__GPIO_4_10, 1);
+               led_state = LED_STATE_ON;
+       } else {
+               if (get_timer(last) > CONFIG_SYS_HZ) {
+                       last = get_timer(0);
+                       if (led_state == LED_STATE_ON) {
+                               gpio_set_value(MX28_PAD_ENET0_RXD3__GPIO_4_10, 0);
+                       } else {
+                               gpio_set_value(MX28_PAD_ENET0_RXD3__GPIO_4_10, 1);
+                       }
+                       led_state = 1 - led_state;
+               }
+       }

 }
 }

diff --git a/board/karo/tx28/u-boot.db.in b/board/karo/tx28/u-boot.db.in
new file mode 100644 (file)
index 0000000..bbf6658
--- /dev/null
+++ b/board/karo/tx28/u-boot.db.in
@@ -0,0 +1,14 @@
+sources {
+       u_boot_spl="@@BUILD_DIR@@spl/u-boot-spl";
+       u_boot="@@BUILD_DIR@@u-boot";
+}
+
+section (0) {
+       load u_boot_spl;
+       load ivt (entry = u_boot_spl:reset) > 0x8000;
+       hab call 0x8000;
+
+       load u_boot;
+       load ivt (entry = u_boot:reset) > 0x8000;
+       hab call 0x8000;
+}

diff --git a/board/karo/tx28/u-boot.lds b/board/karo/tx28/u-boot.lds
deleted file mode 100644 (file)
index a0e94ba..0000000
--- a/board/karo/tx28/u-boot.lds
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
-       . = 0x00000000;
-       . = ALIGN(4);
-       .text   :
-       {
-         arch/arm/cpu/arm926ejs/start.o (.text)
-         *(.text)
-       }
-       .rodata : { *(.rodata) }
-       . = ALIGN(4);
-       .data : { *(.data) }
-       . = ALIGN(4);
-       .got : { *(.got) }
-
-       . = .;
-       __u_boot_cmd_start = .;
-       .u_boot_cmd : { *(.u_boot_cmd) }
-       __u_boot_cmd_end = .;
-
-       . = ALIGN(4);
-       __bss_start = .;
-       .bss (NOLOAD) : { *(.bss) }
-       _end = .;
-}

diff --git a/boards.cfg b/boards.cfg
index d1af1b4da28d5075c8714f203da9233e15908eff..40f5bc4f7023c3afe2e63584263701a70616b32b 100644 (file)
--- a/boards.cfg
+++ b/boards.cfg
@@ -158,6 +158,7 @@ jadecpu                      arm         arm926ejs   jadecpu             syteco
 mx25pdk                      arm         arm926ejs   mx25pdk             freescale      mx25           mx25pdk:IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg
 tx25                         arm         arm926ejs   tx25                karo           mx25
 tx28                         arm         arm926ejs   tx28                karo           mx28
 mx25pdk                      arm         arm926ejs   mx25pdk             freescale      mx25           mx25pdk:IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg
 tx25                         arm         arm926ejs   tx25                karo           mx25
 tx28                         arm         arm926ejs   tx28                karo           mx28

+tx28s                        arm         arm926ejs   tx28                karo           mx28

 zmx25                        arm         arm926ejs   zmx25               syteco         mx25
 imx27lite                    arm         arm926ejs   imx27lite           logicpd        mx27
 magnesium                    arm         arm926ejs   imx27lite           logicpd        mx27
 zmx25                        arm         arm926ejs   zmx25               syteco         mx25
 imx27lite                    arm         arm926ejs   imx27lite           logicpd        mx27
 magnesium                    arm         arm926ejs   imx27lite           logicpd        mx27

diff --git a/include/configs/tx28.h b/include/configs/tx28.h
index 10c759d04fb9da5e5ceffe64b37117ff80672fb3..dd384c594a3a7360021e41baae9778026040d705 100644 (file)
--- a/include/configs/tx28.h
+++ b/include/configs/tx28.h
@@ -19,13 +19,17 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
 #ifndef __CONFIG_H
 #define __CONFIG_H
 

+#include <asm/sizes.h>

 #include <asm/arch/regs-base.h>
 
 /*
  * Ka-Ro TX28 board - SoC configuration
  */
 #define CONFIG_MX28                            /* i.MX28 SoC */
 #include <asm/arch/regs-base.h>
 
 /*
  * Ka-Ro TX28 board - SoC configuration
  */
 #define CONFIG_MX28                            /* i.MX28 SoC */

+#define        CONFIG_MXS_GPIO                         /* GPIO control */

 #define CONFIG_SYS_HZ          1000            /* Ticks per second */
 #define CONFIG_SYS_HZ          1000            /* Ticks per second */

+#define CONFIG_IDENT_STRING    "\nBoard: Ka-Ro TX28-40x0"
+#define CONFIG_SHOW_ACTIVITY

 
 #define CONFIG_SPL
 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE
 
 #define CONFIG_SPL
 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE


@@ -33,13 +37,16 @@
 #define CONFIG_SPL_LDSCRIPT    "arch/arm/cpu/arm926ejs/mx28/u-boot-spl.lds"
 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 #define CONFIG_SPL_LDSCRIPT    "arch/arm/cpu/arm926ejs/mx28/u-boot-spl.lds"
 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 #define CONFIG_SPL_LIBGENERIC_SUPPORT

+#define CONFIG_SPL_GPIO_SUPPORT
+#define CONFIG_SPL_FIXED_BATT_SUPPLY
+#define CONFIG_SKIP_LOWLEVEL_INIT

 
 /*
  * Memory configurations
  */
 #define CONFIG_NR_DRAM_BANKS   1               /* 1 bank of DRAM */
 #define PHYS_SDRAM_1           0x40000000      /* Base address */
 
 /*
  * Memory configurations
  */
 #define CONFIG_NR_DRAM_BANKS   1               /* 1 bank of DRAM */
 #define PHYS_SDRAM_1           0x40000000      /* Base address */

-#define PHYS_SDRAM_1_SIZE      0x08000000      /* 128 MB */
+#define PHYS_SDRAM_1_SIZE      SZ_128M

 #define CONFIG_STACKSIZE       0x00010000      /* 128 KB stack */
 #define CONFIG_SYS_MALLOC_LEN  0x00400000      /* 4 MB for malloc */
 #define CONFIG_SYS_GBL_DATA_SIZE 128           /* Reserved for initial data */
 #define CONFIG_STACKSIZE       0x00010000      /* 128 KB stack */
 #define CONFIG_SYS_MALLOC_LEN  0x00400000      /* 4 MB for malloc */
 #define CONFIG_SYS_GBL_DATA_SIZE 128           /* Reserved for initial data */


@@ -50,7 +57,6 @@
  * U-Boot general configurations
  */
 #define CONFIG_SYS_LONGHELP
  * U-Boot general configurations
  */
 #define CONFIG_SYS_LONGHELP

-#define CONFIG_DISPLAY_BOARDINFO

 #define CONFIG_SYS_PROMPT      "MX28 U-Boot > "
 #define CONFIG_SYS_CBSIZE      2048            /* Console I/O buffer size */
 #define CONFIG_SYS_PBSIZE \
 #define CONFIG_SYS_PROMPT      "MX28 U-Boot > "
 #define CONFIG_SYS_CBSIZE      2048            /* Console I/O buffer size */
 #define CONFIG_SYS_PBSIZE \


@@ -74,6 +80,7 @@
 #define CONFIG_CMDLINE_TAG
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_BOOTDELAY       3
 #define CONFIG_CMDLINE_TAG
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_BOOTDELAY       3

+#define CONFIG_ZERO_BOOTDELAY_CHECK

 #define CONFIG_BOOTFILE                "uImage"
 #define CONFIG_BOOTARGS                "console=ttyAMA0,115200 tx28_base=stkv3" \
        " tx28_otg_mode=device ro debug panic=1"
 #define CONFIG_BOOTFILE                "uImage"
 #define CONFIG_BOOTARGS                "console=ttyAMA0,115200 tx28_base=stkv3" \
        " tx28_otg_mode=device ro debug panic=1"


@@ -104,9 +111,6 @@
 
 #define MTD_NAME                       "gpmi-nand"
 #define MTDIDS_DEFAULT                 "nand0=" MTD_NAME
 
 #define MTD_NAME                       "gpmi-nand"
 #define MTDIDS_DEFAULT                 "nand0=" MTD_NAME

-#define MTDPARTS_DEFAULT               "mtdparts=" MTD_NAME ":128k@" \
-       xstr(CONFIG_ENV_OFFSET)                               \
-       "(env),1m@0x40000(u-boot),4m(linux),16m(rootfs),-(userfs)"

 
 /*
  * U-Boot Commands
 
 /*
  * U-Boot Commands


@@ -129,13 +133,18 @@
 /*
  * FEC Driver
  */
 /*
  * FEC Driver
  */

-#define CONFIG_MXC_FEC
+#define CONFIG_FEC_MXC
+#ifdef CONFIG_FEC_MXC
+/* This is required for the FEC driver to work with cache enabled */
+#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
+
+#define CONFIG_FEC_MXC_MULTI
+
+#define CONFIG_MII
+#define CONFIG_FEC_XCV_TYPE            RMII

 #define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
 #define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM

-#define CONFIG_FEC0_IOBASE             ((volatile void *)REGS_ENET_BASE)
-#define CONFIG_FEC0_PHY_ADDR           0

 #define CONFIG_NET_MULTI
 #define CONFIG_ETH_PRIME
 #define CONFIG_NET_MULTI
 #define CONFIG_ETH_PRIME

-#define CONFIG_RMII

 #define CONFIG_CMD_MII
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_PING


@@ -143,6 +152,7 @@
 #define CONFIG_BOOTP_SUBNETMASK
 #define CONFIG_BOOTP_GATEWAY
 #define CONFIG_BOOTP_DNS
 #define CONFIG_BOOTP_SUBNETMASK
 #define CONFIG_BOOTP_GATEWAY
 #define CONFIG_BOOTP_DNS

+#endif

 
 #define CONFIG_CMD_MMC
 #define CONFIG_CMD_NAND
 
 #define CONFIG_CMD_MMC
 #define CONFIG_CMD_NAND


@@ -154,17 +164,26 @@
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_MTD_DEVICE
 #define CONFIG_ENV_IS_IN_NAND
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_MTD_DEVICE
 #define CONFIG_ENV_IS_IN_NAND

-#define CONFIG_MXS_NAND
+#define CONFIG_NAND_MXS
+#define CONFIG_APBH_DMA
+#define CONFIG_APBH_DMA_BURST
+#define CONFIG_APBH_DMA_BURST8

 #define CONFIG_CMD_NAND_TRIMFFS
 #define CONFIG_SYS_MXS_DMA_CHANNEL     4
 #define CONFIG_SYS_MAX_FLASH_SECT      1024
 #define CONFIG_SYS_MAX_FLASH_BANKS     1
 #define CONFIG_SYS_NAND_MAX_CHIPS      1
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_CMD_NAND_TRIMFFS
 #define CONFIG_SYS_MXS_DMA_CHANNEL     4
 #define CONFIG_SYS_MAX_FLASH_SECT      1024
 #define CONFIG_SYS_MAX_FLASH_BANKS     1
 #define CONFIG_SYS_NAND_MAX_CHIPS      1
 #define CONFIG_SYS_MAX_NAND_DEVICE     1

+#define        CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_USE_FLASH_BBT

 #ifdef CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_ENV_OFFSET              0x20000
 #define CONFIG_ENV_SIZE                        0x20000 /* 128 KiB */
 #ifdef CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_ENV_OFFSET              0x20000
 #define CONFIG_ENV_SIZE                        0x20000 /* 128 KiB */

+#if 0
+#define CONFIG_ENV_OFFSET_REDUND       0x40000
+#define CONFIG_ENV_SIZE_REDUND         CONFIG_ENV_SIZE
+#endif

 #endif
 #ifndef CONFIG_SYS_NO_FLASH
 #define CONFIG_CMD_FLASH
 #endif
 #ifndef CONFIG_SYS_NO_FLASH
 #define CONFIG_CMD_FLASH


@@ -185,11 +204,10 @@
 #define CONFIG_ENV_IS_IN_MMC
 #endif
 #define CONFIG_MMC
 #define CONFIG_ENV_IS_IN_MMC
 #endif
 #define CONFIG_MMC

-#define CONFIG_IMX_SSP_MMC             /* MMC driver based on SSP */
-#define CONFIG_GENERIC_MMC
+#define        CONFIG_GENERIC_MMC
+#define        CONFIG_MXS_MMC

 #define CONFIG_DOS_PARTITION
 #define CONFIG_CMD_FAT
 #define CONFIG_DOS_PARTITION
 #define CONFIG_CMD_FAT

-#define CONFIG_SYS_SSP_MMC_NUM         1

 
 #define CONFIG_BOOT_PARTITION_ACCESS
 #define CONFIG_DOS_PARTITION
 
 #define CONFIG_BOOT_PARTITION_ACCESS
 #define CONFIG_DOS_PARTITION


@@ -210,18 +228,17 @@
 #endif /* CONFIG_ENV_IS_IN_MMC */
 #endif /* CONFIG_CMD_MMC */
 
 #endif /* CONFIG_ENV_IS_IN_MMC */
 #endif /* CONFIG_CMD_MMC */
 

-/* The global boot mode will be detected by ROM code and
- * a boot mode value will be stored at fixed address:
- * TO1.0 addr 0x0001a7f0
- * TO1.2 addr 0x00019BF0
- */
-#ifndef MX28_EVK_TO1_0
- #define GLOBAL_BOOT_MODE_ADDR 0x00019BF0
+#ifdef CONFIG_ENV_OFFSET_REDUND
+#define MTDPARTS_DEFAULT               "mtdparts=" MTD_NAME ":128k@"   \
+       xstr(CONFIG_ENV_OFFSET)                                         \
+       "(env),"                                                        \
+       xstr(CONFIG_ENV_OFFSET_REDUND)                          \
+       "(env2),1m(u-boot),4m(linux),16m(rootfs),-(userfs)"

 #else
 #else

- #define GLOBAL_BOOT_MODE_ADDR 0x0001a7f0
+#define MTDPARTS_DEFAULT               "mtdparts=" MTD_NAME ":128k@"   \
+       xstr(CONFIG_ENV_OFFSET)                                         \
+       "(env),1m(u-boot),4m(linux),16m(rootfs),-(userfs)"

 #endif
 #endif

-#define BOOT_MODE_SD0 0x9
-#define BOOT_MODE_SD1 0xa

 
 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
 #define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
 
 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
 #define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \

diff --git a/include/configs/tx28s.h b/include/configs/tx28s.h
new file mode 100644 (file)
index 0000000..f635310
--- /dev/null
+++ b/include/configs/tx28s.h
@@ -0,0 +1,248 @@
+/*
+ * Copyright (C) 2010 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <asm/sizes.h>
+#include <asm/arch/regs-base.h>
+
+/*
+ * Ka-Ro TX28 board - SoC configuration
+ */
+#define CONFIG_MX28                            /* i.MX28 SoC */
+#define CONFIG_TX28_S                          /* TX28 SoM variant */
+#define        CONFIG_MXS_GPIO                         /* GPIO control */
+#define CONFIG_SYS_HZ          1000            /* Ticks per second */
+#define CONFIG_IDENT_STRING    "\nBoard: Ka-Ro TX28-4130"
+#define CONFIG_SHOW_ACTIVITY
+
+#define CONFIG_SPL
+#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
+#define CONFIG_SPL_START_S_PATH        "arch/arm/cpu/arm926ejs/mx28"
+#define CONFIG_SPL_LDSCRIPT    "arch/arm/cpu/arm926ejs/mx28/u-boot-spl.lds"
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_GPIO_SUPPORT
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+/*
+ * Memory configurations
+ */
+#define CONFIG_NR_DRAM_BANKS   1               /* 1 bank of DRAM */
+#define PHYS_SDRAM_1           0x40000000      /* Base address */
+#define PHYS_SDRAM_1_SIZE      SZ_64M
+#define CONFIG_STACKSIZE       0x00010000      /* 128 KB stack */
+#define CONFIG_SYS_MALLOC_LEN  0x00400000      /* 4 MB for malloc */
+#define CONFIG_SYS_GBL_DATA_SIZE 128           /* Reserved for initial data */
+#define CONFIG_SYS_MEMTEST_START 0x40000000    /* Memtest start address */
+#define CONFIG_SYS_MEMTEST_END  0x40400000     /* 4 MB RAM test */
+
+/*
+ * U-Boot general configurations
+ */
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_PROMPT      "MX28 U-Boot > "
+#define CONFIG_SYS_CBSIZE      2048            /* Console I/O buffer size */
+#define CONFIG_SYS_PBSIZE \
+       (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+                                               /* Print buffer size */
+#define CONFIG_SYS_MAXARGS     64              /* Max number of command args */
+#define CONFIG_SYS_BARGSIZE    CONFIG_SYS_CBSIZE
+                                               /* Boot argument buffer size */
+#define CONFIG_VERSION_VARIABLE                        /* U-BOOT version */
+#define CONFIG_AUTO_COMPLETE                   /* Command auto complete */
+#define CONFIG_CMDLINE_EDITING                 /* Command history etc */
+
+#define CONFIG_SYS_64BIT_VSPRINTF
+
+/*
+ * Boot Linux
+ */
+#define xstr(s)        str(s)
+#define str(s) #s
+
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_BOOTDELAY       3
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+#define CONFIG_BOOTFILE                "uImage"
+#define CONFIG_BOOTARGS                "console=ttyAMA0,115200 tx28_base=stkv3" \
+       " tx28_otg_mode=device ro debug panic=1"
+#define CONFIG_BOOTCOMMAND     "run bootcmd_nand"
+#define CONFIG_LOADADDR                0x40100000
+#define CONFIG_SYS_LOAD_ADDR   CONFIG_LOADADDR
+
+/*
+ * Extra Environments
+ */
+#define        CONFIG_EXTRA_ENV_SETTINGS                                       \
+       "bootargs_nand=setenv bootargs ${bootargs} ${mtdparts}"         \
+       " root=/dev/mtdblock3"                                          \
+       " rootfstype=jffs2\0"                                           \
+       "nfsroot=/tftpboot/rootfs\0"                                    \
+       "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs"        \
+       " ip=dhcp nfsroot=${serverip}:${nfsroot},nolock\0"              \
+       "bootargs_mmc=setenv bootargs ${bootargs} root=/dev/mmcblk0p3"  \
+       " rootwait ip=dhcp\0"                                           \
+       "bootcmd_nand=set autostart yes;run bootargs_nand;"             \
+       " nboot linux\0"                                                \
+       "bootcmd_net=set autostart yes;run bootargs_nfs; dhcp\0"        \
+       "bootcmd_mmc=set autostart yes;run bootargs_mmc;"               \
+       " mmc read 0 ${loadaddr} 100 3000\0"                            \
+       "mtdids=" MTDIDS_DEFAULT "\0"                                   \
+       "mtdparts=" MTDPARTS_DEFAULT "\0"                               \
+       "autostart=no\0"
+
+#define MTD_NAME                       "gpmi-nand"
+#define MTDIDS_DEFAULT                 "nand0=" MTD_NAME
+
+/*
+ * U-Boot Commands
+ */
+#define CONFIG_SYS_NO_FLASH
+#include <config_cmd_default.h>
+#define CONFIG_ARCH_CPU_INIT
+#define CONFIG_DISPLAY_CPUINFO
+
+/*
+ * Serial Driver
+ */
+#define        CONFIG_PL011_SERIAL
+#define        CONFIG_PL011_CLOCK              24000000
+#define        CONFIG_PL01x_PORTS              { (void *)MXS_UARTDBG_BASE }
+#define        CONFIG_CONS_INDEX               0
+#define CONFIG_BAUDRATE                        115200          /* Default baud rate */
+#define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
+
+/*
+ * FEC Driver
+ */
+#define CONFIG_FEC_MXC
+#ifdef CONFIG_FEC_MXC
+/* This is required for the FEC driver to work with cache enabled */
+#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
+
+#define IMX_FEC_BASE                   MXS_ENET0_BASE
+#define CONFIG_FEC_MXC_PHYADDR         0x00
+
+#define CONFIG_MII
+#define CONFIG_FEC_XCV_TYPE            RMII
+#define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
+#define CONFIG_NET_MULTI
+#define CONFIG_ETH_PRIME
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+/* Add for working with "strict" DHCP server */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_DNS
+#endif
+
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_MTDPARTS
+
+/*
+ * NAND flash driver
+ */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_MTD_DEVICE
+#define CONFIG_ENV_IS_IN_NAND
+#define CONFIG_NAND_MXS
+#define CONFIG_APBH_DMA
+#define CONFIG_APBH_DMA_BURST
+#define CONFIG_APBH_DMA_BURST8
+#define CONFIG_CMD_NAND_TRIMFFS
+#define CONFIG_SYS_MXS_DMA_CHANNEL     4
+#define CONFIG_SYS_MAX_FLASH_SECT      1024
+#define CONFIG_SYS_MAX_FLASH_BANKS     1
+#define CONFIG_SYS_NAND_MAX_CHIPS      1
+#define CONFIG_SYS_MAX_NAND_DEVICE     1
+#define        CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_USE_FLASH_BBT
+#ifdef CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_ENV_OFFSET              0x20000
+#define CONFIG_ENV_SIZE                        0x20000 /* 128 KiB */
+#if 0
+#define CONFIG_ENV_OFFSET_REDUND       0x40000
+#define CONFIG_ENV_SIZE_REDUND         CONFIG_ENV_SIZE
+#endif
+#endif
+#ifndef CONFIG_SYS_NO_FLASH
+#define CONFIG_CMD_FLASH
+#define CONFIG_SYS_NAND_BASE           0xa0000000
+#define CONFIG_FIT
+#define CONFIG_OF_LIBFDT
+#else
+#define CONFIG_SYS_NAND_BASE           0x00000000
+#define CONFIG_CMD_ROMUPDATE
+#endif
+#endif /* CONFIG_CMD_NAND */
+
+/*
+ * MMC Driver
+ */
+#ifdef CONFIG_CMD_MMC
+#ifndef CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_IS_IN_MMC
+#endif
+#define CONFIG_MMC
+#define        CONFIG_GENERIC_MMC
+#define        CONFIG_MXS_MMC
+#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_FAT
+
+#define CONFIG_BOOT_PARTITION_ACCESS
+#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_EXT2
+
+/*
+ * Environments on MMC
+ */
+#ifdef CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV 0
+#define CONFIG_CMD_ENV
+#define CONFIG_ENV_OVERWRITE
+/* Assoiated with the MMC layout defined in mmcops.c */
+#define CONFIG_ENV_OFFSET              0x400 /* 1 KB */
+#define CONFIG_ENV_SIZE                        (0x20000 - 0x400) /* 127 KB */
+#define CONFIG_DYNAMIC_MMC_DEVNO
+#endif /* CONFIG_ENV_IS_IN_MMC */
+#endif /* CONFIG_CMD_MMC */
+
+#ifdef CONFIG_ENV_OFFSET_REDUND
+#define MTDPARTS_DEFAULT               "mtdparts=" MTD_NAME ":128k@"   \
+       xstr(CONFIG_ENV_OFFSET)                                         \
+       "(env),"                                                        \
+       xstr(CONFIG_ENV_OFFSET_REDUND)                          \
+       "(env2),1m(u-boot),4m(linux),16m(rootfs),-(userfs)"
+#else
+#define MTDPARTS_DEFAULT               "mtdparts=" MTD_NAME ":128k@"   \
+       xstr(CONFIG_ENV_OFFSET)                                         \
+       "(env),1m(u-boot),4m(linux),16m(rootfs),-(userfs)"
+#endif
+
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
+                                       GENERATED_GBL_DATA_SIZE)
+
+#endif /* __CONFIG_H */