+
+#if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD)
+
+static struct panel_config lcd_cfg = {
+ .timing_h = PANEL_TIMING_H(40, 40, 48),
+ .timing_v = PANEL_TIMING_V(29, 13, 3),
+ .pol_freq = 0x00003000, /* Pol Freq */
+ .divisor = 0x0001000E,
+ .panel_type = 0x01, /* TFT */
+ .data_lines = 0x03, /* 24 Bit RGB */
+ .load_mode = 0x02, /* Frame Mode */
+ .panel_color = 0,
+ .lcd_size = PANEL_LCD_SIZE(800, 480),
+};
+
+int board_video_init(void)
+{
+ struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+ void *fb;
+
+ fb = (void *)FB_START_ADDRESS;
+
+ lcd_cfg.frame_buffer = fb;
+
+ setbits_le32(&prcm_base->fclken_dss, FCK_DSS_ON);
+ setbits_le32(&prcm_base->iclken_dss, ICK_DSS_ON);
+
+ omap3_dss_panel_config(&lcd_cfg);
+ omap3_dss_enable();
+
+ return 0;
+}
+#endif