[PATCH] mipsnet: Virtual ethernet driver for MIPSsim.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 drivers/net/Kconfig   |    8 +
 drivers/net/Makefile  |    1
 drivers/net/mipsnet.c |  371 ++++++++++++++++++++++++++++++++++++++++++++++++++
 drivers/net/mipsnet.h |  127 +++++++++++++++++
 4 files changed, 507 insertions(+)
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 0a30368d2efc5aed8a319956b38534b59a6bb185..5148d47492a0c1b90eb225826ff85ea0a0c046f9 100644 (file)
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -475,6 +475,14 @@ config SGI_IOC3_ETH_HW_TX_CSUM
          the moment only acceleration of IPv4 is supported.  This option
          enables offloading for checksums on transmit.  If unsure, say Y.
 
          the moment only acceleration of IPv4 is supported.  This option
          enables offloading for checksums on transmit.  If unsure, say Y.
 

+config MIPS_SIM_NET
+       tristate "MIPS simulator Network device (EXPERIMENTAL)"
+       depends on NETDEVICES && MIPS_SIM && EXPERIMENTAL
+       help
+         The MIPSNET device is a simple Ethernet network device which is
+         emulated by the MIPS Simulator.
+         If you are not using a MIPSsim or are unsure, say N.
+

 config SGI_O2MACE_ETH
        tristate "SGI O2 MACE Fast Ethernet support"
        depends on NET_ETHERNET && SGI_IP32=y
 config SGI_O2MACE_ETH
        tristate "SGI O2 MACE Fast Ethernet support"
        depends on NET_ETHERNET && SGI_IP32=y

diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 4c9477cb212778bb021e821e52736547955b6e3e..1a84e0435f64b52d022aaa3f3ebd4efca0f62f4a 100644 (file)
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -167,6 +167,7 @@ obj-$(CONFIG_EQUALIZER) += eql.o
 obj-$(CONFIG_MIPS_JAZZ_SONIC) += jazzsonic.o
 obj-$(CONFIG_MIPS_GT96100ETH) += gt96100eth.o
 obj-$(CONFIG_MIPS_AU1X00_ENET) += au1000_eth.o
 obj-$(CONFIG_MIPS_JAZZ_SONIC) += jazzsonic.o
 obj-$(CONFIG_MIPS_GT96100ETH) += gt96100eth.o
 obj-$(CONFIG_MIPS_AU1X00_ENET) += au1000_eth.o

+obj-$(CONFIG_MIPS_SIM_NET) += mipsnet.o

 obj-$(CONFIG_SGI_IOC3_ETH) += ioc3-eth.o
 obj-$(CONFIG_DECLANCE) += declance.o
 obj-$(CONFIG_ATARILANCE) += atarilance.o
 obj-$(CONFIG_SGI_IOC3_ETH) += ioc3-eth.o
 obj-$(CONFIG_DECLANCE) += declance.o
 obj-$(CONFIG_ATARILANCE) += atarilance.o

diff --git a/drivers/net/mipsnet.c b/drivers/net/mipsnet.c
new file mode 100644 (file)
index 0000000..f79f7ee
--- /dev/null
+++ b/drivers/net/mipsnet.c
@@ -0,0 +1,371 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#define DEBUG
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/netdevice.h>
+#include <linux/sched.h>
+#include <linux/etherdevice.h>
+#include <linux/netdevice.h>
+#include <asm/io.h>
+#include <asm/mips-boards/simint.h>
+
+#include "mipsnet.h"           /* actual device IO mapping */
+
+#define MIPSNET_VERSION "2005-06-20"
+
+#define mipsnet_reg_address(dev, field) (dev->base_addr + field_offset(field))
+
+struct mipsnet_priv {
+       struct net_device_stats stats;
+};
+
+static struct platform_device *mips_plat_dev;
+
+static char mipsnet_string[] = "mipsnet";
+
+/*
+ * Copy data from the MIPSNET rx data port
+ */
+static int ioiocpy_frommipsnet(struct net_device *dev, unsigned char *kdata,
+                       int len)
+{
+       uint32_t available_len = inl(mipsnet_reg_address(dev, rxDataCount));
+       if (available_len < len)
+               return -EFAULT;
+
+       for (; len > 0; len--, kdata++) {
+               *kdata = inb(mipsnet_reg_address(dev, rxDataBuffer));
+       }
+
+       return inl(mipsnet_reg_address(dev, rxDataCount));
+}
+
+static inline ssize_t mipsnet_put_todevice(struct net_device *dev,
+       struct sk_buff *skb)
+{
+       int count_to_go = skb->len;
+       char *buf_ptr = skb->data;
+       struct mipsnet_priv *mp = netdev_priv(dev);
+
+       pr_debug("%s: %s(): telling MIPSNET txDataCount(%d)\n",
+                dev->name, __FUNCTION__, skb->len);
+
+       outl(skb->len, mipsnet_reg_address(dev, txDataCount));
+
+       pr_debug("%s: %s(): sending data to MIPSNET txDataBuffer(%d)\n",
+                dev->name, __FUNCTION__, skb->len);
+
+       for (; count_to_go; buf_ptr++, count_to_go--) {
+               outb(*buf_ptr, mipsnet_reg_address(dev, txDataBuffer));
+       }
+
+       mp->stats.tx_packets++;
+       mp->stats.tx_bytes += skb->len;
+
+       return skb->len;
+}
+
+static int mipsnet_xmit(struct sk_buff *skb, struct net_device *dev)
+{
+       pr_debug("%s:%s(): transmitting %d bytes\n",
+                dev->name, __FUNCTION__, skb->len);
+
+       /* Only one packet at a time. Once TXDONE interrupt is serviced, the
+        * queue will be restarted.
+        */
+       netif_stop_queue(dev);
+       mipsnet_put_todevice(dev, skb);
+
+       return 0;
+}
+
+static inline ssize_t mipsnet_get_fromdev(struct net_device *dev, size_t count)
+{
+       struct sk_buff *skb;
+       size_t len = count;
+       struct mipsnet_priv *mp = netdev_priv(dev);
+
+       if (!(skb = alloc_skb(len + 2, GFP_KERNEL))) {
+               mp->stats.rx_dropped++;
+               return -ENOMEM;
+       }
+
+       skb_reserve(skb, 2);
+       if (ioiocpy_frommipsnet(dev, skb_put(skb, len), len))
+               return -EFAULT;
+
+       skb->dev = dev;
+       skb->protocol = eth_type_trans(skb, dev);
+       skb->ip_summed = CHECKSUM_UNNECESSARY;
+
+       pr_debug("%s:%s(): pushing RXed data to kernel\n",
+                dev->name, __FUNCTION__);
+       netif_rx(skb);
+
+       mp->stats.rx_packets++;
+       mp->stats.rx_bytes += len;
+
+       return count;
+}
+
+static irqreturn_t
+mipsnet_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+       struct net_device *dev = dev_id;
+
+       irqreturn_t retval = IRQ_NONE;
+       uint64_t interruptFlags;
+
+       if (irq == dev->irq) {
+               pr_debug("%s:%s(): irq %d for device\n",
+                        dev->name, __FUNCTION__, irq);
+
+               retval = IRQ_HANDLED;
+
+               interruptFlags =
+                   inl(mipsnet_reg_address(dev, interruptControl));
+               pr_debug("%s:%s(): intCtl=0x%016llx\n", dev->name,
+                        __FUNCTION__, interruptFlags);
+
+               if (interruptFlags & MIPSNET_INTCTL_TXDONE) {
+                       pr_debug("%s:%s(): got TXDone\n",
+                                dev->name, __FUNCTION__);
+                       outl(MIPSNET_INTCTL_TXDONE,
+                            mipsnet_reg_address(dev, interruptControl));
+                       // only one packet at a time, we are done.
+                       netif_wake_queue(dev);
+               } else if (interruptFlags & MIPSNET_INTCTL_RXDONE) {
+                       pr_debug("%s:%s(): got RX data\n",
+                                dev->name, __FUNCTION__);
+                       mipsnet_get_fromdev(dev,
+                                   inl(mipsnet_reg_address(dev, rxDataCount)));
+                       pr_debug("%s:%s(): clearing RX int\n",
+                                dev->name, __FUNCTION__);
+                       outl(MIPSNET_INTCTL_RXDONE,
+                            mipsnet_reg_address(dev, interruptControl));
+
+               } else if (interruptFlags & MIPSNET_INTCTL_TESTBIT) {
+                       pr_debug("%s:%s(): got test interrupt\n",
+                                dev->name, __FUNCTION__);
+                       // TESTBIT is cleared on read.
+                       //    And takes effect after a write with 0
+                       outl(0, mipsnet_reg_address(dev, interruptControl));
+               } else {
+                       pr_debug("%s:%s(): no valid fags 0x%016llx\n",
+                                dev->name, __FUNCTION__, interruptFlags);
+                       // Maybe shared IRQ, just ignore, no clearing.
+                       retval = IRQ_NONE;
+               }
+
+       } else {
+               printk(KERN_INFO "%s: %s(): irq %d for unknown device\n",
+                      dev->name, __FUNCTION__, irq);
+               retval = IRQ_NONE;
+       }
+       return retval;
+}                              //mipsnet_interrupt()
+
+static int mipsnet_open(struct net_device *dev)
+{
+       int err;
+       pr_debug("%s: mipsnet_open\n", dev->name);
+
+       err = request_irq(dev->irq, &mipsnet_interrupt,
+                         SA_SHIRQ, dev->name, (void *) dev);
+
+       if (err) {
+               pr_debug("%s: %s(): can't get irq %d\n",
+                        dev->name, __FUNCTION__, dev->irq);
+               release_region(dev->base_addr, MIPSNET_IO_EXTENT);
+               return err;
+       }
+
+       pr_debug("%s: %s(): got IO region at 0x%04lx and irq %d for dev.\n",
+                dev->name, __FUNCTION__, dev->base_addr, dev->irq);
+
+
+       netif_start_queue(dev);
+
+       // test interrupt handler
+       outl(MIPSNET_INTCTL_TESTBIT,
+            mipsnet_reg_address(dev, interruptControl));
+
+
+       return 0;
+}
+
+static int mipsnet_close(struct net_device *dev)
+{
+       pr_debug("%s: %s()\n", dev->name, __FUNCTION__);
+       netif_stop_queue(dev);
+       return 0;
+}
+
+static struct net_device_stats *mipsnet_get_stats(struct net_device *dev)
+{
+       struct mipsnet_priv *mp = netdev_priv(dev);
+
+       return &mp->stats;
+}
+
+static void mipsnet_set_mclist(struct net_device *dev)
+{
+       // we don't do anything
+       return;
+}
+
+static int __init mipsnet_probe(struct device *dev)
+{
+       struct net_device *netdev;
+       int err;
+
+       netdev = alloc_etherdev(sizeof(struct mipsnet_priv));
+       if (!netdev) {
+               err = -ENOMEM;
+               goto out;
+       }
+
+       dev_set_drvdata(dev, netdev);
+
+       netdev->open                    = mipsnet_open;
+       netdev->stop                    = mipsnet_close;
+       netdev->hard_start_xmit         = mipsnet_xmit;
+       netdev->get_stats               = mipsnet_get_stats;
+       netdev->set_multicast_list      = mipsnet_set_mclist;
+
+       /*
+        * TODO: probe for these or load them from PARAM
+        */
+       netdev->base_addr = 0x4200;
+       netdev->irq = MIPSCPU_INT_BASE + MIPSCPU_INT_MB0 +
+                     inl(mipsnet_reg_address(netdev, interruptInfo));
+
+       // Get the io region now, get irq on open()
+       if (!request_region(netdev->base_addr, MIPSNET_IO_EXTENT, "mipsnet")) {
+               pr_debug("%s: %s(): IO region {start: 0x%04lux, len: %d} "
+                        "for dev is not availble.\n", netdev->name,
+                        __FUNCTION__, netdev->base_addr, MIPSNET_IO_EXTENT);
+               err = -EBUSY;
+               goto out_free_netdev;
+       }
+
+       /*
+        * Lacking any better mechanism to allocate a MAC address we use a
+        * random one ...
+        */
+       random_ether_addr(netdev->dev_addr);
+
+       err = register_netdev(netdev);
+       if (err) {
+               printk(KERN_ERR "MIPSNet: failed to register netdev.\n");
+               goto out_free_region;
+       }
+
+       return 0;
+
+out_free_region:
+       release_region(netdev->base_addr, MIPSNET_IO_EXTENT);
+
+out_free_netdev:
+       free_netdev(netdev);
+
+out:
+       return err;
+}
+
+static int __devexit mipsnet_device_remove(struct device *device)
+{
+       struct net_device *dev = dev_get_drvdata(device);
+
+       unregister_netdev(dev);
+       release_region(dev->base_addr, MIPSNET_IO_EXTENT);
+       free_netdev(dev);
+       dev_set_drvdata(device, NULL);
+
+       return 0;
+}
+
+static struct device_driver mipsnet_driver = {
+       .name   = mipsnet_string,
+       .bus    = &platform_bus_type,
+       .probe  = mipsnet_probe,
+       .remove = __devexit_p(mipsnet_device_remove),
+};
+
+static void mipsnet_platform_release(struct device *device)
+{
+       struct platform_device *pldev;
+
+       /* free device */
+       pldev = to_platform_device(device);
+       kfree(pldev);
+}
+
+static int __init mipsnet_init_module(void)
+{
+       struct platform_device *pldev;
+       int err;
+
+       printk(KERN_INFO "MIPSNet Ethernet driver. Version: %s. "
+              "(c)2005 MIPS Technologies, Inc.\n", MIPSNET_VERSION);
+
+       if (driver_register(&mipsnet_driver)) {
+               printk(KERN_ERR "Driver registration failed\n");
+               err = -ENODEV;
+               goto out;
+       }
+
+        if (!(pldev = kmalloc (sizeof (*pldev), GFP_KERNEL))) {
+               err = -ENOMEM;
+               goto out_unregister_driver;
+       }
+
+       memset (pldev, 0, sizeof (*pldev));
+       pldev->name             = mipsnet_string;
+       pldev->id               = 0;
+       pldev->dev.release      = mipsnet_platform_release;
+
+       if (platform_device_register(pldev)) {
+               err = -ENODEV;
+               goto out_free_pldev;
+       }
+
+        if (!pldev->dev.driver) {
+               /*
+                * The driver was not bound to this device, there was
+                 * no hardware at this address. Unregister it, as the
+                * release fuction will take care of freeing the
+                * allocated structure
+                */
+               platform_device_unregister (pldev);
+       }
+
+       mips_plat_dev           = pldev;
+
+       return 0;
+
+out_free_pldev:
+       kfree(pldev);
+
+out_unregister_driver:
+       driver_unregister(&mipsnet_driver);
+out:
+       return err;
+}
+
+static void __exit mipsnet_exit_module(void)
+{
+       pr_debug("MIPSNet Ethernet driver exiting\n");
+
+       driver_unregister(&mipsnet_driver);
+}
+
+module_init(mipsnet_init_module);
+module_exit(mipsnet_exit_module);

diff --git a/drivers/net/mipsnet.h b/drivers/net/mipsnet.h
new file mode 100644 (file)
index 0000000..8785359
--- /dev/null
+++ b/drivers/net/mipsnet.h
@@ -0,0 +1,127 @@
+//
+// <COPYRIGHT CLASS="1B" YEAR="2005">
+// Unpublished work (c) MIPS Technologies, Inc.  All rights reserved.
+// Unpublished rights reserved under the copyright laws of the U.S.A. and
+//  other countries.
+//
+// PROPRIETARY / SECRET CONFIDENTIAL INFORMATION OF MIPS TECHNOLOGIES, INC.
+// FOR INTERNAL USE ONLY.
+//
+// Under no circumstances (contract or otherwise) may this information be
+// disclosed to, or copied, modified or used by anyone other than employees
+// or contractors of MIPS Technologies having a need to know.
+// </COPYRIGHT>
+//
+//++
+// File: MIPS_Net.h
+//
+// Description:
+//   The definition of the emulated MIPSNET device's interface.
+//
+// Notes: This include file needs to work from a Linux device drivers.
+//
+//--
+//
+
+#ifndef __MIPSNET_H
+#define __MIPSNET_H
+
+/*
+ *  Id of this Net device, as seen by the core.
+ */
+#define MIPS_NET_DEV_ID ((uint64_t)           \
+                            ((uint64_t)'M'<< 0)| \
+                            ((uint64_t)'I'<< 8)| \
+                            ((uint64_t)'P'<<16)| \
+                            ((uint64_t)'S'<<24)| \
+                            ((uint64_t)'N'<<32)| \
+                            ((uint64_t)'E'<<40)| \
+                            ((uint64_t)'T'<<48)| \
+                            ((uint64_t)'0'<<56))
+
+/*
+ * Net status/control block as seen by sw in the core.
+ * (Why not use bit fields? can't be bothered with cross-platform struct
+ *  packing.)
+ */
+typedef struct _net_control_block {
+       /// dev info for probing
+       ///  reads as MIPSNET%d where %d is some form of version
+       uint64_t devId;         /*0x00 */
+
+       /*
+        * read only busy flag.
+        * Set and cleared by the Net Device to indicate that an rx or a tx
+        * is in progress.
+        */
+       uint32_t busy;          /*0x08 */
+
+       /*
+        * Set by the Net Device.
+        * The device will set it once data has been received.
+        * The value is the number of bytes that should be read from
+        * rxDataBuffer.  The value will decrease till 0 until all the data
+        * from rxDataBuffer has been read.
+        */
+       uint32_t rxDataCount;   /*0x0c */
+#define MIPSNET_MAX_RXTX_DATACOUNT (1<<16)
+
+       /*
+        * Settable from the MIPS core, cleared by the Net Device.
+        * The core should set the number of bytes it wants to send,
+        *   then it should write those bytes of data to txDataBuffer.
+        * The device will clear txDataCount has been processed (not necessarily sent).
+        */
+       uint32_t txDataCount;   /*0x10 */
+
+       /*
+        * Interrupt control
+        *
+        * Used to clear the interrupted generated by this dev.
+        * Write a 1 to clear the interrupt. (except bit31).
+        *
+        * Bit0 is set if it was a tx-done interrupt.
+        * Bit1 is set when new rx-data is available.
+        *      Until this bit is cleared there will be no other RXs.
+        *
+        * Bit31 is used for testing, it clears after a read.
+        *    Writing 1 to this bit will cause an interrupt to be generated.
+        *    To clear the test interrupt, write 0 to this register.
+        */
+       uint32_t interruptControl;      /*0x14 */
+#define MIPSNET_INTCTL_TXDONE     ((uint32_t)(1<< 0))
+#define MIPSNET_INTCTL_RXDONE     ((uint32_t)(1<< 1))
+#define MIPSNET_INTCTL_TESTBIT    ((uint32_t)(1<<31))
+#define MIPSNET_INTCTL_ALLSOURCES (MIPSNET_INTCTL_TXDONE|MIPSNET_INTCTL_RXDONE|MIPSNET_INTCTL_TESTBIT)
+
+       /*
+        * Readonly core-specific interrupt info for the device to signal the core.
+        * The meaning of the contents of this field might change.
+        */
+       /*###\todo: the whole memIntf interrupt scheme is messy: the device should have
+        *  no control what so ever of what VPE/register set is being used.
+        *  The MemIntf should only expose interrupt lines, and something in the
+        *  config should be responsible for the line<->core/vpe bindings.
+        */
+       uint32_t interruptInfo; /*0x18 */
+
+       /*
+        *  This is where the received data is read out.
+        *  There is more data to read until rxDataReady is 0.
+        *  Only 1 byte at this regs offset is used.
+        */
+       uint32_t rxDataBuffer;  /*0x1c */
+
+       /*
+        * This is where the data to transmit is written.
+        * Data should be written for the amount specified in the txDataCount register.
+        *  Only 1 byte at this regs offset is used.
+        */
+       uint32_t txDataBuffer;  /*0x20 */
+} MIPS_T_NetControl;
+
+#define MIPSNET_IO_EXTENT 0x40 /* being generous */
+
+#define field_offset(field) ((int)&((MIPS_T_NetControl*)(0))->field)
+
+#endif /* __MIPSNET_H */