]> git.kernelconcepts.de Git - karo-tx-uboot.git/commitdiff
Merge with /home/m8/git/u-boot
authorWolfgang Denk <wd@pollux.denx.de>
Wed, 5 Jul 2006 08:03:52 +0000 (10:03 +0200)
committerWolfgang Denk <wd@pollux.denx.de>
Wed, 5 Jul 2006 08:03:52 +0000 (10:03 +0200)
CHANGELOG
MAKEALL
board/amcc/bamboo/bamboo.c
board/amcc/bamboo/bamboo.h
board/amcc/yucca/yucca.c
cpu/ppc4xx/405gp_pci.c
cpu/ppc4xx/cpu.c
include/asm-ppc/processor.h
include/configs/yucca.h

index 9d161e24f4a66a51703c36d3b8038105575a8cf9..88d8770f72da6c2c60e57526d202b8375f644504 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,15 @@
 Changes since U-Boot 1.1.4:
 ======================================================================
 
+* Add AMCC bamboo board to MAKEALL build script.
+
+* Fix AMCC bamboo eval board compilation errors.
+
+* Add system memory to the PCI region list for AMCC PPC44x CPUs.
+  Enabled it for Yucca board.
+
+* Cleanup config file and bootup output for Yucca board.
+
 * Fix CONFIG_440_GX define usage.
 
 * Remove autogenerated bmp_logo.h file.
diff --git a/MAKEALL b/MAKEALL
index 3731ceebd9a2194ef272ca6cb34e74872353af76..0e80855a4183725c731f6517f3d1e132ae86f02c 100755 (executable)
--- a/MAKEALL
+++ b/MAKEALL
@@ -75,7 +75,7 @@ LIST_4xx="    \
        PIP405          PLU405          PMC405          PPChameleonEVB  \
        sbc405          VOH405          VOM405          W7OLMC          \
        W7OLMG          walnut          WUH405          XPEDITE1K       \
-       yellowstone     yosemite        yucca                           \
+       yellowstone     yosemite        yucca           bamboo          \
 "
 
 #########################################################################
index 7c989200fe18f0a5500ec79989eee6fc0103ccdf..c93ba6e3ca10002b87ae2711915400dfef0e853f 100644 (file)
@@ -435,7 +435,7 @@ long int initdram (int board_type)
         */
        init_spd_array();
 
-       dram_size = spd_sdram (0);
+       dram_size = spd_sdram();
 
        return dram_size;
 }
index 5f5fcde825e0bafab252d2b8faa592211f81a177..1ce6366da4a8a58fe55cebcb84b4638922a462f2 100644 (file)
 /*----------------------------------------------------------------------------+
   | PPC440EP GPIOs addresses.
   +----------------------------------------------------------------------------*/
-#define GPIO0_BASE      0xEF600B00
 #define GPIO0_REAL      0xEF600B00
 
-#define GPIO1_BASE      0xEF600C00
 #define GPIO1_REAL      0xEF600C00
 
 /* Offsets */
 #define GPIO_IS3(x)    (x+GPIOx_IS3L)   /* GPIO Input register3 High or Low */
 
 
-/*----------------------------------------------------------------------------+
-  | Declare Configuration values
-  +----------------------------------------------------------------------------*/
-typedef enum gpio_select { GPIO_SEL, GPIO_ALT1, GPIO_ALT2, GPIO_ALT3 } gpio_select_t;
-typedef enum gpio_driver { GPIO_DIS, GPIO_IN, GPIO_OUT, GPIO_BI } gpio_driver_t;
-
-typedef struct { unsigned long add;    /* gpio core base address */
-       gpio_driver_t  in_out; /* Driver Setting */
-       gpio_select_t  alt_nb; /* Selected Alternate */
-} gpio_param_s;
-
 /*----------------------------------------------------------------------------+
   |                    XX     XX
   |
index 8fb4cfa8847f6b2938af4273ae2cf58f41050b32..1ae3a549b9b45e133220957d0bf9e3289543904e 100644 (file)
@@ -541,18 +541,15 @@ int board_early_init_f (void)
 
 int checkboard (void)
 {
-       sys_info_t sysinfo;
-
-       get_sys_info (&sysinfo);
-
-       printf ("Board: AMCC 440SPe Evaluation Board\n");
-       printf ("\tVCO: %lu MHz\n", sysinfo.freqVCOMhz / 1000000);
-       printf ("\tCPU: %lu MHz\n", sysinfo.freqProcessor / 1000000);
-       printf ("\tPLB: %lu MHz\n", sysinfo.freqPLB / 1000000);
-       printf ("\tOPB: %lu MHz\n", sysinfo.freqOPB / 1000000);
-       printf ("\tEPB: %lu MHz\n", sysinfo.freqEPB / 1000000);
-       printf ("\tPCI: %lu MHz\n", sysinfo.freqPCI / 1000000);
-       printf ("\tDDR: %lu MHz\n", sysinfo.freqDDR / 1000000);
+       char *s = getenv("serial#");
+
+       printf("Board: Yucca - AMCC 440SPe Evaluation Board");
+       if (s != NULL) {
+               puts(", serial# ");
+               puts(s);
+       }
+       putc('\n');
+
        return 0;
 }
 
index 0ccb3d81c6af15131c81e5be1325366735f4c706..cf5eccb01fdf5532d0ec22c742c29e92aee34712 100644 (file)
@@ -465,17 +465,30 @@ void pci_440_init (struct pci_controller *hose)
        hose->first_busno = 0;
        hose->last_busno = 0xff;
 
+       /* PCI I/O space */
        pci_set_region(hose->regions + reg_num++,
                       0x00000000,
                       PCIX0_IOBASE,
                       0x10000,
                       PCI_REGION_IO);
 
+       /* PCI memory space */
        pci_set_region(hose->regions + reg_num++,
                       CFG_PCI_TARGBASE,
                       CFG_PCI_MEMBASE,
                       0x10000000,
                       PCI_REGION_MEM );
+
+#if defined(CONFIG_PCI_SYS_MEM_BUS) && defined(CONFIG_PCI_SYS_MEM_PHYS) && \
+       defined(CONFIG_PCI_SYS_MEM_SIZE)
+       /* System memory space */
+       pci_set_region(hose->regions + reg_num++,
+                      CONFIG_PCI_SYS_MEM_BUS,
+                      CONFIG_PCI_SYS_MEM_PHYS,
+                      CONFIG_PCI_SYS_MEM_SIZE,
+                      PCI_REGION_MEM | PCI_REGION_MEMORY );
+#endif
+
        hose->region_count = reg_num;
 
        pci_setup_indirect(hose, PCIX0_CFGADR, PCIX0_CFGDATA);
index 6a84b09732fe2fa6546bdfc2517355d2b3a4064f..71303bcc49fb493da5d1e5a0acee815492ccb2d2 100644 (file)
@@ -253,11 +253,13 @@ int checkcpu (void)
                break;
 
        case PVR_440SPe_RA:
-               puts("SPe 3GA533C");
+               puts("SPe Rev. A");
                break;
+
        case PVR_440SPe_RB:
-               puts("SPe 3GB533C");
+               puts("SPe Rev. B");
                break;
+
        default:
                printf (" UNKNOWN (PVR=%08x)", pvr);
                break;
index ea5b0d2b8858ecd4d39b08db9c743e84de9e655b..44b23f1eb4c03ee60539898eb9dd1868032ae364 100644 (file)
 #define PVR_440SP_RA   0x53221850
 #define PVR_440SP_RB   0x53221891
 #define PVR_440SPe_RA  0x53421890
-#define PVR_440SPe_RB  0x53521891
+#define PVR_440SPe_RB  0x53421891
 #define PVR_601                0x00010000
 #define PVR_602                0x00050000
 #define PVR_603                0x00030000
index 95de1ea0a64684e2f2c9a6a5b54fb21949467bff..e6d9843567966e942e839302d888fff9369f1f8c 100644 (file)
@@ -34,7 +34,6 @@
 #define DEBUG
 #undef DEBUG
 
-#define         CONFIG_IDENT_STRING "\nU_440SPe_V1R01 level06"
 /*-----------------------------------------------------------------------
  * High Level Configuration Options
  *----------------------------------------------------------------------*/
 /* #define CFG_PCI_BASE_REGS   0xBEC00000 */   /* internal PCI regs    */
 /* #define CFG_PCI_BASE_CYCLE  0xBED00000 */   /* internal PCI regs    */
 
+/* System RAM mapped to PCI space */
+#define CONFIG_PCI_SYS_MEM_BUS CFG_SDRAM_BASE
+#define CONFIG_PCI_SYS_MEM_PHYS        CFG_SDRAM_BASE
+#define CONFIG_PCI_SYS_MEM_SIZE        (1024 * 1024 * 1024)
+
 #define CFG_FPGA_BASE          0xe2000000      /* epld                 */
 #define CFG_OPER_FLASH         0xe7000000      /* SRAM - OPER Flash    */
 
 #define CONFIG_ENV_OVERWRITE   1
 
 #define CONFIG_BOOTARGS                "console=ttyS0,115200n8 root=/dev/nfs rw"
-#define CONFIG_BOOTCOMMAND     "bootm E7C00000"        /* autoboot command */
-#define CONFIG_BOOTDELAY       -1      /* -1 to disable autoboot */
+#define CONFIG_BOOTCOMMAND     "bootm E7C00000" /* autoboot command    */
+#define CONFIG_BOOTDELAY       -1      /* -1 to disable autoboot       */
 
 #define CONFIG_LOADS_ECHO      1       /* echo on for serial download  */
 #define CFG_LOADS_BAUD_CHANGE  1       /* allow baudrate change        */
        "ramdisk_addr=E7F20000\0"                                       \
        "load=tftp 100000 yuca/u-boot.bin\0"                            \
        "update=protect off 2:4-7;era 2:4-7;"                           \
-               "cp.b ${fileaddr} fffc0000 ${filesize};"                \
+               "cp.b ${fileaddr} FFFB0000 ${filesize};"                \
                "setenv filesize;saveenv\0"                             \
        "upd=run load;run update\0"                                     \
        ""
 /* General PCI */
 #define CONFIG_PCI                     /* include pci support          */
 #define CONFIG_PCI_PNP         1       /* do pci plug-and-play         */
-#define CONFIG_PCI_SCAN_SHOW   i       /* show pci devices on startup  */
+#define CONFIG_PCI_SCAN_SHOW   1       /* show pci devices on startup  */
 #undef CONFIG_PCI_CONFIG_HOST_BRIDGE
 
 /* Board-specific PCI */