Merge tag 'omap-for-v3.16/fixes-not-urgent-signed' of git://git.kernel.org/pub/scm...

Merge "ARM: omap non urgent fixes for v3.16 merge window, resend" from Tony
Lindgren:

Non urgent omap fixes for v3.16 merge window.

* tag 'omap-for-v3.16/fixes-not-urgent-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: am43xx: fix starting offset of NAND.filesystem MTD partition
  ARM: dts: am335x-boneblack: remove use of ti,vcc-aux-disable-is-sleep
  ARM: OMAP2+: free use_gptimer_clksrc variable after boot
  ARM: OMAP5: Redo THUMB mode switch on secondary CPU
  ARM: dts: AM4372: add l3-noc information
  ARM: dts: DRA7: Use dra7-l3-noc instead of omap4-l3-noc

Signed-off-by: Olof Johansson <olof@lixom.net>

diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts
index 6b71ad95a5cfd085a12dd390b794a7d37290a468..305975d3f531189f7845ec32178e443c57e92bfc 100644 (file)
--- a/arch/arm/boot/dts/am335x-boneblack.dts
+++ b/arch/arm/boot/dts/am335x-boneblack.dts
@@ -26,7 +26,6 @@
        pinctrl-0 = <&emmc_pins>;
        bus-width = <8>;
        status = "okay";
-       ti,vcc-aux-disable-is-sleep;
 };
 
 &am33xx_pinmux {

diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index d1f8707ff1dfc46d65815ef5ae2c36dbc1c46006..d547009148dab3837b24ebdf805662fa03f2d5a0 100644 (file)
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -67,11 +67,15 @@
        };
 
        ocp {
-               compatible = "simple-bus";
+               compatible = "ti,am4372-l3-noc", "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
                ranges;
                ti,hwmods = "l3_main";
+               reg = <0x44000000 0x400000
+                      0x44800000 0x400000>;
+               interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 
                prcm: prcm@44df0000 {
                        compatible = "ti,am4-prcm";

diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
index 167dbc8494deef2ba3bd9c63a7bf20afe9ddb21f..2836328b90c81bd2b5b958ddcb4c6b92110e7d99 100644 (file)
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -341,7 +341,7 @@
                };
                partition@9 {
                        label = "NAND.file-system";
-                       reg = <0x00800000 0x1F600000>;
+                       reg = <0x00a00000 0x1f600000>;
                };
        };
 };

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 149b5509993588aa17971d6fbc7a56f314c658e5..ab01f2d0e590c429c1f78ac26b39b271641fadae 100644 (file)
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -99,13 +99,13 @@
         * hierarchy.
         */
        ocp {
-               compatible = "ti,omap4-l3-noc", "simple-bus";
+               compatible = "ti,dra7-l3-noc", "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
                ranges;
                ti,hwmods = "l3_main_1", "l3_main_2";
-               reg = <0x44000000 0x2000>,
-                     <0x44800000 0x3000>;
+               reg = <0x44000000 0x1000000>,
+                     <0x45000000 0x1000>;
                interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 

diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S
index 40c5d5f1451cd34b19ebed5e2d58f150f6f4a29d..4993d4bfe9b2a579d7adcc37726cb6828a78f130 100644 (file)
--- a/arch/arm/mach-omap2/omap-headsmp.S
+++ b/arch/arm/mach-omap2/omap-headsmp.S
@@ -31,10 +31,6 @@
  * register AuxCoreBoot0.
  */
 ENTRY(omap5_secondary_startup)
-.arm
-THUMB( adr     r9, BSYM(wait)  )       @ CPU may be entered in ARM mode.
-THUMB( bx      r9              )       @ If this is a Thumb-2 kernel,
-THUMB( .thumb                  )       @ switch to Thumb now.
 wait:  ldr     r2, =AUX_CORE_BOOT0_PA  @ read from AuxCoreBoot0
        ldr     r0, [r2]
        mov     r0, r0, lsr #5
@@ -43,7 +39,7 @@ wait: ldr     r2, =AUX_CORE_BOOT0_PA  @ read from AuxCoreBoot0
        cmp     r0, r4
        bne     wait
        b       secondary_startup
-END(omap5_secondary_startup)
+ENDPROC(omap5_secondary_startup)
 /*
  * OMAP4 specific entry point for secondary CPU to jump from ROM
  * code.  This routine also provides a holding flag into which

diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index b62de9f9d05c1efa2bc8a88683fbcf24c25fe9db..842b81f31957c9acccc7709a5c77a184fbd986cb 100644 (file)
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -361,7 +361,7 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,
 
 /* Clocksource code */
 static struct omap_dm_timer clksrc;
-static bool use_gptimer_clksrc;
+static bool use_gptimer_clksrc __initdata;
 
 /*
  * clocksource