]> git.kernelconcepts.de Git - karo-tx-linux.git/commitdiff
clocksource/drivers: Rename CLOCKSOURCE_OF_DECLARE to TIMER_OF_DECLARE
authorDaniel Lezcano <daniel.lezcano@linaro.org>
Fri, 26 May 2017 14:56:11 +0000 (16:56 +0200)
committerDaniel Lezcano <daniel.lezcano@linaro.org>
Wed, 14 Jun 2017 09:58:45 +0000 (11:58 +0200)
The CLOCKSOURCE_OF_DECLARE macro is used widely for the timers to declare the
clocksource at early stage. However, this macro is also used to initialize
the clockevent if any, or the clockevent only.

It was originally suggested to declare another macro to initialize a
clockevent, so in order to separate the two entities even they belong to the
same IP. This was not accepted because of the impact on the DT where splitting
a clocksource/clockevent definition does not make sense as it is a Linux
concept not a hardware description.

On the other side, the clocksource has not interrupt declared while the
clockevent has, so it is easy from the driver to know if the description is
for a clockevent or a clocksource, IOW it could be implemented at the driver
level.

So instead of dealing with a named clocksource macro, let's use a more generic
one: TIMER_OF_DECLARE.

The patch has not functional changes.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
62 files changed:
arch/arm/kernel/smp_twd.c
arch/microblaze/kernel/timer.c
arch/mips/ralink/cevt-rt3352.c
arch/nios2/kernel/time.c
drivers/clocksource/arc_timer.c
drivers/clocksource/arm_arch_timer.c
drivers/clocksource/arm_global_timer.c
drivers/clocksource/armv7m_systick.c
drivers/clocksource/asm9260_timer.c
drivers/clocksource/bcm2835_timer.c
drivers/clocksource/bcm_kona_timer.c
drivers/clocksource/cadence_ttc_timer.c
drivers/clocksource/clksrc-dbx500-prcmu.c
drivers/clocksource/clksrc_st_lpc.c
drivers/clocksource/clps711x-timer.c
drivers/clocksource/dw_apb_timer_of.c
drivers/clocksource/exynos_mct.c
drivers/clocksource/fsl_ftm_timer.c
drivers/clocksource/h8300_timer16.c
drivers/clocksource/h8300_timer8.c
drivers/clocksource/h8300_tpu.c
drivers/clocksource/jcore-pit.c
drivers/clocksource/meson6_timer.c
drivers/clocksource/mips-gic-timer.c
drivers/clocksource/mps2-timer.c
drivers/clocksource/mtk_timer.c
drivers/clocksource/mxs_timer.c
drivers/clocksource/nomadik-mtu.c
drivers/clocksource/pxa_timer.c
drivers/clocksource/qcom-timer.c
drivers/clocksource/renesas-ostm.c
drivers/clocksource/rockchip_timer.c
drivers/clocksource/samsung_pwm_timer.c
drivers/clocksource/sun4i_timer.c
drivers/clocksource/tango_xtal.c
drivers/clocksource/tegra20_timer.c
drivers/clocksource/time-armada-370-xp.c
drivers/clocksource/time-efm32.c
drivers/clocksource/time-lpc32xx.c
drivers/clocksource/time-orion.c
drivers/clocksource/time-pistachio.c
drivers/clocksource/timer-atlas7.c
drivers/clocksource/timer-atmel-pit.c
drivers/clocksource/timer-atmel-st.c
drivers/clocksource/timer-digicolor.c
drivers/clocksource/timer-fttmr010.c
drivers/clocksource/timer-imx-gpt.c
drivers/clocksource/timer-integrator-ap.c
drivers/clocksource/timer-keystone.c
drivers/clocksource/timer-nps.c
drivers/clocksource/timer-oxnas-rps.c
drivers/clocksource/timer-prima2.c
drivers/clocksource/timer-sp804.c
drivers/clocksource/timer-stm32.c
drivers/clocksource/timer-sun5i.c
drivers/clocksource/timer-ti-32k.c
drivers/clocksource/timer-u300.c
drivers/clocksource/versatile.c
drivers/clocksource/vf_pit_timer.c
drivers/clocksource/vt8500_timer.c
drivers/clocksource/zevio-timer.c
include/linux/clocksource.h

index 895ae5197159e36c34a61cbb6c404eced5698264..b30eafeef09633d24b1f55e9cf9b4f14314f0fee 100644 (file)
@@ -403,7 +403,7 @@ out:
        WARN(err, "twd_local_timer_of_register failed (%d)\n", err);
        return err;
 }
-CLOCKSOURCE_OF_DECLARE(arm_twd_a9, "arm,cortex-a9-twd-timer", twd_local_timer_of_register);
-CLOCKSOURCE_OF_DECLARE(arm_twd_a5, "arm,cortex-a5-twd-timer", twd_local_timer_of_register);
-CLOCKSOURCE_OF_DECLARE(arm_twd_11mp, "arm,arm11mp-twd-timer", twd_local_timer_of_register);
+TIMER_OF_DECLARE(arm_twd_a9, "arm,cortex-a9-twd-timer", twd_local_timer_of_register);
+TIMER_OF_DECLARE(arm_twd_a5, "arm,cortex-a5-twd-timer", twd_local_timer_of_register);
+TIMER_OF_DECLARE(arm_twd_11mp, "arm,arm11mp-twd-timer", twd_local_timer_of_register);
 #endif
index 9990661927155380bda1daf610d82e039a7b7e28..873a1ccd90404382e45660f9732b37b22b741829 100644 (file)
@@ -333,5 +333,5 @@ static int __init xilinx_timer_init(struct device_node *timer)
        return 0;
 }
 
-CLOCKSOURCE_OF_DECLARE(xilinx_timer, "xlnx,xps-timer-1.00.a",
+TIMER_OF_DECLARE(xilinx_timer, "xlnx,xps-timer-1.00.a",
                       xilinx_timer_init);
index b8a1376165b016bdf939257e27cf0cf9467758ae..92f284d2b80290cecffe2c0923fdd12c26430992 100644 (file)
@@ -152,4 +152,4 @@ static int __init ralink_systick_init(struct device_node *np)
        return 0;
 }
 
-CLOCKSOURCE_OF_DECLARE(systick, "ralink,cevt-systick", ralink_systick_init);
+TIMER_OF_DECLARE(systick, "ralink,cevt-systick", ralink_systick_init);
index 6e2bdc9b8530e1745f01de61eab96d3fb660551c..2954b661737802abc43dd9f595c406aa202386a6 100644 (file)
@@ -353,4 +353,4 @@ void __init time_init(void)
        clocksource_probe();
 }
 
-CLOCKSOURCE_OF_DECLARE(nios2_timer, ALTR_TIMER_COMPATIBLE, nios2_time_init);
+TIMER_OF_DECLARE(nios2_timer, ALTR_TIMER_COMPATIBLE, nios2_time_init);
index 21649733827def8ed3cb287c7df9be74e1dc23c0..4927355f9cbe51e086db1a144190c0bda1944733 100644 (file)
@@ -99,7 +99,7 @@ static int __init arc_cs_setup_gfrc(struct device_node *node)
 
        return clocksource_register_hz(&arc_counter_gfrc, arc_timer_freq);
 }
-CLOCKSOURCE_OF_DECLARE(arc_gfrc, "snps,archs-timer-gfrc", arc_cs_setup_gfrc);
+TIMER_OF_DECLARE(arc_gfrc, "snps,archs-timer-gfrc", arc_cs_setup_gfrc);
 
 #define AUX_RTC_CTRL   0x103
 #define AUX_RTC_LOW    0x104
@@ -158,7 +158,7 @@ static int __init arc_cs_setup_rtc(struct device_node *node)
 
        return clocksource_register_hz(&arc_counter_rtc, arc_timer_freq);
 }
-CLOCKSOURCE_OF_DECLARE(arc_rtc, "snps,archs-timer-rtc", arc_cs_setup_rtc);
+TIMER_OF_DECLARE(arc_rtc, "snps,archs-timer-rtc", arc_cs_setup_rtc);
 
 #endif
 
@@ -333,4 +333,4 @@ static int __init arc_of_timer_init(struct device_node *np)
 
        return ret;
 }
-CLOCKSOURCE_OF_DECLARE(arc_clkevt, "snps,arc-timer", arc_of_timer_init);
+TIMER_OF_DECLARE(arc_clkevt, "snps,arc-timer", arc_of_timer_init);
index 4bed671e490e0b15d79fd432f3d85dacfd094a96..bc60cd78698ee8c70b6ce47e89068adbdd39f32e 100644 (file)
@@ -1194,8 +1194,8 @@ static int __init arch_timer_of_init(struct device_node *np)
 
        return arch_timer_common_init();
 }
-CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_of_init);
-CLOCKSOURCE_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", arch_timer_of_init);
+TIMER_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_of_init);
+TIMER_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", arch_timer_of_init);
 
 static u32 __init
 arch_timer_mem_frame_get_cntfrq(struct arch_timer_mem_frame *frame)
@@ -1382,7 +1382,7 @@ out:
        kfree(timer_mem);
        return ret;
 }
-CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem",
+TIMER_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem",
                       arch_timer_mem_of_init);
 
 #ifdef CONFIG_ACPI_GTDT
index 123ed20ac2ffd406a4e9225ae0a23909066a2f1b..095bb965f621c815106da23e9bcf62cb4a53fb78 100644 (file)
@@ -339,5 +339,5 @@ out_unmap:
 }
 
 /* Only tested on r2p2 and r3p0  */
-CLOCKSOURCE_OF_DECLARE(arm_gt, "arm,cortex-a9-global-timer",
+TIMER_OF_DECLARE(arm_gt, "arm,cortex-a9-global-timer",
                        global_timer_of_register);
index a315491b704751887a9427c298a4a697dddbd6a4..ac046d6fb0bfea14b9daa0eafacad6edfb3647ab 100644 (file)
@@ -82,5 +82,5 @@ out_unmap:
        return ret;
 }
 
-CLOCKSOURCE_OF_DECLARE(arm_systick, "arm,armv7m-systick",
+TIMER_OF_DECLARE(arm_systick, "arm,armv7m-systick",
                        system_timer_of_register);
index c6780830b8ac27c5a3c47d399fefbd31ee6612c0..38cd2feb87c42e35ab1a9153c9bb18438abd16b9 100644 (file)
@@ -238,5 +238,5 @@ static int __init asm9260_timer_init(struct device_node *np)
 
        return 0;
 }
-CLOCKSOURCE_OF_DECLARE(asm9260_timer, "alphascale,asm9260-timer",
+TIMER_OF_DECLARE(asm9260_timer, "alphascale,asm9260-timer",
                asm9260_timer_init);
index dce44307469e159d2e2327a306ed6a0bad616728..82828d3a4739aa601a0690a6ac6963a7336805e3 100644 (file)
@@ -148,5 +148,5 @@ err_iounmap:
        iounmap(base);
        return ret;
 }
-CLOCKSOURCE_OF_DECLARE(bcm2835, "brcm,bcm2835-system-timer",
+TIMER_OF_DECLARE(bcm2835, "brcm,bcm2835-system-timer",
                        bcm2835_timer_init);
index fda5e1476638636db42330775472f21a9ea84e42..5c40be9880f5f3c1a12197ae964e228f24547a4f 100644 (file)
@@ -198,9 +198,9 @@ static int __init kona_timer_init(struct device_node *node)
        return 0;
 }
 
-CLOCKSOURCE_OF_DECLARE(brcm_kona, "brcm,kona-timer", kona_timer_init);
+TIMER_OF_DECLARE(brcm_kona, "brcm,kona-timer", kona_timer_init);
 /*
  * bcm,kona-timer is deprecated by brcm,kona-timer
  * being kept here for driver compatibility
  */
-CLOCKSOURCE_OF_DECLARE(bcm_kona, "bcm,kona-timer", kona_timer_init);
+TIMER_OF_DECLARE(bcm_kona, "bcm,kona-timer", kona_timer_init);
index 44e5e951583bc38fc8c4a6a9b89ea91f7587af34..a144dfca6499e189950dddd6a76835fd2363351f 100644 (file)
@@ -539,4 +539,4 @@ static int __init ttc_timer_init(struct device_node *timer)
        return 0;
 }
 
-CLOCKSOURCE_OF_DECLARE(ttc, "cdns,ttc", ttc_timer_init);
+TIMER_OF_DECLARE(ttc, "cdns,ttc", ttc_timer_init);
index c69e2772658d9318892ce377cebff1eb4118c793..c1b96dc5f4447ff6a95dd3d310db75efcde075bc 100644 (file)
@@ -86,5 +86,5 @@ static int __init clksrc_dbx500_prcmu_init(struct device_node *node)
 #endif
        return clocksource_register_hz(&clocksource_dbx500_prcmu, RATE_32K);
 }
-CLOCKSOURCE_OF_DECLARE(dbx500_prcmu, "stericsson,db8500-prcmu-timer-4",
+TIMER_OF_DECLARE(dbx500_prcmu, "stericsson,db8500-prcmu-timer-4",
                       clksrc_dbx500_prcmu_init);
index 03cc49217bb49af3021fa9295516c1e24826f094..a1d01ebb81f56e4f961c05429fa26bc43056e65f 100644 (file)
@@ -132,4 +132,4 @@ static int __init st_clksrc_of_register(struct device_node *np)
 
        return ret;
 }
-CLOCKSOURCE_OF_DECLARE(ddata, "st,stih407-lpc", st_clksrc_of_register);
+TIMER_OF_DECLARE(ddata, "st,stih407-lpc", st_clksrc_of_register);
index 24db6d605549cec0a4f0e611be0de44161b98b84..fc9e025cc3958aaeafb9c1b7c9cd95e1142b7cc9 100644 (file)
@@ -119,5 +119,5 @@ static int __init clps711x_timer_init(struct device_node *np)
                return -EINVAL;
        }
 }
-CLOCKSOURCE_OF_DECLARE(clps711x, "cirrus,ep7209-timer", clps711x_timer_init);
+TIMER_OF_DECLARE(clps711x, "cirrus,ep7209-timer", clps711x_timer_init);
 #endif
index aee6c0d39a7c1e663827560eb763f23a0d6abea4..69866cd8f4bb419cae13a71b5569eedd1d32546a 100644 (file)
@@ -167,7 +167,7 @@ static int __init dw_apb_timer_init(struct device_node *timer)
 
        return 0;
 }
-CLOCKSOURCE_OF_DECLARE(pc3x2_timer, "picochip,pc3x2-timer", dw_apb_timer_init);
-CLOCKSOURCE_OF_DECLARE(apb_timer_osc, "snps,dw-apb-timer-osc", dw_apb_timer_init);
-CLOCKSOURCE_OF_DECLARE(apb_timer_sp, "snps,dw-apb-timer-sp", dw_apb_timer_init);
-CLOCKSOURCE_OF_DECLARE(apb_timer, "snps,dw-apb-timer", dw_apb_timer_init);
+TIMER_OF_DECLARE(pc3x2_timer, "picochip,pc3x2-timer", dw_apb_timer_init);
+TIMER_OF_DECLARE(apb_timer_osc, "snps,dw-apb-timer-osc", dw_apb_timer_init);
+TIMER_OF_DECLARE(apb_timer_sp, "snps,dw-apb-timer-sp", dw_apb_timer_init);
+TIMER_OF_DECLARE(apb_timer, "snps,dw-apb-timer", dw_apb_timer_init);
index 670ff0f25b6712ea8e2875a5ecc2a4c46cb1c554..7a244b681876d3895e1e8f010f58c14e21c4d535 100644 (file)
@@ -610,5 +610,5 @@ static int __init mct_init_ppi(struct device_node *np)
 {
        return mct_init_dt(np, MCT_INT_PPI);
 }
-CLOCKSOURCE_OF_DECLARE(exynos4210, "samsung,exynos4210-mct", mct_init_spi);
-CLOCKSOURCE_OF_DECLARE(exynos4412, "samsung,exynos4412-mct", mct_init_ppi);
+TIMER_OF_DECLARE(exynos4210, "samsung,exynos4210-mct", mct_init_spi);
+TIMER_OF_DECLARE(exynos4412, "samsung,exynos4412-mct", mct_init_ppi);
index 738515b89073ccab553a35d6081ed78787984d12..3121e2d96c91b1beeaa6cb25d9ffb4802c4fcb78 100644 (file)
@@ -369,4 +369,4 @@ err:
        kfree(priv);
        return ret;
 }
-CLOCKSOURCE_OF_DECLARE(flextimer, "fsl,ftm-timer", ftm_timer_init);
+TIMER_OF_DECLARE(flextimer, "fsl,ftm-timer", ftm_timer_init);
index 5b27fb9997c22083cf602811d86864cd7e7cdb0e..dfbd4f8051cbecce1ff7c1c84cfaef26d4f76f50 100644 (file)
@@ -187,5 +187,5 @@ free_clk:
        return ret;
 }
 
-CLOCKSOURCE_OF_DECLARE(h8300_16bit, "renesas,16bit-timer",
+TIMER_OF_DECLARE(h8300_16bit, "renesas,16bit-timer",
                           h8300_16timer_init);
index 804c489531d692e96a5166c49f443f8aa18f3aca..f6ffb0cef09141728a48c4f400bf997f3fda0b7c 100644 (file)
@@ -207,4 +207,4 @@ free_clk:
        return ret;
 }
 
-CLOCKSOURCE_OF_DECLARE(h8300_8bit, "renesas,8bit-timer", h8300_8timer_init);
+TIMER_OF_DECLARE(h8300_8bit, "renesas,8bit-timer", h8300_8timer_init);
index 72e1cf2b30962ee09bd04b3c4fbaaa5654c3f39b..45a8d17dac1e816775c6d70c8e4b1bf0e096ab9e 100644 (file)
@@ -154,4 +154,4 @@ free_clk:
        return ret;
 }
 
-CLOCKSOURCE_OF_DECLARE(h8300_tpu, "renesas,tpu", h8300_tpu_init);
+TIMER_OF_DECLARE(h8300_tpu, "renesas,tpu", h8300_tpu_init);
index 7c61226f435918ca3a66d64a4c9f195ae8129994..5d3d88e0fc8c0f8e045b105cf22744097cf576c9 100644 (file)
@@ -246,4 +246,4 @@ static int __init jcore_pit_init(struct device_node *node)
        return 0;
 }
 
-CLOCKSOURCE_OF_DECLARE(jcore_pit, "jcore,pit", jcore_pit_init);
+TIMER_OF_DECLARE(jcore_pit, "jcore,pit", jcore_pit_init);
index 39d21f693a332d2019d9fa1201287e2b672d412e..92f20991a937ef7fd289014c9ae91d5a15b4ce15 100644 (file)
@@ -174,5 +174,5 @@ static int __init meson6_timer_init(struct device_node *node)
                                        1, 0xfffe);
        return 0;
 }
-CLOCKSOURCE_OF_DECLARE(meson6, "amlogic,meson6-timer",
+TIMER_OF_DECLARE(meson6, "amlogic,meson6-timer",
                       meson6_timer_init);
index 3f52ee21992374289a872a1c274954376bde75ac..e31e0832602497654a7768647401315152622cbe 100644 (file)
@@ -200,5 +200,5 @@ static int __init gic_clocksource_of_init(struct device_node *node)
 
        return 0;
 }
-CLOCKSOURCE_OF_DECLARE(mips_gic_timer, "mti,gic-timer",
+TIMER_OF_DECLARE(mips_gic_timer, "mti,gic-timer",
                       gic_clocksource_of_init);
index 3e4431ed9aa92a4354d1f5468ce230c964e07770..aa4d63af87060c3bccdf9ef0eddbdcf1024526c6 100644 (file)
@@ -274,4 +274,4 @@ static int __init mps2_timer_init(struct device_node *np)
        return 0;
 }
 
-CLOCKSOURCE_OF_DECLARE(mps2_timer, "arm,mps2-timer", mps2_timer_init);
+TIMER_OF_DECLARE(mps2_timer, "arm,mps2-timer", mps2_timer_init);
index 90659493c59c4a5a284a16429d306a4d1eae5caa..f9b724fd99505cd7d0511aada225be8dc774ced4 100644 (file)
@@ -265,4 +265,4 @@ err_kzalloc:
 
        return -EINVAL;
 }
-CLOCKSOURCE_OF_DECLARE(mtk_mt6577, "mediatek,mt6577-timer", mtk_timer_init);
+TIMER_OF_DECLARE(mtk_mt6577, "mediatek,mt6577-timer", mtk_timer_init);
index 99b77aff08395e887e824cf28cd373ce3a1e1560..a03434e9fe8f47146f3f0f7047482f5d878ea1b0 100644 (file)
@@ -293,4 +293,4 @@ static int __init mxs_timer_init(struct device_node *np)
 
        return setup_irq(irq, &mxs_timer_irq);
 }
-CLOCKSOURCE_OF_DECLARE(mxs, "fsl,timrot", mxs_timer_init);
+TIMER_OF_DECLARE(mxs, "fsl,timrot", mxs_timer_init);
index 7d44de304f373ab8ec374515aa1382b1bdddca90..8e4ddb9420c62cf9a43e9f528d858e1952eff6a3 100644 (file)
@@ -284,5 +284,5 @@ static int __init nmdk_timer_of_init(struct device_node *node)
 
        return nmdk_timer_init(base, irq, pclk, clk);
 }
-CLOCKSOURCE_OF_DECLARE(nomadik_mtu, "st,nomadik-mtu",
+TIMER_OF_DECLARE(nomadik_mtu, "st,nomadik-mtu",
                       nmdk_timer_of_init);
index a10fa667325f0b7e14e35487711456e6c228dea9..08cd6eaf37951b8bb403de30d521104dda5889d9 100644 (file)
@@ -216,7 +216,7 @@ static int __init pxa_timer_dt_init(struct device_node *np)
 
        return pxa_timer_common_init(irq, clk_get_rate(clk));
 }
-CLOCKSOURCE_OF_DECLARE(pxa_timer, "marvell,pxa-timer", pxa_timer_dt_init);
+TIMER_OF_DECLARE(pxa_timer, "marvell,pxa-timer", pxa_timer_dt_init);
 
 /*
  * Legacy timer init for non device-tree boards.
index ee358cdf4a07b37e1952728fc22e21e2834d4864..89816f89ff3f4b6f5cb0e7782ae9f4e34cebcb7c 100644 (file)
@@ -254,5 +254,5 @@ static int __init msm_dt_timer_init(struct device_node *np)
 
        return msm_timer_init(freq, 32, irq, !!percpu_offset);
 }
-CLOCKSOURCE_OF_DECLARE(kpss_timer, "qcom,kpss-timer", msm_dt_timer_init);
-CLOCKSOURCE_OF_DECLARE(scss_timer, "qcom,scss-timer", msm_dt_timer_init);
+TIMER_OF_DECLARE(kpss_timer, "qcom,kpss-timer", msm_dt_timer_init);
+TIMER_OF_DECLARE(scss_timer, "qcom,scss-timer", msm_dt_timer_init);
index c76f57668fb2ffedf7b96b57c080c6b86c1c0f73..6cffd7c6001a6961903ce542ea958179cfcc5265 100644 (file)
@@ -262,4 +262,4 @@ err:
        return 0;
 }
 
-CLOCKSOURCE_OF_DECLARE(ostm, "renesas,ostm", ostm_init);
+TIMER_OF_DECLARE(ostm, "renesas,ostm", ostm_init);
index 49c02be50eca46e09eecbfd4ec8650caef59d9c6..c27f4c850d83c6bbd82ba60da1140f3fee0e8ed0 100644 (file)
@@ -303,5 +303,5 @@ static int __init rk_timer_init(struct device_node *np)
        return -EINVAL;
 }
 
-CLOCKSOURCE_OF_DECLARE(rk3288_timer, "rockchip,rk3288-timer", rk_timer_init);
-CLOCKSOURCE_OF_DECLARE(rk3399_timer, "rockchip,rk3399-timer", rk_timer_init);
+TIMER_OF_DECLARE(rk3288_timer, "rockchip,rk3288-timer", rk_timer_init);
+TIMER_OF_DECLARE(rk3399_timer, "rockchip,rk3399-timer", rk_timer_init);
index a68e6538c80964488609c8b6381912b5a428174e..21cd72c55a2dc8f13b3b7200d60338f99732c53c 100644 (file)
@@ -466,7 +466,7 @@ static int __init s3c2410_pwm_clocksource_init(struct device_node *np)
 {
        return samsung_pwm_alloc(np, &s3c24xx_variant);
 }
-CLOCKSOURCE_OF_DECLARE(s3c2410_pwm, "samsung,s3c2410-pwm", s3c2410_pwm_clocksource_init);
+TIMER_OF_DECLARE(s3c2410_pwm, "samsung,s3c2410-pwm", s3c2410_pwm_clocksource_init);
 
 static const struct samsung_pwm_variant s3c64xx_variant = {
        .bits           = 32,
@@ -479,7 +479,7 @@ static int __init s3c64xx_pwm_clocksource_init(struct device_node *np)
 {
        return samsung_pwm_alloc(np, &s3c64xx_variant);
 }
-CLOCKSOURCE_OF_DECLARE(s3c6400_pwm, "samsung,s3c6400-pwm", s3c64xx_pwm_clocksource_init);
+TIMER_OF_DECLARE(s3c6400_pwm, "samsung,s3c6400-pwm", s3c64xx_pwm_clocksource_init);
 
 static const struct samsung_pwm_variant s5p64x0_variant = {
        .bits           = 32,
@@ -492,7 +492,7 @@ static int __init s5p64x0_pwm_clocksource_init(struct device_node *np)
 {
        return samsung_pwm_alloc(np, &s5p64x0_variant);
 }
-CLOCKSOURCE_OF_DECLARE(s5p6440_pwm, "samsung,s5p6440-pwm", s5p64x0_pwm_clocksource_init);
+TIMER_OF_DECLARE(s5p6440_pwm, "samsung,s5p6440-pwm", s5p64x0_pwm_clocksource_init);
 
 static const struct samsung_pwm_variant s5p_variant = {
        .bits           = 32,
@@ -505,5 +505,5 @@ static int __init s5p_pwm_clocksource_init(struct device_node *np)
 {
        return samsung_pwm_alloc(np, &s5p_variant);
 }
-CLOCKSOURCE_OF_DECLARE(s5pc100_pwm, "samsung,s5pc100-pwm", s5p_pwm_clocksource_init);
+TIMER_OF_DECLARE(s5pc100_pwm, "samsung,s5pc100-pwm", s5p_pwm_clocksource_init);
 #endif
index 4452d5c8f30460864d9b0df225068244be4d0209..3e4bc64ff1762366bada2ae11f9f9ba25c4e42f6 100644 (file)
@@ -233,5 +233,5 @@ static int __init sun4i_timer_init(struct device_node *node)
 
        return ret;
 }
-CLOCKSOURCE_OF_DECLARE(sun4i, "allwinner,sun4i-a10-timer",
+TIMER_OF_DECLARE(sun4i, "allwinner,sun4i-a10-timer",
                       sun4i_timer_init);
index 12fcef8cf2d36758cadf8449c84f33dafde28acc..c4e1c2e6046fa1c82bbca793e0ec17a9f4f71291 100644 (file)
@@ -53,4 +53,4 @@ static int __init tango_clocksource_init(struct device_node *np)
        return 0;
 }
 
-CLOCKSOURCE_OF_DECLARE(tango, "sigma,tick-counter", tango_clocksource_init);
+TIMER_OF_DECLARE(tango, "sigma,tick-counter", tango_clocksource_init);
index b9990b9c98c53480e9fc476a50692d7ae240179f..c337a8100a7b991988fa63cd31f0de96194803a2 100644 (file)
@@ -237,7 +237,7 @@ static int __init tegra20_init_timer(struct device_node *np)
 
        return 0;
 }
-CLOCKSOURCE_OF_DECLARE(tegra20_timer, "nvidia,tegra20-timer", tegra20_init_timer);
+TIMER_OF_DECLARE(tegra20_timer, "nvidia,tegra20-timer", tegra20_init_timer);
 
 static int __init tegra20_init_rtc(struct device_node *np)
 {
@@ -261,4 +261,4 @@ static int __init tegra20_init_rtc(struct device_node *np)
 
        return register_persistent_clock(NULL, tegra_read_persistent_clock64);
 }
-CLOCKSOURCE_OF_DECLARE(tegra20_rtc, "nvidia,tegra20-rtc", tegra20_init_rtc);
+TIMER_OF_DECLARE(tegra20_rtc, "nvidia,tegra20-rtc", tegra20_init_rtc);
index aea4380129ea734ab80c44d413bbccfa57570816..edf1a46269f101653a7694f31cd6fbd5776a6961 100644 (file)
@@ -351,7 +351,7 @@ static int __init armada_xp_timer_init(struct device_node *np)
 
        return armada_370_xp_timer_common_init(np);
 }
-CLOCKSOURCE_OF_DECLARE(armada_xp, "marvell,armada-xp-timer",
+TIMER_OF_DECLARE(armada_xp, "marvell,armada-xp-timer",
                       armada_xp_timer_init);
 
 static int __init armada_375_timer_init(struct device_node *np)
@@ -389,7 +389,7 @@ static int __init armada_375_timer_init(struct device_node *np)
 
        return armada_370_xp_timer_common_init(np);
 }
-CLOCKSOURCE_OF_DECLARE(armada_375, "marvell,armada-375-timer",
+TIMER_OF_DECLARE(armada_375, "marvell,armada-375-timer",
                       armada_375_timer_init);
 
 static int __init armada_370_timer_init(struct device_node *np)
@@ -412,5 +412,5 @@ static int __init armada_370_timer_init(struct device_node *np)
 
        return armada_370_xp_timer_common_init(np);
 }
-CLOCKSOURCE_OF_DECLARE(armada_370, "marvell,armada-370-timer",
+TIMER_OF_DECLARE(armada_370, "marvell,armada-370-timer",
                       armada_370_timer_init);
index ce0f97b4e5db086ad2f82e11f8d672e75f421ea2..257e810ec1ad1dd25e7ec4e3263f7bf2816ef1f5 100644 (file)
@@ -283,5 +283,5 @@ static int __init efm32_timer_init(struct device_node *np)
 
        return ret;
 }
-CLOCKSOURCE_OF_DECLARE(efm32compat, "efm32,timer", efm32_timer_init);
-CLOCKSOURCE_OF_DECLARE(efm32, "energymicro,efm32-timer", efm32_timer_init);
+TIMER_OF_DECLARE(efm32compat, "efm32,timer", efm32_timer_init);
+TIMER_OF_DECLARE(efm32, "energymicro,efm32-timer", efm32_timer_init);
index 9649cfdb92137e24a571b4e5d0871486d8805796..d51a62a79ef76ec4099a704ec3d29ed6ff32bd89 100644 (file)
@@ -311,4 +311,4 @@ static int __init lpc32xx_timer_init(struct device_node *np)
 
        return ret;
 }
-CLOCKSOURCE_OF_DECLARE(lpc32xx_timer, "nxp,lpc3220-timer", lpc32xx_timer_init);
+TIMER_OF_DECLARE(lpc32xx_timer, "nxp,lpc3220-timer", lpc32xx_timer_init);
index b9b97f630c4d01fe41d18835b67e61391705783c..12202067fe4b81fba3961c99656617543a42e7df 100644 (file)
@@ -189,4 +189,4 @@ static int __init orion_timer_init(struct device_node *np)
 
        return 0;
 }
-CLOCKSOURCE_OF_DECLARE(orion_timer, "marvell,orion-timer", orion_timer_init);
+TIMER_OF_DECLARE(orion_timer, "marvell,orion-timer", orion_timer_init);
index 3710e4d9dcba065117e9b435e0f7428dea0d1f23..a2dd85d0c1d75471b4061c95c93d30bdeb1e068a 100644 (file)
@@ -214,5 +214,5 @@ static int __init pistachio_clksrc_of_init(struct device_node *node)
        sched_clock_register(pistachio_read_sched_clock, 32, rate);
        return clocksource_register_hz(&pcs_gpt.cs, rate);
 }
-CLOCKSOURCE_OF_DECLARE(pistachio_gptimer, "img,pistachio-gptimer",
+TIMER_OF_DECLARE(pistachio_gptimer, "img,pistachio-gptimer",
                       pistachio_clksrc_of_init);
index 50300eec4a391f1c855e39b79367c52adb28f99e..62c4bbc55a7eaede06350bed31f3275dfaddefe8 100644 (file)
@@ -283,4 +283,4 @@ static int __init sirfsoc_of_timer_init(struct device_node *np)
 
        return sirfsoc_atlas7_timer_init(np);
 }
-CLOCKSOURCE_OF_DECLARE(sirfsoc_atlas7_timer, "sirf,atlas7-tick", sirfsoc_of_timer_init);
+TIMER_OF_DECLARE(sirfsoc_atlas7_timer, "sirf,atlas7-tick", sirfsoc_of_timer_init);
index cc112351dc702305858fb6cd3d1747e18d630fb3..ec8a4376f74fb4f9da1f369a968df457064315e2 100644 (file)
@@ -255,5 +255,5 @@ static int __init at91sam926x_pit_dt_init(struct device_node *node)
 
        return 0;
 }
-CLOCKSOURCE_OF_DECLARE(at91sam926x_pit, "atmel,at91sam9260-pit",
+TIMER_OF_DECLARE(at91sam926x_pit, "atmel,at91sam9260-pit",
                       at91sam926x_pit_dt_init);
index be4ac76041364fec5d7a5597dd52a286a2cccef3..d2e660f475af6025077b045018c96c59e6bb40bb 100644 (file)
@@ -260,5 +260,5 @@ static int __init atmel_st_timer_init(struct device_node *node)
        /* register clocksource */
        return clocksource_register_hz(&clk32k, sclk_rate);
 }
-CLOCKSOURCE_OF_DECLARE(atmel_st_timer, "atmel,at91rm9200-st",
+TIMER_OF_DECLARE(atmel_st_timer, "atmel,at91rm9200-st",
                       atmel_st_timer_init);
index 94a161eb9cce540515797c68ca967b289a0e502d..1e984a4d8ad00a606646fe805fcd9855c9745fd7 100644 (file)
@@ -203,5 +203,5 @@ static int __init digicolor_timer_init(struct device_node *node)
 
        return 0;
 }
-CLOCKSOURCE_OF_DECLARE(conexant_digicolor, "cnxt,cx92755-timer",
+TIMER_OF_DECLARE(conexant_digicolor, "cnxt,cx92755-timer",
                       digicolor_timer_init);
index d96190e85c66537d70a1aa6018d4f5a9e2c7319d..a21020c57df683d5fb00a403bfc6abed5a218d5c 100644 (file)
@@ -364,8 +364,8 @@ static __init int fttmr010_timer_init(struct device_node *np)
        return fttmr010_common_init(np, false);
 }
 
-CLOCKSOURCE_OF_DECLARE(fttmr010, "faraday,fttmr010", fttmr010_timer_init);
-CLOCKSOURCE_OF_DECLARE(gemini, "cortina,gemini-timer", fttmr010_timer_init);
-CLOCKSOURCE_OF_DECLARE(moxart, "moxa,moxart-timer", fttmr010_timer_init);
-CLOCKSOURCE_OF_DECLARE(ast2400, "aspeed,ast2400-timer", aspeed_timer_init);
-CLOCKSOURCE_OF_DECLARE(ast2500, "aspeed,ast2500-timer", aspeed_timer_init);
+TIMER_OF_DECLARE(fttmr010, "faraday,fttmr010", fttmr010_timer_init);
+TIMER_OF_DECLARE(gemini, "cortina,gemini-timer", fttmr010_timer_init);
+TIMER_OF_DECLARE(moxart, "moxa,moxart-timer", fttmr010_timer_init);
+TIMER_OF_DECLARE(ast2400, "aspeed,ast2400-timer", aspeed_timer_init);
+TIMER_OF_DECLARE(ast2500, "aspeed,ast2500-timer", aspeed_timer_init);
index f595460bfc589c51474abcef244663334b0316bd..6ec6d79b237cedac8a4a0f71d56c825ce1acf491 100644 (file)
@@ -545,15 +545,15 @@ static int __init imx6dl_timer_init_dt(struct device_node *np)
        return mxc_timer_init_dt(np, GPT_TYPE_IMX6DL);
 }
 
-CLOCKSOURCE_OF_DECLARE(imx1_timer, "fsl,imx1-gpt", imx1_timer_init_dt);
-CLOCKSOURCE_OF_DECLARE(imx21_timer, "fsl,imx21-gpt", imx21_timer_init_dt);
-CLOCKSOURCE_OF_DECLARE(imx27_timer, "fsl,imx27-gpt", imx21_timer_init_dt);
-CLOCKSOURCE_OF_DECLARE(imx31_timer, "fsl,imx31-gpt", imx31_timer_init_dt);
-CLOCKSOURCE_OF_DECLARE(imx25_timer, "fsl,imx25-gpt", imx31_timer_init_dt);
-CLOCKSOURCE_OF_DECLARE(imx50_timer, "fsl,imx50-gpt", imx31_timer_init_dt);
-CLOCKSOURCE_OF_DECLARE(imx51_timer, "fsl,imx51-gpt", imx31_timer_init_dt);
-CLOCKSOURCE_OF_DECLARE(imx53_timer, "fsl,imx53-gpt", imx31_timer_init_dt);
-CLOCKSOURCE_OF_DECLARE(imx6q_timer, "fsl,imx6q-gpt", imx31_timer_init_dt);
-CLOCKSOURCE_OF_DECLARE(imx6dl_timer, "fsl,imx6dl-gpt", imx6dl_timer_init_dt);
-CLOCKSOURCE_OF_DECLARE(imx6sl_timer, "fsl,imx6sl-gpt", imx6dl_timer_init_dt);
-CLOCKSOURCE_OF_DECLARE(imx6sx_timer, "fsl,imx6sx-gpt", imx6dl_timer_init_dt);
+TIMER_OF_DECLARE(imx1_timer, "fsl,imx1-gpt", imx1_timer_init_dt);
+TIMER_OF_DECLARE(imx21_timer, "fsl,imx21-gpt", imx21_timer_init_dt);
+TIMER_OF_DECLARE(imx27_timer, "fsl,imx27-gpt", imx21_timer_init_dt);
+TIMER_OF_DECLARE(imx31_timer, "fsl,imx31-gpt", imx31_timer_init_dt);
+TIMER_OF_DECLARE(imx25_timer, "fsl,imx25-gpt", imx31_timer_init_dt);
+TIMER_OF_DECLARE(imx50_timer, "fsl,imx50-gpt", imx31_timer_init_dt);
+TIMER_OF_DECLARE(imx51_timer, "fsl,imx51-gpt", imx31_timer_init_dt);
+TIMER_OF_DECLARE(imx53_timer, "fsl,imx53-gpt", imx31_timer_init_dt);
+TIMER_OF_DECLARE(imx6q_timer, "fsl,imx6q-gpt", imx31_timer_init_dt);
+TIMER_OF_DECLARE(imx6dl_timer, "fsl,imx6dl-gpt", imx6dl_timer_init_dt);
+TIMER_OF_DECLARE(imx6sl_timer, "fsl,imx6sl-gpt", imx6dl_timer_init_dt);
+TIMER_OF_DECLARE(imx6sx_timer, "fsl,imx6sx-gpt", imx6dl_timer_init_dt);
index 04ad3066e190b3f20561d0f32fe31dd87b9b745c..2ff64d9d4fb31a3a10a85361d8f5b3b33039f76d 100644 (file)
@@ -232,5 +232,5 @@ static int __init integrator_ap_timer_init_of(struct device_node *node)
        return 0;
 }
 
-CLOCKSOURCE_OF_DECLARE(integrator_ap_timer, "arm,integrator-timer",
+TIMER_OF_DECLARE(integrator_ap_timer, "arm,integrator-timer",
                       integrator_ap_timer_init_of);
index ab68a47ab3b45de8bf8713fcde121403f38fb258..0eee03250cfc87ef69b4e7744e7274b477071fcb 100644 (file)
@@ -226,5 +226,5 @@ err:
        return error;
 }
 
-CLOCKSOURCE_OF_DECLARE(keystone_timer, "ti,keystone-timer",
+TIMER_OF_DECLARE(keystone_timer, "ti,keystone-timer",
                           keystone_timer_init);
index e74ea1722ad3a3c5dcb014cdee289e214457189a..7b6bb0df96ae5293dbe5ad1761a31d03c75997d8 100644 (file)
@@ -110,9 +110,9 @@ static int __init nps_setup_clocksource(struct device_node *node)
        return ret;
 }
 
-CLOCKSOURCE_OF_DECLARE(ezchip_nps400_clksrc, "ezchip,nps400-timer",
+TIMER_OF_DECLARE(ezchip_nps400_clksrc, "ezchip,nps400-timer",
                       nps_setup_clocksource);
-CLOCKSOURCE_OF_DECLARE(ezchip_nps400_clk_src, "ezchip,nps400-timer1",
+TIMER_OF_DECLARE(ezchip_nps400_clk_src, "ezchip,nps400-timer1",
                       nps_setup_clocksource);
 
 #ifdef CONFIG_EZNPS_MTM_EXT
@@ -279,6 +279,6 @@ static int __init nps_setup_clockevent(struct device_node *node)
        return 0;
 }
 
-CLOCKSOURCE_OF_DECLARE(ezchip_nps400_clk_evt, "ezchip,nps400-timer0",
+TIMER_OF_DECLARE(ezchip_nps400_clk_evt, "ezchip,nps400-timer0",
                       nps_setup_clockevent);
 #endif /* CONFIG_EZNPS_MTM_EXT */
index d630bf417773a4d1513283631b5108e37e76dfb8..eed6feff8b5f23673de989932afcd806e858ecfc 100644 (file)
@@ -293,7 +293,7 @@ err_alloc:
        return ret;
 }
 
-CLOCKSOURCE_OF_DECLARE(ox810se_rps,
+TIMER_OF_DECLARE(ox810se_rps,
                       "oxsemi,ox810se-rps-timer", oxnas_rps_timer_init);
-CLOCKSOURCE_OF_DECLARE(ox820_rps,
+TIMER_OF_DECLARE(ox820_rps,
                       "oxsemi,ox820se-rps-timer", oxnas_rps_timer_init);
index b4122ed1accb317d7bb71476859ef9d13fe6d37e..20ff33b698df963e0e5f2cb932cb7f03d25f8329 100644 (file)
@@ -245,5 +245,5 @@ static int __init sirfsoc_prima2_timer_init(struct device_node *np)
 
        return 0;
 }
-CLOCKSOURCE_OF_DECLARE(sirfsoc_prima2_timer,
+TIMER_OF_DECLARE(sirfsoc_prima2_timer,
        "sirf,prima2-tick", sirfsoc_prima2_timer_init);
index 2d575a8c09391b2d3b1487de19894c87236a26b7..3ac9dec9a03852f921070ecc0f992e10b5650e8f 100644 (file)
@@ -287,7 +287,7 @@ err:
        iounmap(base);
        return ret;
 }
-CLOCKSOURCE_OF_DECLARE(sp804, "arm,sp804", sp804_of_init);
+TIMER_OF_DECLARE(sp804, "arm,sp804", sp804_of_init);
 
 static int __init integrator_cp_of_init(struct device_node *np)
 {
@@ -335,4 +335,4 @@ err:
        iounmap(base);
        return ret;
 }
-CLOCKSOURCE_OF_DECLARE(intcp, "arm,integrator-cp-timer", integrator_cp_of_init);
+TIMER_OF_DECLARE(intcp, "arm,integrator-cp-timer", integrator_cp_of_init);
index 1b2574c4fb979e4a2597e5ef9e86b9177fcf6b98..174d1243ea93a6d789221f290cbb536d95f6676b 100644 (file)
@@ -187,4 +187,4 @@ err_clk_get:
        return ret;
 }
 
-CLOCKSOURCE_OF_DECLARE(stm32, "st,stm32-timer", stm32_clockevent_init);
+TIMER_OF_DECLARE(stm32, "st,stm32-timer", stm32_clockevent_init);
index 2e9c830ae1cd52d61e38dbb3620b2eb53dd4eb7e..a4ebc8ff8f9143811484c02d52f78a55b1c2f97d 100644 (file)
@@ -358,7 +358,7 @@ static int __init sun5i_timer_init(struct device_node *node)
 
        return sun5i_setup_clockevent(node, timer_base, clk, irq);
 }
-CLOCKSOURCE_OF_DECLARE(sun5i_a13, "allwinner,sun5i-a13-hstimer",
+TIMER_OF_DECLARE(sun5i_a13, "allwinner,sun5i-a13-hstimer",
                           sun5i_timer_init);
-CLOCKSOURCE_OF_DECLARE(sun7i_a20, "allwinner,sun7i-a20-hstimer",
+TIMER_OF_DECLARE(sun7i_a20, "allwinner,sun7i-a20-hstimer",
                           sun5i_timer_init);
index 624067712ef0383b8805b39d164f33c42014a044..880a861ab3c82dd1709b4accc9d9200593ea9ffa 100644 (file)
@@ -124,5 +124,5 @@ static int __init ti_32k_timer_init(struct device_node *np)
 
        return 0;
 }
-CLOCKSOURCE_OF_DECLARE(ti_32k_timer, "ti,omap-counter32k",
+TIMER_OF_DECLARE(ti_32k_timer, "ti,omap-counter32k",
                ti_32k_timer_init);
index 704e40c6f151307ddaee42c16c869446513fa8d5..be34b116d4d2c80d0f367e181a81dc53cf563943 100644 (file)
@@ -458,5 +458,5 @@ static int __init u300_timer_init_of(struct device_node *np)
        return 0;
 }
 
-CLOCKSOURCE_OF_DECLARE(u300_timer, "stericsson,u300-apptimer",
+TIMER_OF_DECLARE(u300_timer, "stericsson,u300-apptimer",
                       u300_timer_init_of);
index 220b490a81428ef8477b3140d49cc85919dbdc10..39725d38aedee8f121f79411bd9443c9912de091 100644 (file)
@@ -38,7 +38,7 @@ static int __init versatile_sched_clock_init(struct device_node *node)
 
        return 0;
 }
-CLOCKSOURCE_OF_DECLARE(vexpress, "arm,vexpress-sysreg",
+TIMER_OF_DECLARE(vexpress, "arm,vexpress-sysreg",
                       versatile_sched_clock_init);
-CLOCKSOURCE_OF_DECLARE(versatile, "arm,versatile-sysreg",
+TIMER_OF_DECLARE(versatile, "arm,versatile-sysreg",
                       versatile_sched_clock_init);
index e0849e20a307dc2cf1030dd30207c888dc02c338..0f92089ec08c79b23508641e507ee6dc86062e88 100644 (file)
@@ -201,4 +201,4 @@ static int __init pit_timer_init(struct device_node *np)
 
        return pit_clockevent_init(clk_rate, irq);
 }
-CLOCKSOURCE_OF_DECLARE(vf610, "fsl,vf610-pit", pit_timer_init);
+TIMER_OF_DECLARE(vf610, "fsl,vf610-pit", pit_timer_init);
index d02b51075ad1d2bf1c0cf87bb0bf4eb3da960af4..e0f7489cfc8e23c74314e5ef2ff250051bdc94f4 100644 (file)
@@ -165,4 +165,4 @@ static int __init vt8500_timer_init(struct device_node *np)
        return 0;
 }
 
-CLOCKSOURCE_OF_DECLARE(vt8500, "via,vt8500-timer", vt8500_timer_init);
+TIMER_OF_DECLARE(vt8500, "via,vt8500-timer", vt8500_timer_init);
index 9a53f5ef61571613ff65972a86e8d253ada7340e..a6a0338eea77f73fbae0b549e3ec77265c00b2f4 100644 (file)
@@ -215,4 +215,4 @@ static int __init zevio_timer_init(struct device_node *node)
        return zevio_timer_add(node);
 }
 
-CLOCKSOURCE_OF_DECLARE(zevio_timer, "lsi,zevio-timer", zevio_timer_init);
+TIMER_OF_DECLARE(zevio_timer, "lsi,zevio-timer", zevio_timer_init);
index f2b10d9ebd04e7d49d032b5cb097e7f2ae630e56..a86b65f0a2466bbad839db1707fff8d520341e1a 100644 (file)
@@ -249,7 +249,7 @@ extern int clocksource_mmio_init(void __iomem *, const char *,
 
 extern int clocksource_i8253_init(void);
 
-#define CLOCKSOURCE_OF_DECLARE(name, compat, fn) \
+#define TIMER_OF_DECLARE(name, compat, fn) \
        OF_DECLARE_1_RET(clksrc, name, compat, fn)
 
 #ifdef CONFIG_CLKSRC_PROBE