Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mpe/linux

Pull powerpc updates from Michael Ellerman:
 "There's some bug fixes or cleanups to facilitate fixes, a MAINTAINERS
  update, and a new syscall (bpf)"

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mpe/linux:
  powerpc/numa: ensure per-cpu NUMA mappings are correct on topology update
  powerpc/numa: use cached value of update->cpu in update_cpu_topology
  cxl: Fix PSL error due to duplicate segment table entries
  powerpc/mm: Use appropriate ESID mask in copro_calculate_slb()
  cxl: Refactor cxl_load_segment() and find_free_sste()
  cxl: Disable secondary hash in segment table
  Revert "powerpc/powernv: Fix endian bug in LPC bus debugfs accessors"
  powernv: Use _GLOBAL_TOC for opal wrappers
  powerpc: Wire up sys_bpf() syscall
  MAINTAINERS: nx-842 driver maintainer change
  powerpc/mm: Remove redundant #if case
  powerpc/mm: Fix build error with hugetlfs disabled

diff --git a/MAINTAINERS b/MAINTAINERS
index dab92a78d1d5e5756d474109b3061290afd67550..1cfabdd1d23f6b1311cd00d954e887ef37f03ae7 100644 (file)
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4608,7 +4608,7 @@ S:        Supported
 F:     drivers/crypto/nx/
 
 IBM Power 842 compression accelerator
-M:     Nathan Fontenot <nfont@linux.vnet.ibm.com>
+M:     Dan Streetman <ddstreet@us.ibm.com>
 S:     Supported
 F:     drivers/crypto/nx/nx-842.c
 F:     include/linux/nx842.h

diff --git a/arch/powerpc/include/asm/hugetlb.h b/arch/powerpc/include/asm/hugetlb.h
index 623f2971ce0ed8d4d947642c862d4dce7640d28d..766b77d527ac6e1c7286c4d1618229b5f2dac72e 100644 (file)
--- a/arch/powerpc/include/asm/hugetlb.h
+++ b/arch/powerpc/include/asm/hugetlb.h
@@ -71,7 +71,7 @@ pte_t *huge_pte_offset_and_shift(struct mm_struct *mm,
 
 void flush_dcache_icache_hugepage(struct page *page);
 
-#if defined(CONFIG_PPC_MM_SLICES) || defined(CONFIG_PPC_SUBPAGE_PROT)
+#if defined(CONFIG_PPC_MM_SLICES)
 int is_hugepage_only_range(struct mm_struct *mm, unsigned long addr,
                           unsigned long len);
 #else

diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h
index 7d8a600688058ec5025cfd3688b6eb369cdadea5..ce9577d693be1c7849c18ac0259a35525d46c6fe 100644 (file)
--- a/arch/powerpc/include/asm/systbl.h
+++ b/arch/powerpc/include/asm/systbl.h
@@ -365,3 +365,4 @@ SYSCALL_SPU(renameat2)
 SYSCALL_SPU(seccomp)
 SYSCALL_SPU(getrandom)
 SYSCALL_SPU(memfd_create)
+SYSCALL_SPU(bpf)

diff --git a/arch/powerpc/include/asm/unistd.h b/arch/powerpc/include/asm/unistd.h
index 4e9af3fd43e7d062755255d932c2123ea5f54c8a..e0da021caa004205fc8b645d95b3047c8cd9b73e 100644 (file)
--- a/arch/powerpc/include/asm/unistd.h
+++ b/arch/powerpc/include/asm/unistd.h
@@ -12,7 +12,7 @@
 #include <uapi/asm/unistd.h>
 
 
-#define __NR_syscalls          361
+#define __NR_syscalls          362
 
 #define __NR__exit __NR_exit
 #define NR_syscalls    __NR_syscalls

diff --git a/arch/powerpc/include/uapi/asm/unistd.h b/arch/powerpc/include/uapi/asm/unistd.h
index 0688fc06e18394268002ae2b7e419f183e6a7dc4..f55351f2e66e962097bc078c25f77a176ca52e2a 100644 (file)
--- a/arch/powerpc/include/uapi/asm/unistd.h
+++ b/arch/powerpc/include/uapi/asm/unistd.h
@@ -383,5 +383,6 @@
 #define __NR_seccomp           358
 #define __NR_getrandom         359
 #define __NR_memfd_create      360
+#define __NR_bpf               361
 
 #endif /* _UAPI_ASM_POWERPC_UNISTD_H_ */

diff --git a/arch/powerpc/mm/copro_fault.c b/arch/powerpc/mm/copro_fault.c
index 0f9939e693df6b8422a7b87301f7dcd250816c34..5a236f082c78386a47b9b415f98f619e8e615688 100644 (file)
--- a/arch/powerpc/mm/copro_fault.c
+++ b/arch/powerpc/mm/copro_fault.c
@@ -99,8 +99,6 @@ int copro_calculate_slb(struct mm_struct *mm, u64 ea, struct copro_slb *slb)
        u64 vsid;
        int psize, ssize;
 
-       slb->esid = (ea & ESID_MASK) | SLB_ESID_V;
-
        switch (REGION_ID(ea)) {
        case USER_REGION_ID:
                pr_devel("%s: 0x%llx -- USER_REGION_ID\n", __func__, ea);
@@ -133,6 +131,7 @@ int copro_calculate_slb(struct mm_struct *mm, u64 ea, struct copro_slb *slb)
        vsid |= mmu_psize_defs[psize].sllp |
                ((ssize == MMU_SEGSIZE_1T) ? SLB_VSID_B_1T : 0);
 
+       slb->esid = (ea & (ssize == MMU_SEGSIZE_1T ? ESID_MASK_1T : ESID_MASK)) | SLB_ESID_V;
        slb->vsid = vsid;
 
        return 0;

diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index e5236c24dc0766112283618da9a259cf88a61735..b9d1dfdbe5bbaa5bdaad7446ec945aa909f2befd 100644 (file)
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -1509,11 +1509,14 @@ static int update_cpu_topology(void *data)
        cpu = smp_processor_id();
 
        for (update = data; update; update = update->next) {
+               int new_nid = update->new_nid;
                if (cpu != update->cpu)
                        continue;
 
-               unmap_cpu_from_node(update->cpu);
-               map_cpu_to_node(update->cpu, update->new_nid);
+               unmap_cpu_from_node(cpu);
+               map_cpu_to_node(cpu, new_nid);
+               set_cpu_numa_node(cpu, new_nid);
+               set_cpu_numa_mem(cpu, local_memory_node(new_nid));
                vdso_getcpu_init();
        }
 

diff --git a/arch/powerpc/mm/slice.c b/arch/powerpc/mm/slice.c
index 8d7bda94d1969b2325073315875a05545922b0fc..ded0ea1afde4021578d21d2e969318ea6cd046eb 100644 (file)
--- a/arch/powerpc/mm/slice.c
+++ b/arch/powerpc/mm/slice.c
@@ -682,6 +682,7 @@ void slice_set_range_psize(struct mm_struct *mm, unsigned long start,
        slice_convert(mm, mask, psize);
 }
 
+#ifdef CONFIG_HUGETLB_PAGE
 /*
  * is_hugepage_only_range() is used by generic code to verify whether
  * a normal mmap mapping (non hugetlbfs) is valid on a given area.
@@ -726,4 +727,4 @@ int is_hugepage_only_range(struct mm_struct *mm, unsigned long addr,
 #endif
        return !slice_check_fit(mask, available);
 }
-
+#endif

diff --git a/arch/powerpc/platforms/powernv/opal-lpc.c b/arch/powerpc/platforms/powernv/opal-lpc.c
index dd2c285ad1708d755b5a1950558566149e837839..ad4b31df779a389ceb83b1c62d77a850e9c1b749 100644 (file)
--- a/arch/powerpc/platforms/powernv/opal-lpc.c
+++ b/arch/powerpc/platforms/powernv/opal-lpc.c
@@ -191,7 +191,6 @@ static ssize_t lpc_debug_read(struct file *filp, char __user *ubuf,
 {
        struct lpc_debugfs_entry *lpc = filp->private_data;
        u32 data, pos, len, todo;
-       __be32 bedata;
        int rc;
 
        if (!access_ok(VERIFY_WRITE, ubuf, count))
@@ -214,10 +213,9 @@ static ssize_t lpc_debug_read(struct file *filp, char __user *ubuf,
                                len = 2;
                }
                rc = opal_lpc_read(opal_lpc_chip_id, lpc->lpc_type, pos,
-                                  &bedata, len);
+                                  &data, len);
                if (rc)
                        return -ENXIO;
-               data = be32_to_cpu(bedata);
                switch(len) {
                case 4:
                        rc = __put_user((u32)data, (u32 __user *)ubuf);

diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S
index e9e2450c1fddd3bb6988084fb38039a8b3c3300b..feb549aa3eea98ee5369f6c3ecf5087dc871b4d8 100644 (file)
--- a/arch/powerpc/platforms/powernv/opal-wrappers.S
+++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
@@ -58,7 +58,7 @@ END_FTR_SECTION(0, 1);                                                \
  */
 
 #define OPAL_CALL(name, token)         \
- _GLOBAL(name);                                \
+ _GLOBAL_TOC(name);                    \
        mflr    r0;                     \
        std     r0,16(r1);              \
        li      r0,token;               \

diff --git a/drivers/misc/cxl/fault.c b/drivers/misc/cxl/fault.c
index 69506ebd4d0765283d2a108cb8912e0a246323fc..c99e896604ee35909e0a2d55bbd95fd31caddbea 100644 (file)
--- a/drivers/misc/cxl/fault.c
+++ b/drivers/misc/cxl/fault.c
@@ -21,60 +21,64 @@
 
 #include "cxl.h"
 
-static struct cxl_sste* find_free_sste(struct cxl_sste *primary_group,
-                                      bool sec_hash,
-                                      struct cxl_sste *secondary_group,
-                                      unsigned int *lru)
+static bool sste_matches(struct cxl_sste *sste, struct copro_slb *slb)
 {
-       unsigned int i, entry;
-       struct cxl_sste *sste, *group = primary_group;
-
-       for (i = 0; i < 2; i++) {
-               for (entry = 0; entry < 8; entry++) {
-                       sste = group + entry;
-                       if (!(be64_to_cpu(sste->esid_data) & SLB_ESID_V))
-                               return sste;
-               }
-               if (!sec_hash)
-                       break;
-               group = secondary_group;
+       return ((sste->vsid_data == cpu_to_be64(slb->vsid)) &&
+               (sste->esid_data == cpu_to_be64(slb->esid)));
+}
+
+/*
+ * This finds a free SSTE for the given SLB, or returns NULL if it's already in
+ * the segment table.
+ */
+static struct cxl_sste* find_free_sste(struct cxl_context *ctx,
+                                      struct copro_slb *slb)
+{
+       struct cxl_sste *primary, *sste, *ret = NULL;
+       unsigned int mask = (ctx->sst_size >> 7) - 1; /* SSTP0[SegTableSize] */
+       unsigned int entry;
+       unsigned int hash;
+
+       if (slb->vsid & SLB_VSID_B_1T)
+               hash = (slb->esid >> SID_SHIFT_1T) & mask;
+       else /* 256M */
+               hash = (slb->esid >> SID_SHIFT) & mask;
+
+       primary = ctx->sstp + (hash << 3);
+
+       for (entry = 0, sste = primary; entry < 8; entry++, sste++) {
+               if (!ret && !(be64_to_cpu(sste->esid_data) & SLB_ESID_V))
+                       ret = sste;
+               if (sste_matches(sste, slb))
+                       return NULL;
        }
+       if (ret)
+               return ret;
+
        /* Nothing free, select an entry to cast out */
-       if (sec_hash && (*lru & 0x8))
-               sste = secondary_group + (*lru & 0x7);
-       else
-               sste = primary_group + (*lru & 0x7);
-       *lru = (*lru + 1) & 0xf;
+       ret = primary + ctx->sst_lru;
+       ctx->sst_lru = (ctx->sst_lru + 1) & 0x7;
 
-       return sste;
+       return ret;
 }
 
 static void cxl_load_segment(struct cxl_context *ctx, struct copro_slb *slb)
 {
        /* mask is the group index, we search primary and secondary here. */
-       unsigned int mask = (ctx->sst_size >> 7)-1; /* SSTP0[SegTableSize] */
-       bool sec_hash = 1;
        struct cxl_sste *sste;
-       unsigned int hash;
        unsigned long flags;
 
-
-       sec_hash = !!(cxl_p1n_read(ctx->afu, CXL_PSL_SR_An) & CXL_PSL_SR_An_SC);
-
-       if (slb->vsid & SLB_VSID_B_1T)
-               hash = (slb->esid >> SID_SHIFT_1T) & mask;
-       else /* 256M */
-               hash = (slb->esid >> SID_SHIFT) & mask;
-
        spin_lock_irqsave(&ctx->sste_lock, flags);
-       sste = find_free_sste(ctx->sstp + (hash << 3), sec_hash,
-                             ctx->sstp + ((~hash & mask) << 3), &ctx->sst_lru);
+       sste = find_free_sste(ctx, slb);
+       if (!sste)
+               goto out_unlock;
 
        pr_devel("CXL Populating SST[%li]: %#llx %#llx\n",
                        sste - ctx->sstp, slb->vsid, slb->esid);
 
        sste->vsid_data = cpu_to_be64(slb->vsid);
        sste->esid_data = cpu_to_be64(slb->esid);
+out_unlock:
        spin_unlock_irqrestore(&ctx->sste_lock, flags);
 }
 

diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c
index 623286a77114946aa60ae05c87bf21b781fd24b6..d47532e8f4f16ca4ebd64d3a1bd33fe106a5c5c8 100644 (file)
--- a/drivers/misc/cxl/native.c
+++ b/drivers/misc/cxl/native.c
@@ -417,7 +417,7 @@ static int attach_afu_directed(struct cxl_context *ctx, u64 wed, u64 amr)
        ctx->elem->haurp = 0; /* disable */
        ctx->elem->sdr = cpu_to_be64(mfspr(SPRN_SDR1));
 
-       sr = CXL_PSL_SR_An_SC;
+       sr = 0;
        if (ctx->master)
                sr |= CXL_PSL_SR_An_MP;
        if (mfspr(SPRN_LPCR) & LPCR_TC)
@@ -508,7 +508,7 @@ static int attach_dedicated(struct cxl_context *ctx, u64 wed, u64 amr)
        u64 sr;
        int rc;
 
-       sr = CXL_PSL_SR_An_SC;
+       sr = 0;
        set_endian(sr);
        if (ctx->master)
                sr |= CXL_PSL_SR_An_MP;