drm/i915/dsi: Drop bogus MIPI_SEQ_ASSERT_RESET before POWER_ON

intel_dsi_post_disable(), which does the MIPI_SEQ_ASSERT_RESET,
will always be called at some point before intel_dsi_pre_enable()
making the MIPI_SEQ_ASSERT_RESET in intel_dsi_pre_enable() redundant.

In addition, calling MIPI_SEQ_ASSERT_RESET in the enable path goes
against the VBT spec.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Bob Paauwe <bob.j.paauwe@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1488374106-4949-3-git-send-email-jani.nikula@intel.com

diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 234592c62141f10f980dc55b6719dfb4d3aa7956..f9b0767ef073cbb0be6e265694be170135491157 100644 (file)
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -811,7 +811,6 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder,
        /* put device in ready state */
        intel_dsi_device_ready(encoder);
 
-       intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_ASSERT_RESET);
        intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_POWER_ON);
        intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_DEASSERT_RESET);
        intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_INIT_OTP);