parisc: io: implement dummy relaxed accessor macros for writes

write{b,w,l,q}_relaxed are implemented by some architectures in order to
permit memory-mapped I/O accesses with weaker barrier semantics than the
non-relaxed variants.

This patch adds dummy macros for the write accessors to parisc, in the
same vein as the dummy definitions for the relaxed read accessors.

Cc: Helge Deller <deller@gmx.de>
Signed-off-by: Will Deacon <will.deacon@arm.com>

diff --git a/arch/parisc/include/asm/io.h b/arch/parisc/include/asm/io.h
index 1f6d2ae7aba59dfe2956dd6439569aa867f5b8a1..8cd0abf28ffbbe400a4f5e1c408573085184add2 100644 (file)
--- a/arch/parisc/include/asm/io.h
+++ b/arch/parisc/include/asm/io.h
@@ -217,10 +217,14 @@ static inline void writeq(unsigned long long q, volatile void __iomem *addr)
 #define writel writel
 #define writeq writeq
 
-#define readb_relaxed(addr) readb(addr)
-#define readw_relaxed(addr) readw(addr)
-#define readl_relaxed(addr) readl(addr)
-#define readq_relaxed(addr) readq(addr)
+#define readb_relaxed(addr)    readb(addr)
+#define readw_relaxed(addr)    readw(addr)
+#define readl_relaxed(addr)    readl(addr)
+#define readq_relaxed(addr)    readq(addr)
+#define writeb_relaxed(b, addr)        writeb(b, addr)
+#define writew_relaxed(w, addr)        writew(w, addr)
+#define writel_relaxed(l, addr)        writel(l, addr)
+#define writeq_relaxed(q, addr)        writeq(q, addr)
 
 #define mmiowb() do { } while (0)