]> git.kernelconcepts.de Git - karo-tx-linux.git/commitdiff
KVM: PPC: BOOKE: Emulate debug registers and exception
authorBharat Bhushan <Bharat.Bhushan@freescale.com>
Wed, 13 Aug 2014 09:09:44 +0000 (14:39 +0530)
committerAlexander Graf <agraf@suse.de>
Mon, 22 Sep 2014 08:11:33 +0000 (10:11 +0200)
This patch emulates debug registers and debug exception
to support guest using debug resource. This enables running
gdb/kgdb etc in guest.

On BOOKE architecture we cannot share debug resources between QEMU and
guest because:
    When QEMU is using debug resources then debug exception must
    be always enabled. To achieve this we set MSR_DE and also set
    MSRP_DEP so guest cannot change MSR_DE.

    When emulating debug resource for guest we want guest
    to control MSR_DE (enable/disable debug interrupt on need).

    So above mentioned two configuration cannot be supported
    at the same time. So the result is that we cannot share
    debug resources between QEMU and Guest on BOOKE architecture.

In the current design QEMU gets priority over guest, this means that if
QEMU is using debug resources then guest cannot use them and if guest is
using debug resource then QEMU can overwrite them.

Signed-off-by: Bharat Bhushan <Bharat.Bhushan@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
arch/powerpc/include/asm/kvm_ppc.h
arch/powerpc/include/asm/reg_booke.h
arch/powerpc/kvm/booke.c
arch/powerpc/kvm/booke_emulate.c

index fb86a2299d8afb9f635b71a92ef2e7345abdedff..05e58b6306018cb446ee90356aecc0889cead45b 100644 (file)
@@ -206,6 +206,9 @@ extern int kvmppc_xics_get_xive(struct kvm *kvm, u32 irq, u32 *server,
 extern int kvmppc_xics_int_on(struct kvm *kvm, u32 irq);
 extern int kvmppc_xics_int_off(struct kvm *kvm, u32 irq);
 
+void kvmppc_core_dequeue_debug(struct kvm_vcpu *vcpu);
+void kvmppc_core_queue_debug(struct kvm_vcpu *vcpu);
+
 union kvmppc_one_reg {
        u32     wval;
        u64     dval;
index 1d653308a33ca746b3ee043315fcf8ee13e795dc..16547efa2d5a3d0d46d5cce8ba132263c1d2565b 100644 (file)
  * DBSR bits which have conflicting definitions on true Book E versus IBM 40x.
  */
 #ifdef CONFIG_BOOKE
+#define DBSR_IDE       0x80000000      /* Imprecise Debug Event */
+#define DBSR_MRR       0x30000000      /* Most Recent Reset */
 #define DBSR_IC                0x08000000      /* Instruction Completion */
 #define DBSR_BT                0x04000000      /* Branch Taken */
 #define DBSR_IRPT      0x02000000      /* Exception Debug Event */
index 831c1b433b096773bbae1a7eecb21a1772d1aa66..b4e81e6be11af69b49ecfde3968ffbe1b6247ba1 100644 (file)
@@ -335,6 +335,16 @@ static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu)
        clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions);
 }
 
+void kvmppc_core_queue_debug(struct kvm_vcpu *vcpu)
+{
+       kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DEBUG);
+}
+
+void kvmppc_core_dequeue_debug(struct kvm_vcpu *vcpu)
+{
+       clear_bit(BOOKE_IRQPRIO_DEBUG, &vcpu->arch.pending_exceptions);
+}
+
 static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
 {
        kvmppc_set_srr0(vcpu, srr0);
@@ -818,7 +828,32 @@ static int kvmppc_handle_debug(struct kvm_run *run, struct kvm_vcpu *vcpu)
        struct debug_reg *dbg_reg = &(vcpu->arch.dbg_reg);
        u32 dbsr = vcpu->arch.dbsr;
 
-       /* Clear guest dbsr (vcpu->arch.dbsr) */
+       if (vcpu->guest_debug == 0) {
+               /*
+                * Debug resources belong to Guest.
+                * Imprecise debug event is not injected
+                */
+               if (dbsr & DBSR_IDE) {
+                       dbsr &= ~DBSR_IDE;
+                       if (!dbsr)
+                               return RESUME_GUEST;
+               }
+
+               if (dbsr && (vcpu->arch.shared->msr & MSR_DE) &&
+                           (vcpu->arch.dbg_reg.dbcr0 & DBCR0_IDM))
+                       kvmppc_core_queue_debug(vcpu);
+
+               /* Inject a program interrupt if trap debug is not allowed */
+               if ((dbsr & DBSR_TIE) && !(vcpu->arch.shared->msr & MSR_DE))
+                       kvmppc_core_queue_program(vcpu, ESR_PTR);
+
+               return RESUME_GUEST;
+       }
+
+       /*
+        * Debug resource owned by userspace.
+        * Clear guest dbsr (vcpu->arch.dbsr)
+        */
        vcpu->arch.dbsr = 0;
        run->debug.arch.status = 0;
        run->debug.arch.address = vcpu->arch.pc;
@@ -1350,6 +1385,11 @@ int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
        setup_timer(&vcpu->arch.wdt_timer, kvmppc_watchdog_func,
                    (unsigned long)vcpu);
 
+       /*
+        * Clear DBSR.MRR to avoid guest debug interrupt as
+        * this is of host interest
+        */
+       mtspr(SPRN_DBSR, DBSR_MRR);
        return 0;
 }
 
index 92bc668d3e08fac248a0cc018f82fc0eaee41be3..a82f64502de124c6df3a899cac632548353048d5 100644 (file)
@@ -131,6 +131,7 @@ int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
 int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
 {
        int emulated = EMULATE_DONE;
+       bool debug_inst = false;
 
        switch (sprn) {
        case SPRN_DEAR:
@@ -145,14 +146,128 @@ int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
        case SPRN_CSRR1:
                vcpu->arch.csrr1 = spr_val;
                break;
+       case SPRN_DSRR0:
+               vcpu->arch.dsrr0 = spr_val;
+               break;
+       case SPRN_DSRR1:
+               vcpu->arch.dsrr1 = spr_val;
+               break;
+       case SPRN_IAC1:
+               /*
+                * If userspace is debugging guest then guest
+                * can not access debug registers.
+                */
+               if (vcpu->guest_debug)
+                       break;
+
+               debug_inst = true;
+               vcpu->arch.dbg_reg.iac1 = spr_val;
+               break;
+       case SPRN_IAC2:
+               /*
+                * If userspace is debugging guest then guest
+                * can not access debug registers.
+                */
+               if (vcpu->guest_debug)
+                       break;
+
+               debug_inst = true;
+               vcpu->arch.dbg_reg.iac2 = spr_val;
+               break;
+#if CONFIG_PPC_ADV_DEBUG_IACS > 2
+       case SPRN_IAC3:
+               /*
+                * If userspace is debugging guest then guest
+                * can not access debug registers.
+                */
+               if (vcpu->guest_debug)
+                       break;
+
+               debug_inst = true;
+               vcpu->arch.dbg_reg.iac3 = spr_val;
+               break;
+       case SPRN_IAC4:
+               /*
+                * If userspace is debugging guest then guest
+                * can not access debug registers.
+                */
+               if (vcpu->guest_debug)
+                       break;
+
+               debug_inst = true;
+               vcpu->arch.dbg_reg.iac4 = spr_val;
+               break;
+#endif
+       case SPRN_DAC1:
+               /*
+                * If userspace is debugging guest then guest
+                * can not access debug registers.
+                */
+               if (vcpu->guest_debug)
+                       break;
+
+               debug_inst = true;
+               vcpu->arch.dbg_reg.dac1 = spr_val;
+               break;
+       case SPRN_DAC2:
+               /*
+                * If userspace is debugging guest then guest
+                * can not access debug registers.
+                */
+               if (vcpu->guest_debug)
+                       break;
+
+               debug_inst = true;
+               vcpu->arch.dbg_reg.dac2 = spr_val;
+               break;
        case SPRN_DBCR0:
+               /*
+                * If userspace is debugging guest then guest
+                * can not access debug registers.
+                */
+               if (vcpu->guest_debug)
+                       break;
+
+               debug_inst = true;
+               spr_val &= (DBCR0_IDM | DBCR0_IC | DBCR0_BT | DBCR0_TIE |
+                       DBCR0_IAC1 | DBCR0_IAC2 | DBCR0_IAC3 | DBCR0_IAC4  |
+                       DBCR0_DAC1R | DBCR0_DAC1W | DBCR0_DAC2R | DBCR0_DAC2W);
+
                vcpu->arch.dbg_reg.dbcr0 = spr_val;
                break;
        case SPRN_DBCR1:
+               /*
+                * If userspace is debugging guest then guest
+                * can not access debug registers.
+                */
+               if (vcpu->guest_debug)
+                       break;
+
+               debug_inst = true;
                vcpu->arch.dbg_reg.dbcr1 = spr_val;
                break;
+       case SPRN_DBCR2:
+               /*
+                * If userspace is debugging guest then guest
+                * can not access debug registers.
+                */
+               if (vcpu->guest_debug)
+                       break;
+
+               debug_inst = true;
+               vcpu->arch.dbg_reg.dbcr2 = spr_val;
+               break;
        case SPRN_DBSR:
+               /*
+                * If userspace is debugging guest then guest
+                * can not access debug registers.
+                */
+               if (vcpu->guest_debug)
+                       break;
+
                vcpu->arch.dbsr &= ~spr_val;
+               if (!(vcpu->arch.dbsr & ~DBSR_IDE))
+                       kvmppc_core_dequeue_debug(vcpu);
                break;
        case SPRN_TSR:
                kvmppc_clr_tsr_bits(vcpu, spr_val);
@@ -265,6 +380,10 @@ int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
                emulated = EMULATE_FAIL;
        }
 
+       if (debug_inst) {
+               current->thread.debug = vcpu->arch.dbg_reg;
+               switch_booke_debug_regs(&vcpu->arch.dbg_reg);
+       }
        return emulated;
 }
 
@@ -291,6 +410,32 @@ int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)
        case SPRN_CSRR1:
                *spr_val = vcpu->arch.csrr1;
                break;
+       case SPRN_DSRR0:
+               *spr_val = vcpu->arch.dsrr0;
+               break;
+       case SPRN_DSRR1:
+               *spr_val = vcpu->arch.dsrr1;
+               break;
+       case SPRN_IAC1:
+               *spr_val = vcpu->arch.dbg_reg.iac1;
+               break;
+       case SPRN_IAC2:
+               *spr_val = vcpu->arch.dbg_reg.iac2;
+               break;
+#if CONFIG_PPC_ADV_DEBUG_IACS > 2
+       case SPRN_IAC3:
+               *spr_val = vcpu->arch.dbg_reg.iac3;
+               break;
+       case SPRN_IAC4:
+               *spr_val = vcpu->arch.dbg_reg.iac4;
+               break;
+#endif
+       case SPRN_DAC1:
+               *spr_val = vcpu->arch.dbg_reg.dac1;
+               break;
+       case SPRN_DAC2:
+               *spr_val = vcpu->arch.dbg_reg.dac2;
+               break;
        case SPRN_DBCR0:
                *spr_val = vcpu->arch.dbg_reg.dbcr0;
                if (vcpu->guest_debug)
@@ -299,6 +444,9 @@ int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)
        case SPRN_DBCR1:
                *spr_val = vcpu->arch.dbg_reg.dbcr1;
                break;
+       case SPRN_DBCR2:
+               *spr_val = vcpu->arch.dbg_reg.dbcr2;
+               break;
        case SPRN_DBSR:
                *spr_val = vcpu->arch.dbsr;
                break;