_start = .;
*(.start)
*(.text)
+ *(.text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata)
sprintf(system_utsname.machine, "%s%c", list->arch_name, ENDIANNESS);
sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS);
elf_hwcap = list->elf_hwcap;
+#ifndef CONFIG_ARM_THUMB
+ elf_hwcap &= ~HWCAP_THUMB;
+#endif
+#ifndef CONFIG_VFP
+ elf_hwcap &= ~HWCAP_VFP;
+#endif
cpu_proc_init();
}
#include <asm/arch/mux.h>
#include <asm/arch/gpio.h>
-extern void omap_nop_release(struct device *dev);
-
-/*-------------------------------------------------------------------------*/
-
#if defined(CONFIG_OMAP1610_IR) || defined(CONFIG_OMAP161O_IR_MODULE)
static u64 irda_dmamask = 0xffffffff;
.name = "omap1610-ir",
.id = -1,
.dev = {
- .release = omap_nop_release,
.dma_mask = &irda_dmamask,
},
};
static struct platform_device omap_rtc_device = {
.name = "omap_rtc",
.id = -1,
- .dev = {
- .release = omap_nop_release,
- },
.num_resources = ARRAY_SIZE(rtc_resources),
.resource = rtc_resources,
};
static struct platform_device sti_device = {
.name = "sti",
.id = -1,
- .dev = {
- .release = omap_nop_release,
- },
.num_resources = ARRAY_SIZE(sti_resources),
.resource = sti_resources,
};
#include <asm/arch/mux.h>
#include <asm/arch/gpio.h>
-extern void omap_nop_release(struct device *dev);
-
-/*-------------------------------------------------------------------------*/
-
#if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
#define OMAP2_I2C_BASE2 0x48072000
static struct platform_device omap_i2c_device2 = {
.name = "i2c_omap",
.id = 2,
- .dev = {
- .release = omap_nop_release,
- },
.num_resources = ARRAY_SIZE(i2c_resources2),
.resource = i2c_resources2,
};
static struct platform_device sti_device = {
.name = "sti",
.id = -1,
- .dev = {
- .release = omap_nop_release,
- },
.num_resources = ARRAY_SIZE(sti_resources),
.resource = sti_resources,
};
source = S3C2410_MISCCR_CLK0_UPLL;
else if (parent == &clk_f)
source = S3C2410_MISCCR_CLK0_FCLK;
+ else if (parent == &clk_h)
+ source = S3C2410_MISCCR_CLK0_HCLK;
else if (parent == &clk_p)
source = S3C2410_MISCCR_CLK0_PCLK;
else if (clk == &s3c24xx_clkout0 && parent == &s3c24xx_dclk0)
else
return -EINVAL;
+ clk->parent = parent;
+
if (clk == &s3c24xx_dclk0)
mask = S3C2410_MISCCR_CLK0_MASK;
else {
#include <asm/arch/nand.h>
+#include "common-smdk.h"
#include "devs.h"
#include "pm.h"
#include <linux/config.h>
#include <linux/linkage.h>
#include <linux/init.h>
-#include <asm/hardware.h>
+#include <asm/memory.h>
#include <asm/page.h>
#include "proc-macros.S"
*/
#define CACHE_DLIMIT (CACHE_DSIZE * 4)
+ .data
+flush_base:
+ .long FLUSH_BASE
+ .text
+
/*
* flush_user_cache_all()
*
mov ip, #0
mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
__flush_whole_cache:
- mov r0, #FLUSH_BASE
- add r1, r0, #CACHE_DSIZE
-1: ldr r2, [r0], #32
- cmp r0, r1
+ ldr r3, =flush_base
+ ldr r1, [r3, #0]
+ eor r1, r1, #CACHE_DSIZE
+ str r1, [r3, #0]
+ add r2, r1, #CACHE_DSIZE
+1: ldr r3, [r1], #32
+ cmp r1, r2
+ blo 1b
+#ifdef FLUSH_BASE_MINICACHE
+ add r2, r2, #FLUSH_BASE_MINICACHE - FLUSH_BASE
+ sub r1, r2, #512 @ only 512 bytes
+1: ldr r3, [r1], #32
+ cmp r1, r2
blo 1b
+#endif
mcr p15, 0, ip, c7, c10, 4 @ drain write buffer
mov pc, lr
* - flags - vma_area_struct flags describing address space
*/
ENTRY(v4wb_flush_user_cache_range)
+ mov ip, #0
sub r3, r1, r0 @ calculate total size
tst r2, #VM_EXEC @ executable region?
mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
#include <asm/mach-types.h>
#include <asm/setup.h>
+#include <asm/sizes.h>
#include <asm/tlb.h>
#include <asm/mach/arch.h>
#ifdef FLUSH_BASE
map.pfn = __phys_to_pfn(FLUSH_BASE_PHYS);
map.virtual = FLUSH_BASE;
- map.length = PGDIR_SIZE;
+ map.length = SZ_1M;
map.type = MT_CACHECLEAN;
create_mapping(&map);
#endif
#ifdef FLUSH_BASE_MINICACHE
- map.pfn = __phys_to_pfn(FLUSH_BASE_PHYS + PGDIR_SIZE);
+ map.pfn = __phys_to_pfn(FLUSH_BASE_PHYS + SZ_1M);
map.virtual = FLUSH_BASE_MINICACHE;
- map.length = PGDIR_SIZE;
+ map.length = SZ_1M;
map.type = MT_MINICLEAN;
create_mapping(&map);
#endif
* the cache line size of the I and D cache
*/
#define DCACHELINESIZE 32
-#define FLUSH_OFFSET 32768
- .macro flush_110_dcache rd, ra, re
- ldr \rd, =flush_base
- ldr \ra, [\rd]
- eor \ra, \ra, #FLUSH_OFFSET
- str \ra, [\rd]
- add \re, \ra, #16384 @ only necessary for 16k
-1001: ldr \rd, [\ra], #DCACHELINESIZE
- teq \re, \ra
- bne 1001b
- .endm
-
- .data
-flush_base:
- .long FLUSH_BASE
.text
/*
*/
.align 5
ENTRY(cpu_sa110_switch_mm)
- flush_110_dcache r3, ip, r1
- mov r1, #0
- mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache
- mcr p15, 0, r1, c7, c10, 4 @ drain WB
+ str lr, [sp, #-4]!
+ bl v4wb_flush_kern_cache_all @ clears IP
mcr p15, 0, r0, c2, c0, 0 @ load page table pointer
- mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs
- mov pc, lr
+ mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
+ ldr pc, [sp], #4
/*
* cpu_sa110_set_pte(ptep, pte)
* the cache line size of the I and D cache
*/
#define DCACHELINESIZE 32
-#define FLUSH_OFFSET 32768
-
- .macro flush_1100_dcache rd, ra, re
- ldr \rd, =flush_base
- ldr \ra, [\rd]
- eor \ra, \ra, #FLUSH_OFFSET
- str \ra, [\rd]
- add \re, \ra, #8192 @ only necessary for 8k
-1001: ldr \rd, [\ra], #DCACHELINESIZE
- teq \re, \ra
- bne 1001b
-#ifdef FLUSH_BASE_MINICACHE
- add \ra, \ra, #FLUSH_BASE_MINICACHE - FLUSH_BASE
- add \re, \ra, #512 @ only 512 bytes
-1002: ldr \rd, [\ra], #DCACHELINESIZE
- teq \re, \ra
- bne 1002b
-#endif
- .endm
-
- .data
-flush_base:
- .long FLUSH_BASE
- .text
__INIT
stmfd sp!, {lr}
mov ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
msr cpsr_c, ip
- flush_1100_dcache r0, r1, r2 @ clean caches
- mov r0, #0
- mcr p15, 0, r0, c15, c2, 2 @ Disable clock switching
+ bl v4wb_flush_kern_cache_all
+ mcr p15, 0, ip, c15, c2, 2 @ Disable clock switching
mrc p15, 0, r0, c1, c0, 0 @ ctrl register
bic r0, r0, #0x1000 @ ...i............
bic r0, r0, #0x000e @ ............wca.
*/
.align 5
ENTRY(cpu_sa1100_switch_mm)
- flush_1100_dcache r3, ip, r1
- mov ip, #0
- mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
+ str lr, [sp, #-4]!
+ bl v4wb_flush_kern_cache_all @ clears IP
mcr p15, 0, ip, c9, c0, 0 @ invalidate RB
- mcr p15, 0, ip, c7, c10, 4 @ drain WB
mcr p15, 0, r0, c2, c0, 0 @ load page table pointer
mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
- mov pc, lr
+ ldr pc, [sp], #4
/*
* cpu_sa1100_set_pte(ptep, pte)
if (p->id == idno &&
strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
clk = p;
- break;
+ goto found;
}
}
}
}
+found:
mutex_unlock(&clocks_mutex);
return clk;
#include <asm/arch/gpio.h>
#include <asm/arch/menelaus.h>
-
-void omap_nop_release(struct device *dev)
-{
- /* Nothing */
-}
-
-/*-------------------------------------------------------------------------*/
-
#if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
#define OMAP1_I2C_BASE 0xfffb3800
static struct platform_device omap_i2c_device1 = {
.name = "i2c_omap",
.id = 1,
- .dev = {
- .release = omap_nop_release,
- },
.num_resources = ARRAY_SIZE(i2c_resources1),
.resource = i2c_resources1,
};
.name = "mmci-omap",
.id = 1,
.dev = {
- .release = omap_nop_release,
.dma_mask = &mmc1_dmamask,
.platform_data = &mmc1_conf,
},
.name = "mmci-omap",
.id = 2,
.dev = {
- .release = omap_nop_release,
.dma_mask = &mmc2_dmamask,
.platform_data = &mmc2_conf,
},
static struct platform_device omap_uwire_device = {
.name = "omap_uwire",
.id = -1,
- .dev = {
- .release = omap_nop_release,
- },
.num_resources = ARRAY_SIZE(uwire_resources),
.resource = uwire_resources,
};
static struct platform_device omap_wdt_device = {
.name = "omap_wdt",
.id = -1,
- .dev = {
- .release = omap_nop_release,
- },
.num_resources = ARRAY_SIZE(wdt_resources),
.resource = wdt_resources,
};
static struct platform_device omap_rng_device = {
.name = "omap_rng",
.id = -1,
- .dev = {
- .release = omap_nop_release,
- },
.num_resources = ARRAY_SIZE(rng_resources),
.resource = rng_resources,
};
struct vfp_double vdm;
u32 d, exceptions = 0;
int rmode = fpscr & FPSCR_RMODE_MASK;
+ int tm;
vfp_double_unpack(&vdm, vfp_get_double(dm));
vfp_double_dump("VDM", &vdm);
/*
* Do we have denormalised number?
*/
- if (vfp_double_type(&vdm) & VFP_DENORMAL)
+ tm = vfp_double_type(&vdm);
+ if (tm & VFP_DENORMAL)
exceptions |= FPSCR_IDC;
- if (vdm.exponent >= 1023 + 32) {
+ if (tm & VFP_NAN) {
+ d = 0;
+ exceptions |= FPSCR_IOC;
+ } else if (vdm.exponent >= 1023 + 32) {
d = 0x7fffffff;
if (vdm.sign)
d = ~d;
{
u32 op = inst & FOP_MASK;
u32 exceptions = 0;
- unsigned int dd = vfp_get_sd(inst);
- unsigned int dn = vfp_get_sn(inst);
- unsigned int dm = vfp_get_sm(inst);
+ unsigned int dd = vfp_get_dd(inst);
+ unsigned int dn = vfp_get_dn(inst);
+ unsigned int dm = vfp_get_dm(inst);
unsigned int vecitr, veclen, vecstride;
u32 (*fop)(int, int, s32, u32);
pr_debug("VFP: vecstride=%u veclen=%u\n", vecstride,
(veclen >> FPSCR_LENGTH_BIT) + 1);
- fop = (op == FOP_EXT) ? fop_extfns[dn] : fop_fns[FOP_TO_IDX(op)];
+ fop = (op == FOP_EXT) ? fop_extfns[FEXT_TO_IDX(inst)] : fop_fns[FOP_TO_IDX(op)];
if (!fop)
goto invalid;
u32 except;
if (op == FOP_EXT)
- pr_debug("VFP: itr%d (d%u.%u) = op[%u] (d%u.%u)\n",
+ pr_debug("VFP: itr%d (d%u) = op[%u] (d%u)\n",
vecitr >> FPSCR_LENGTH_BIT,
- dd >> 1, dd & 1, dn,
- dm >> 1, dm & 1);
+ dd, dn, dm);
else
- pr_debug("VFP: itr%d (d%u.%u) = (d%u.%u) op[%u] (d%u.%u)\n",
+ pr_debug("VFP: itr%d (d%u) = (d%u) op[%u] (d%u)\n",
vecitr >> FPSCR_LENGTH_BIT,
- dd >> 1, dd & 1,
- dn >> 1, dn & 1,
- FOP_TO_IDX(op),
- dm >> 1, dm & 1);
+ dd, dn, FOP_TO_IDX(op), dm);
except = fop(dd, dn, dm, fpscr);
pr_debug("VFP: itr%d: exceptions=%08x\n",
.globl vfp_get_double
vfp_get_double:
- mov r0, r0, lsr #1
add pc, pc, r0, lsl #3
mov r0, r0
.irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
- mrrc p10, 1, r0, r1, c\dr @ fmrrd r0, r1, d\dr
+ mrrc p11, 1, r0, r1, c\dr @ fmrrd r0, r1, d\dr
mov pc, lr
.endr
.globl vfp_put_double
vfp_put_double:
- mov r0, r0, lsr #1
add pc, pc, r0, lsl #3
mov r0, r0
.irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
- mcrr p10, 1, r1, r2, c\dr @ fmrrd r1, r2, d\dr
+ mcrr p11, 1, r1, r2, c\dr @ fmdrr r1, r2, d\dr
mov pc, lr
.endr
struct vfp_single vsm;
u32 d, exceptions = 0;
int rmode = fpscr & FPSCR_RMODE_MASK;
+ int tm;
vfp_single_unpack(&vsm, m);
vfp_single_dump("VSM", &vsm);
/*
* Do we have a denormalised number?
*/
+ tm = vfp_single_type(&vsm);
if (vfp_single_type(&vsm) & VFP_DENORMAL)
exceptions |= FPSCR_IDC;
- if (vsm.exponent >= 127 + 32) {
+ if (tm & VFP_NAN) {
+ d = 0;
+ exceptions |= FPSCR_IOC;
+ } else if (vsm.exponent >= 127 + 32) {
/*
* m >= 2^31-2^7: invalid
*/
pr_debug("VFP: vecstride=%u veclen=%u\n", vecstride,
(veclen >> FPSCR_LENGTH_BIT) + 1);
- fop = (op == FOP_EXT) ? fop_extfns[sn] : fop_fns[FOP_TO_IDX(op)];
+ fop = (op == FOP_EXT) ? fop_extfns[FEXT_TO_IDX(inst)] : fop_fns[FOP_TO_IDX(op)];
if (!fop)
goto invalid;
#define SCREEN_END 0xdfc00000
#define SCREEN_BASE 0xdf800000
-#define FLUSH_BASE 0xdf000000
-
#define VIDC_BASE (void __iomem *)0xe0400000
#define IOMD_BASE IOMEM(0xe0200000)
#define IOC_BASE IOMEM(0xe0200000)
#define FLOPPYDMA_BASE IOMEM(0xe002a000)
#define PCIO_BASE IOMEM(0xe0010000)
-#define FLUSH_BASE_PHYS 0x00000000 /* ROM */
-
#define vidc_writel(val) __raw_writel(val, VIDC_BASE)
/* in/out bias for the ISA slot region */
#define __virt_to_bus(x) __virt_to_phys(x)
#define __bus_to_virt(x) __phys_to_virt(x)
+/*
+ * Cache flushing area - ROM
+ */
+#define FLUSH_BASE_PHYS 0x00000000
+#define FLUSH_BASE 0xdf000000
+
#endif
#define UART_SHIFT 2
#define FLOW_CONTROL
-#include <asm/hardware/debug-8250.h>
+#include <asm/hardware/debug-8250.S>
/*
* RAM definitions
*/
-#define FLUSH_BASE_PHYS 0x40000000
-#define FLUSH_BASE 0xdf000000
-
#define UNCACHEABLE_ADDR 0xff000000 /* IRQ_STAT */
#endif
#define __virt_to_bus(x) (x)
#define __bus_to_virt(x) (x)
+/*
+ * Cache flushing area - SRAM
+ */
+#define FLUSH_BASE_PHYS 0x40000000
+#define FLUSH_BASE 0xdf000000
+
#endif
#include <linux/serial_reg.h>
-#define SERIAL_BASE ((unsigned char *)0xfe000be0)
+#define SERIAL_BASE ((unsigned char *)0xf0000be0)
/*
* This does not append a newline
#define PCICFG0_SIZE 0x01000000
#define PCICFG0_BASE 0xfa000000
-#define FLUSH_SIZE 0x00100000
-#define FLUSH_BASE 0xf9000000
-
#define PCIMEM_SIZE 0x01000000
#define PCIMEM_BASE 0xf0000000
#define PCIMEM_SIZE 0x80000000
#define PCIMEM_BASE 0x80000000
-#define FLUSH_SIZE 0x00100000
-#define FLUSH_BASE 0x7e000000
-
#define WFLUSH_SIZE 0x01000000
#define WFLUSH_BASE 0x7d000000
#define XBUS_SWITCH_J17_11 ((*XBUS_SWITCH) & (1 << 5))
#define XBUS_SWITCH_J17_9 ((*XBUS_SWITCH) & (1 << 6))
-#define FLUSH_BASE_PHYS 0x50000000
#define UNCACHEABLE_ADDR (ARMCSR_BASE + 0x108)
#define TASK_SIZE UL(0xbf000000)
#define PAGE_OFFSET UL(0xc0000000)
+/*
+ * Cache flushing area.
+ */
+#define FLUSH_BASE 0xf9000000
+
#elif defined(CONFIG_ARCH_CO285)
/* Task size and page offset at 1.5GB */
#define TASK_SIZE UL(0x5f000000)
#define PAGE_OFFSET UL(0x60000000)
+/*
+ * Cache flushing area.
+ */
+#define FLUSH_BASE 0x7e000000
+
#else
#error "Undefined footbridge architecture"
*/
#define TASK_UNMAPPED_BASE ((TASK_SIZE + 0x01000000) / 3)
+#define FLUSH_BASE_PHYS 0x50000000
+
#endif
tst \rx, #1 @ mmu enabled?
ldreq \rx, =IXP23XX_PERIPHERAL_PHYS @ physical
ldrne \rx, =IXP23XX_PERIPHERAL_VIRT @ virtual
+#ifdef __ARMEB__
+ orr \rx, \rx, #0x00000003
+#endif
.endm
#define UART_SHIFT 2
#define ISA_SIZE 0x20000000
#define ISA_BASE 0xe0000000
-#define FLUSH_BASE_PHYS 0x40000000 /* ROM */
-#define FLUSH_BASE 0xdf000000
-
#define PCIO_BASE IO_BASE
#endif
#define __virt_to_bus(x) __virt_to_phys(x)
#define __bus_to_virt(x) __phys_to_virt(x)
+/*
+ * Cache flushing area - ROM
+ */
+#define FLUSH_BASE_PHYS 0x40000000
+#define FLUSH_BASE 0xdf000000
+
#endif
#define SCREEN_END 0xdfc00000
#define SCREEN_BASE 0xdf800000
-#define FLUSH_BASE 0xdf000000
#define UNCACHEABLE_ADDR 0xdf010000
/*
#define PCIO_BASE IOMEM(0xe0010000)
#define FLOPPYDMA_BASE IOMEM(0xe002a000)
-#define FLUSH_BASE_PHYS 0x00000000 /* ROM */
-
#define vidc_writel(val) __raw_writel(val, VIDC_BASE)
#define IO_EC_EASI_BASE 0x81400000
#define __virt_to_bus(x) __virt_to_phys(x)
#define __bus_to_virt(x) __phys_to_virt(x)
+/*
+ * Cache flushing area - ROM
+ */
+#define FLUSH_BASE_PHYS 0x00000000
+#define FLUSH_BASE 0xdf000000
+
#endif
#include <linux/config.h>
-/* Flushing areas */
-#define FLUSH_BASE_PHYS 0xe0000000 /* SA1100 zero bank */
-#define FLUSH_BASE 0xf5000000
-#define FLUSH_BASE_MINICACHE 0xf5800000
#define UNCACHEABLE_ADDR 0xfa050000
#endif
+/*
+ * Cache flushing area - SA1100 zero bank
+ */
+#define FLUSH_BASE_PHYS 0xe0000000
+#define FLUSH_BASE 0xf5000000
+#define FLUSH_BASE_MINICACHE 0xf5100000
+
#endif
*/
#define IO_BASE 0xe0000000
-/*
- * RAM definitions
- */
-#define FLUSH_BASE_PHYS 0x80000000
-
#else
#define IO_BASE 0
#define ROMCARD_SIZE 0x08000000
#define ROMCARD_START 0x10000000
-#define FLUSH_BASE 0xdf000000
#define PCIO_BASE 0xe0000000
#define __virt_to_bus(x) __virt_to_phys(x)
#define __bus_to_virt(x) __phys_to_virt(x)
+/*
+ * Cache flushing area
+ */
+#define FLUSH_BASE_PHYS 0x80000000
+#define FLUSH_BASE 0xdf000000
+
#endif
struct vfp_hard_struct {
__u64 fpregs[16];
+#if __LINUX_ARM_ARCH__ < 6
__u32 fpmx_state;
+#endif
__u32 fpexc;
__u32 fpscr;
/*
* virt_addr_valid(k) indicates whether a virtual address is valid
*/
#ifndef CONFIG_DISCONTIGMEM
-#define ARCH_PFN_OFFSET (PHYS_PFN_OFFSET)
+#define ARCH_PFN_OFFSET PHYS_PFN_OFFSET
#define pfn_valid(pfn) ((pfn) >= PHYS_PFN_OFFSET && (pfn) < (PHYS_PFN_OFFSET + max_mapnr))
-#define virt_to_page(kaddr) (pfn_to_page(__pa(kaddr) >> PAGE_SHIFT))
+#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
#define virt_addr_valid(kaddr) ((unsigned long)(kaddr) >= PAGE_OFFSET && (unsigned long)(kaddr) < (unsigned long)high_memory)
#define PHYS_TO_NID(addr) (0)
* around in memory.
*/
#include <linux/numa.h>
-#define arch_pfn_to_nid(pfn) (PFN_TO_NID(pfn))
-#define arch_local_page_offset(pfn, nid) (LOCAL_MAP_NR((pfn) << PAGE_OFFSET))
+#define arch_pfn_to_nid(pfn) PFN_TO_NID(pfn)
+#define arch_local_page_offset(pfn, nid) LOCAL_MAP_NR((pfn) << PAGE_SHIFT)
#define pfn_valid(pfn) \
({ \
@ read all the working registers back into the VFP
.macro VFPFLDMIA, base
+#if __LINUX_ARM_ARCH__ < 6
LDC p11, cr0, [\base],#33*4 @ FLDMIAX \base!, {d0-d15}
+#else
+ LDC p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d0-d15}
+#endif
.endm
@ write all the working registers out of the VFP
.macro VFPFSTMIA, base
+#if __LINUX_ARM_ARCH__ < 6
STC p11, cr0, [\base],#33*4 @ FSTMIAX \base!, {d0-d15}
+#else
+ STC p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d0-d15}
+#endif
.endm
projects / karo-tx-linux.git / commitdiff