]> git.kernelconcepts.de Git - karo-tx-linux.git/commitdiff
ARM: SAMSUNG: Move all platforms to new clocksource driver
authorTomasz Figa <tomasz.figa@gmail.com>
Sun, 28 Apr 2013 00:25:01 +0000 (02:25 +0200)
committerTomasz Figa <tomasz.figa@gmail.com>
Mon, 5 Aug 2013 23:21:46 +0000 (01:21 +0200)
This patch moves all Samsung platforms using PWM clocksource from legacy
samsung-time to new samsung-pwm-timer driver.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Mark Brown <broonie@linaro.org>
Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
12 files changed:
arch/arm/Kconfig
arch/arm/mach-s3c24xx/Kconfig
arch/arm/mach-s3c24xx/common.c
arch/arm/mach-s3c64xx/Kconfig
arch/arm/mach-s3c64xx/common.c
arch/arm/mach-s5p64x0/Kconfig
arch/arm/mach-s5p64x0/common.c
arch/arm/mach-s5pc100/Kconfig
arch/arm/mach-s5pc100/common.c
arch/arm/mach-s5pv210/Kconfig
arch/arm/mach-s5pv210/common.c
arch/arm/plat-samsung/s5p-irq.c

index 43594d5116efce810798b763da8f3e7ea6891c93..341b756508c5e2d3e3b218ac5335b4b64a695757 100644 (file)
@@ -700,7 +700,7 @@ config ARCH_S3C24XX
        select ARCH_HAS_CPUFREQ
        select ARCH_REQUIRE_GPIOLIB
        select CLKDEV_LOOKUP
-       select CLKSRC_MMIO
+       select CLKSRC_SAMSUNG_PWM
        select GENERIC_CLOCKEVENTS
        select GPIO_SAMSUNG
        select HAVE_CLK
@@ -723,7 +723,7 @@ config ARCH_S3C64XX
        select ARCH_REQUIRE_GPIOLIB
        select ARM_VIC
        select CLKDEV_LOOKUP
-       select CLKSRC_MMIO
+       select CLKSRC_SAMSUNG_PWM
        select CPU_V6
        select GENERIC_CLOCKEVENTS
        select GPIO_SAMSUNG
@@ -748,7 +748,7 @@ config ARCH_S3C64XX
 config ARCH_S5P64X0
        bool "Samsung S5P6440 S5P6450"
        select CLKDEV_LOOKUP
-       select CLKSRC_MMIO
+       select CLKSRC_SAMSUNG_PWM
        select CPU_V6
        select GENERIC_CLOCKEVENTS
        select GPIO_SAMSUNG
@@ -767,7 +767,7 @@ config ARCH_S5PC100
        bool "Samsung S5PC100"
        select ARCH_REQUIRE_GPIOLIB
        select CLKDEV_LOOKUP
-       select CLKSRC_MMIO
+       select CLKSRC_SAMSUNG_PWM
        select CPU_V7
        select GENERIC_CLOCKEVENTS
        select GPIO_SAMSUNG
@@ -787,7 +787,7 @@ config ARCH_S5PV210
        select ARCH_HAS_HOLES_MEMORYMODEL
        select ARCH_SPARSEMEM_ENABLE
        select CLKDEV_LOOKUP
-       select CLKSRC_MMIO
+       select CLKSRC_SAMSUNG_PWM
        select CPU_V7
        select GENERIC_CLOCKEVENTS
        select GPIO_SAMSUNG
index 7791ac76f945264e0d1cf2f88e3cbe49103b80e5..dba2173e70f3aceb69947dd06f9653b39deadbb7 100644 (file)
@@ -30,7 +30,6 @@ config CPU_S3C2410
        select S3C2410_CLOCK
        select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ
        select S3C2410_PM if PM
-       select SAMSUNG_HRT
        select SAMSUNG_WDT_RESET
        help
          Support for S3C2410 and S3C2410A family from the S3C24XX line
@@ -42,7 +41,6 @@ config CPU_S3C2412
        select CPU_LLSERIAL_S3C2440
        select S3C2412_DMA if S3C24XX_DMA
        select S3C2412_PM if PM
-       select SAMSUNG_HRT
        help
          Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line
 
@@ -54,7 +52,6 @@ config CPU_S3C2416
        select S3C2443_COMMON
        select S3C2443_DMA if S3C24XX_DMA
        select SAMSUNG_CLKSRC
-       select SAMSUNG_HRT
        help
          Support for the S3C2416 SoC from the S3C24XX line
 
@@ -65,7 +62,6 @@ config CPU_S3C2440
        select S3C2410_CLOCK
        select S3C2410_PM if PM
        select S3C2440_DMA if S3C24XX_DMA
-       select SAMSUNG_HRT
        help
          Support for S3C2440 Samsung Mobile CPU based systems.
 
@@ -75,7 +71,6 @@ config CPU_S3C2442
        select CPU_LLSERIAL_S3C2440
        select S3C2410_CLOCK
        select S3C2410_PM if PM
-       select SAMSUNG_HRT
        help
          Support for S3C2442 Samsung Mobile CPU based systems.
 
@@ -91,7 +86,6 @@ config CPU_S3C2443
        select S3C2443_COMMON
        select S3C2443_DMA if S3C24XX_DMA
        select SAMSUNG_CLKSRC
-       select SAMSUNG_HRT
        help
          Support for the S3C2443 SoC from the S3C24XX line
 
index e5e7d7dee6f2bf2b3c2ded5d35ca72645aef8986..457261c984338815c7620c8c8eeed9c150b61e8d 100644 (file)
@@ -245,6 +245,22 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
        samsung_pwm_set_platdata(&s3c24xx_pwm_variant);
 }
 
+void __init samsung_set_timer_source(unsigned int event, unsigned int source)
+{
+       s3c24xx_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+       s3c24xx_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
+}
+
+void __init samsung_timer_init(void)
+{
+       unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
+               IRQ_TIMER0, IRQ_TIMER1, IRQ_TIMER2, IRQ_TIMER3, IRQ_TIMER4,
+       };
+
+       samsung_pwm_clocksource_init(S3C_VA_TIMER,
+                                       timer_irqs, &s3c24xx_pwm_variant);
+}
+
 /* Serial port registrations */
 
 #define S3C2410_PA_UART0      (S3C24XX_PA_UART)
index 20578536aec74bf83af3815cccb734e2c0cc7a88..041da5172423742277e778fdbb861dfee98c7e1a 100644 (file)
@@ -17,13 +17,11 @@ config PLAT_S3C64XX
 # Configuration options for the S3C6410 CPU
 
 config CPU_S3C6400
-       select SAMSUNG_HRT
        bool
        help
          Enable S3C6400 CPU support
 
 config CPU_S3C6410
-       select SAMSUNG_HRT
        bool
        help
          Enable S3C6410 CPU support
index ca05e61f401c5dbeec318fc85ea898537e201428..73d79cf5e14118b1e99861c5bd79d6ffc9517164 100644 (file)
@@ -43,7 +43,6 @@
 #include <plat/pm.h>
 #include <plat/gpio-cfg.h>
 #include <plat/irq-uart.h>
-#include <plat/irq-vic-timer.h>
 #include <plat/pwm-core.h>
 #include <plat/regs-irqtype.h>
 #include <plat/regs-serial.h>
@@ -158,6 +157,23 @@ static struct samsung_pwm_variant s3c64xx_pwm_variant = {
        .tclk_mask      = (1 << 7) | (1 << 6) | (1 << 5),
 };
 
+void __init samsung_set_timer_source(unsigned int event, unsigned int source)
+{
+       s3c64xx_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+       s3c64xx_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
+}
+
+void __init samsung_timer_init(void)
+{
+       unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
+               IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
+               IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
+       };
+
+       samsung_pwm_clocksource_init(S3C_VA_TIMER,
+                                       timer_irqs, &s3c64xx_pwm_variant);
+}
+
 /* read cpu identification code */
 
 void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
@@ -206,9 +222,6 @@ void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
        /* initialise the pair of VICs */
        vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME);
        vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME);
-
-       /* add the timer sub-irqs */
-       s3c_init_vic_timer_irq(5, IRQ_TIMER0);
 }
 
 #define eint_offset(irq)       ((irq) - IRQ_EINT(0))
index 5a707bdb9ea032172f5eef696d17593ffce3825f..bb2111b3751e78086ee9bf7d19e26af2f169dd8d 100644 (file)
@@ -11,14 +11,12 @@ config CPU_S5P6440
        bool
        select S5P_SLEEP if PM
        select SAMSUNG_DMADEV
-       select SAMSUNG_HRT
        select SAMSUNG_WAKEMASK if PM
        help
          Enable S5P6440 CPU support
 
 config CPU_S5P6450
        bool
-       select SAMSUNG_HRT
        select S5P_SLEEP if PM
        select SAMSUNG_DMADEV
        select SAMSUNG_WAKEMASK if PM
index 49687f277108f44225e745028fb3a1e2debc4492..42e14f2e7ca7d892c3d035bdf64870c0c70c74e1 100644 (file)
@@ -166,6 +166,23 @@ static struct samsung_pwm_variant s5p64x0_pwm_variant = {
        .tclk_mask      = 0,
 };
 
+void __init samsung_set_timer_source(unsigned int event, unsigned int source)
+{
+       s5p64x0_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+       s5p64x0_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
+}
+
+void __init samsung_timer_init(void)
+{
+       unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
+               IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
+               IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
+       };
+
+       samsung_pwm_clocksource_init(S3C_VA_TIMER,
+                                       timer_irqs, &s5p64x0_pwm_variant);
+}
+
 /*
  * s5p64x0_map_io
  *
index 2f456a4533bafaa332dfaf548f469aec7cf64b7e..15170be97a74c0ecc69dd481d087205912095837 100644 (file)
@@ -11,7 +11,6 @@ config CPU_S5PC100
        bool
        select S5P_EXT_INT
        select SAMSUNG_DMADEV
-       select SAMSUNG_HRT
        help
          Enable S5PC100 CPU support
 
index e0600afc587e51988c44207f7971e0cdce7dcd5c..c5a8eeacf81c1ab8d2b012c9d7d6ddbc93d342e5 100644 (file)
@@ -141,6 +141,23 @@ static struct samsung_pwm_variant s5pc100_pwm_variant = {
        .tclk_mask      = (1 << 5),
 };
 
+void __init samsung_set_timer_source(unsigned int event, unsigned int source)
+{
+       s5pc100_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+       s5pc100_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
+}
+
+void __init samsung_timer_init(void)
+{
+       unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
+               IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
+               IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
+       };
+
+       samsung_pwm_clocksource_init(S3C_VA_TIMER,
+                                       timer_irqs, &s5pc100_pwm_variant);
+}
+
 /*
  * s5pc100_map_io
  *
index 0963283a7c5dc886ccb5e8746c66752cefa1cf2a..caaedafbbf5f0b0501a9027af04805f3c451631c 100644 (file)
@@ -15,7 +15,6 @@ config CPU_S5PV210
        select S5P_PM if PM
        select S5P_SLEEP if PM
        select SAMSUNG_DMADEV
-       select SAMSUNG_HRT
        help
          Enable S5PV210 CPU support
 
index 306b29aa58bc33fdc2b4c50fc259c91298bead5a..26027a29b8a155e5e37b60f45e9da93cc60b8b6d 100644 (file)
@@ -157,6 +157,23 @@ static struct samsung_pwm_variant s5pv210_pwm_variant = {
        .tclk_mask      = (1 << 5),
 };
 
+void __init samsung_set_timer_source(unsigned int event, unsigned int source)
+{
+       s5pv210_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+       s5pv210_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
+}
+
+void __init samsung_timer_init(void)
+{
+       unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
+               IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
+               IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
+       };
+
+       samsung_pwm_clocksource_init(S3C_VA_TIMER,
+                                       timer_irqs, &s5pv210_pwm_variant);
+}
+
 /*
  * s5pv210_map_io
  *
index ff1a76011b1ed2a2e2e547399fd230decc63d956..6729cb2aab56cf232a12d142937f2ee70ddf6f4d 100644 (file)
@@ -19,7 +19,6 @@
 #include <mach/map.h>
 #include <plat/regs-timer.h>
 #include <plat/cpu.h>
-#include <plat/irq-vic-timer.h>
 
 void __init s5p_init_irq(u32 *vic, u32 num_vic)
 {
@@ -30,6 +29,4 @@ void __init s5p_init_irq(u32 *vic, u32 num_vic)
        for (irq = 0; irq < num_vic; irq++)
                vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0);
 #endif
-
-       s3c_init_vic_timer_irq(5, IRQ_TIMER0);
 }