]> git.kernelconcepts.de Git - karo-tx-linux.git/commitdiff
ARM: shmobile: r8a7790 dtsi: Add CPG/MSTP Clock Domain
authorGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 4 Aug 2015 12:28:10 +0000 (14:28 +0200)
committerSimon Horman <horms+renesas@verge.net.au>
Wed, 12 Aug 2015 02:15:27 +0000 (11:15 +0900)
Add an appropriate "#power-domain-cells" property to the cpg_clocks
device node, to create the CPG/MSTP Clock Domain.

Add "power-domains" properties to all device nodes for devices that are
part of the CPG/MSTP Clock Domain and can be power-managed through an
MSTP clock.  This applies to most on-SoC devices, which have a
one-to-one mapping from SoC device to DT device node.  Notable
exceptions are the "display" and "sound" nodes, which represent multiple
SoC devices, each having their own MSTP clocks.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/boot/dts/r8a7790.dtsi

index 5b2952d5c700fabe833587c4372171a869757d36..a0b2a79cbfbdf0b42286dea205fe6751fdaf57f6 100644 (file)
                #interrupt-cells = <2>;
                interrupt-controller;
                clocks = <&mstp9_clks R8A7790_CLK_GPIO0>;
+               power-domains = <&cpg_clocks>;
        };
 
        gpio1: gpio@e6051000 {
                #interrupt-cells = <2>;
                interrupt-controller;
                clocks = <&mstp9_clks R8A7790_CLK_GPIO1>;
+               power-domains = <&cpg_clocks>;
        };
 
        gpio2: gpio@e6052000 {
                #interrupt-cells = <2>;
                interrupt-controller;
                clocks = <&mstp9_clks R8A7790_CLK_GPIO2>;
+               power-domains = <&cpg_clocks>;
        };
 
        gpio3: gpio@e6053000 {
                #interrupt-cells = <2>;
                interrupt-controller;
                clocks = <&mstp9_clks R8A7790_CLK_GPIO3>;
+               power-domains = <&cpg_clocks>;
        };
 
        gpio4: gpio@e6054000 {
                #interrupt-cells = <2>;
                interrupt-controller;
                clocks = <&mstp9_clks R8A7790_CLK_GPIO4>;
+               power-domains = <&cpg_clocks>;
        };
 
        gpio5: gpio@e6055000 {
                #interrupt-cells = <2>;
                interrupt-controller;
                clocks = <&mstp9_clks R8A7790_CLK_GPIO5>;
+               power-domains = <&cpg_clocks>;
        };
 
        thermal@e61f0000 {
                reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
                interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp5_clks R8A7790_CLK_THERMAL>;
+               power-domains = <&cpg_clocks>;
        };
 
        timer {
                             <0 143 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp1_clks R8A7790_CLK_CMT0>;
                clock-names = "fck";
+               power-domains = <&cpg_clocks>;
 
                renesas,channels-mask = <0x60>;
 
                             <0 127 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp3_clks R8A7790_CLK_CMT1>;
                clock-names = "fck";
+               power-domains = <&cpg_clocks>;
 
                renesas,channels-mask = <0xff>;
 
                             <0 2 IRQ_TYPE_LEVEL_HIGH>,
                             <0 3 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp4_clks R8A7790_CLK_IRQC>;
+               power-domains = <&cpg_clocks>;
        };
 
        dmac0: dma-controller@e6700000 {
                                "ch12", "ch13", "ch14";
                clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC0>;
                clock-names = "fck";
+               power-domains = <&cpg_clocks>;
                #dma-cells = <1>;
                dma-channels = <15>;
        };
                                "ch12", "ch13", "ch14";
                clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC1>;
                clock-names = "fck";
+               power-domains = <&cpg_clocks>;
                #dma-cells = <1>;
                dma-channels = <15>;
        };
                                "ch12";
                clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC0>;
                clock-names = "fck";
+               power-domains = <&cpg_clocks>;
                #dma-cells = <1>;
                dma-channels = <13>;
        };
                                "ch12";
                clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC1>;
                clock-names = "fck";
+               power-domains = <&cpg_clocks>;
                #dma-cells = <1>;
                dma-channels = <13>;
        };
                              0 109 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "ch0", "ch1";
                clocks = <&mstp3_clks R8A7790_CLK_USBDMAC0>;
+               power-domains = <&cpg_clocks>;
                #dma-cells = <1>;
                dma-channels = <2>;
        };
                              0 110 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "ch0", "ch1";
                clocks = <&mstp3_clks R8A7790_CLK_USBDMAC1>;
+               power-domains = <&cpg_clocks>;
                #dma-cells = <1>;
                dma-channels = <2>;
        };
                reg = <0 0xe6508000 0 0x40>;
                interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7790_CLK_I2C0>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                reg = <0 0xe6518000 0 0x40>;
                interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7790_CLK_I2C1>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                reg = <0 0xe6530000 0 0x40>;
                interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7790_CLK_I2C2>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                reg = <0 0xe6540000 0 0x40>;
                interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7790_CLK_I2C3>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
                dmas = <&dmac0 0x61>, <&dmac0 0x62>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clocks = <&mstp3_clks R8A7790_CLK_IIC1>;
                dmas = <&dmac0 0x65>, <&dmac0 0x66>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clocks = <&mstp3_clks R8A7790_CLK_IIC2>;
                dmas = <&dmac0 0x69>, <&dmac0 0x6a>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>;
                dmas = <&dmac0 0x77>, <&dmac0 0x78>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clocks = <&mstp3_clks R8A7790_CLK_MMCIF0>;
                dmas = <&dmac0 0xd1>, <&dmac0 0xd2>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                reg-io-width = <4>;
                status = "disabled";
                max-frequency = <97500000>;
                clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>;
                dmas = <&dmac0 0xe1>, <&dmac0 0xe2>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                reg-io-width = <4>;
                status = "disabled";
                max-frequency = <97500000>;
                clocks = <&mstp3_clks R8A7790_CLK_SDHI0>;
                dmas = <&dmac1 0xcd>, <&dmac1 0xce>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clocks = <&mstp3_clks R8A7790_CLK_SDHI1>;
                dmas = <&dmac1 0xc9>, <&dmac1 0xca>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clocks = <&mstp3_clks R8A7790_CLK_SDHI2>;
                dmas = <&dmac1 0xc1>, <&dmac1 0xc2>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clocks = <&mstp3_clks R8A7790_CLK_SDHI3>;
                dmas = <&dmac1 0xd3>, <&dmac1 0xd4>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0x21>, <&dmac0 0x22>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0x25>, <&dmac0 0x26>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0x27>, <&dmac0 0x28>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0x3d>, <&dmac0 0x3e>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0x19>, <&dmac0 0x1a>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0x1d>, <&dmac0 0x1e>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0x29>, <&dmac0 0x2a>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0x2d>, <&dmac0 0x2e>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0x39>, <&dmac0 0x3a>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0x4d>, <&dmac0 0x4e>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                reg = <0 0xee700000 0 0x400>;
                interrupts = <0 162 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp8_clks R8A7790_CLK_ETHER>;
+               power-domains = <&cpg_clocks>;
                phy-mode = "rmii";
                #address-cells = <1>;
                #size-cells = <0>;
                reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
                interrupts = <0 163 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp8_clks R8A7790_CLK_ETHERAVB>;
+               power-domains = <&cpg_clocks>;
                #address-cells = <1>;
                #size-cells = <0>;
                status = "disabled";
                reg = <0 0xee300000 0 0x2000>;
                interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp8_clks R8A7790_CLK_SATA0>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                reg = <0 0xee500000 0 0x2000>;
                interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp8_clks R8A7790_CLK_SATA1>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                reg = <0 0xe6590000 0 0x100>;
                interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
-               renesas,buswait = <4>;
-               phys = <&usb0 1>;
-               phy-names = "usb";
                dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
                       <&usb_dmac1 0>, <&usb_dmac1 1>;
                dma-names = "ch0", "ch1", "ch2", "ch3";
+               power-domains = <&cpg_clocks>;
+               renesas,buswait = <4>;
+               phys = <&usb0 1>;
+               phy-names = "usb";
                status = "disabled";
        };
 
                #size-cells = <0>;
                clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
                clock-names = "usbhs";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
 
                usb0: usb-channel@0 {
 
        vin0: video@e6ef0000 {
                compatible = "renesas,vin-r8a7790";
-               clocks = <&mstp8_clks R8A7790_CLK_VIN0>;
                reg = <0 0xe6ef0000 0 0x1000>;
                interrupts = <0 188 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp8_clks R8A7790_CLK_VIN0>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
        vin1: video@e6ef1000 {
                compatible = "renesas,vin-r8a7790";
-               clocks = <&mstp8_clks R8A7790_CLK_VIN1>;
                reg = <0 0xe6ef1000 0 0x1000>;
                interrupts = <0 189 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp8_clks R8A7790_CLK_VIN1>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
        vin2: video@e6ef2000 {
                compatible = "renesas,vin-r8a7790";
-               clocks = <&mstp8_clks R8A7790_CLK_VIN2>;
                reg = <0 0xe6ef2000 0 0x1000>;
                interrupts = <0 190 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp8_clks R8A7790_CLK_VIN2>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
        vin3: video@e6ef3000 {
                compatible = "renesas,vin-r8a7790";
-               clocks = <&mstp8_clks R8A7790_CLK_VIN3>;
                reg = <0 0xe6ef3000 0 0x1000>;
                interrupts = <0 191 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp8_clks R8A7790_CLK_VIN3>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                reg = <0 0xfe920000 0 0x8000>;
                interrupts = <0 266 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp1_clks R8A7790_CLK_VSP1_R>;
+               power-domains = <&cpg_clocks>;
 
                renesas,has-sru;
                renesas,#rpf = <5>;
                reg = <0 0xfe928000 0 0x8000>;
                interrupts = <0 267 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>;
+               power-domains = <&cpg_clocks>;
 
                renesas,has-lut;
                renesas,has-sru;
                reg = <0 0xfe930000 0 0x8000>;
                interrupts = <0 246 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU0>;
+               power-domains = <&cpg_clocks>;
 
                renesas,has-lif;
                renesas,has-lut;
                reg = <0 0xfe938000 0 0x8000>;
                interrupts = <0 247 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU1>;
+               power-domains = <&cpg_clocks>;
 
                renesas,has-lif;
                renesas,has-lut;
                clocks = <&mstp9_clks R8A7790_CLK_RCAN0>,
                         <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>;
                clock-names = "clkp1", "clkp2", "can_clk";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clocks = <&mstp9_clks R8A7790_CLK_RCAN1>,
                         <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>;
                clock-names = "clkp1", "clkp2", "can_clk";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                reg = <0 0xfe980000 0 0x10300>;
                interrupts = <0 272 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp1_clks R8A7790_CLK_JPU>;
+               power-domains = <&cpg_clocks>;
        };
 
        clocks {
                        clock-output-names = "main", "pll0", "pll1", "pll3",
                                             "lb", "qspi", "sdh", "sd0", "sd1",
                                             "z", "rcan", "adsp";
+                       #power-domain-cells = <0>;
                };
 
                /* Variable factor clocks */
                clocks = <&mstp9_clks R8A7790_CLK_QSPI_MOD>;
                dmas = <&dmac0 0x17>, <&dmac0 0x18>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                num-cs = <1>;
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
                dmas = <&dmac0 0x51>, <&dmac0 0x52>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                #address-cells = <1>;
                #size-cells = <0>;
                status = "disabled";
                clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
                dmas = <&dmac0 0x55>, <&dmac0 0x56>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                #address-cells = <1>;
                #size-cells = <0>;
                status = "disabled";
                clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
                dmas = <&dmac0 0x41>, <&dmac0 0x42>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                #address-cells = <1>;
                #size-cells = <0>;
                status = "disabled";
                clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
                dmas = <&dmac0 0x45>, <&dmac0 0x46>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                #address-cells = <1>;
                #size-cells = <0>;
                status = "disabled";
                reg = <0 0xee000000 0 0xc00>;
                interrupts = <0 101 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp3_clks R8A7790_CLK_SSUSB>;
+               power-domains = <&cpg_clocks>;
                phys = <&usb2 1>;
                phy-names = "usb";
                status = "disabled";
        pci0: pci@ee090000 {
                compatible = "renesas,pci-r8a7790";
                device_type = "pci";
-               clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
                reg = <0 0xee090000 0 0xc00>,
                      <0 0xee080000 0 0x1100>;
                interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
 
                bus-range = <0 0>;
        pci1: pci@ee0b0000 {
                compatible = "renesas,pci-r8a7790";
                device_type = "pci";
-               clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
                reg = <0 0xee0b0000 0 0xc00>,
                      <0 0xee0a0000 0 0x1100>;
                interrupts = <0 112 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
 
                bus-range = <1 1>;
                compatible = "renesas,pci-r8a7790";
                device_type = "pci";
                clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
+               power-domains = <&cpg_clocks>;
                reg = <0 0xee0d0000 0 0xc00>,
                      <0 0xee0c0000 0 0x1100>;
                interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-map = <0 0 0 0 &gic 0 116 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp3_clks R8A7790_CLK_PCIEC>, <&pcie_bus_clk>;
                clock-names = "pcie", "pcie_bus";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };