]> git.kernelconcepts.de Git - karo-tx-linux.git/commitdiff
Merge tag 'fixes-nc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm...
authorLinus Torvalds <torvalds@linux-foundation.org>
Thu, 2 May 2013 15:56:55 +0000 (08:56 -0700)
committerLinus Torvalds <torvalds@linux-foundation.org>
Thu, 2 May 2013 15:56:55 +0000 (08:56 -0700)
Pull ARM SoC non-critical fixes from Olof Johansson:
 "Here is a collection of fixes (and some intermixed cleanups) that were
  considered less important and thus not included in the later parts of
  the 3.9-rc cycle.

  It's a bit all over the map, contents wise.  A series of ux500 fixes
  and cleanups, a bunch of various fixes for OMAP and tegra, and some
  for Freescale i.MX and even Qualcomm MSM.

  Note that there's also a patch on this branch to globally turn off
  -Wmaybe-uninitialized when building with -Os.  It's been posted
  several times by Arnd and no dissent was raised, but nobody seemed
  interested to pick it up.  So here it is, as the topmost patch."

* tag 'fixes-nc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (70 commits)
  Turn off -Wmaybe-uninitialized when building with -Os
  ARM: orion5x: include linux/cpu.h
  ARM: tegra: call cpu_do_idle from C code
  ARM: u300: fix ages old copy/paste bug
  ARM: OMAP2+: add dependencies on ARCH_MULTI_V6/V7
  ARM: tegra: solve adr range issue with THUMB2_KERNEL enabled
  ARM: tegra: fix relocation truncated error when THUMB2_KERNEL enabled
  ARM: tegra: fix build error when THUMB2_KERNEL enabled
  ARM: msm: Fix uncompess.h tx underrun check
  ARM: vexpress: Remove A9 PMU compatible values for non-A9 platforms
  ARM: cpuimx27 and mbimx27: prepend CONFIG_ to Kconfig macro
  ARM: OMAP2+: fix typo "CONFIG_BRIDGE_DVFS"
  ARM: OMAP1: remove "config MACH_OMAP_HTCWIZARD"
  ARM: mach-imx: mach-imx6q: Fix sparse warnings
  ARM: mach-imx: src: Include "common.h
  ARM: mach-imx: gpc: Include "common.h"
  ARM: mach-imx: avic: Staticize *avic_base
  ARM: mach-imx: tzic: Staticize *tzic_base
  ARM: mach-imx: clk: Include "clk.h"
  ARM: mach-imx: clk-busy: Staticize clk_busy_mux_ops
  ...

16 files changed:
1  2 
Makefile
arch/arm/boot/dts/dbx5x0.dtsi
arch/arm/mach-imx/clk-busy.c
arch/arm/mach-imx/src.c
arch/arm/mach-omap2/io.c
arch/arm/mach-omap2/omap_hwmod.c
arch/arm/mach-omap2/omap_hwmod.h
arch/arm/mach-omap2/timer.c
arch/arm/mach-orion5x/common.c
arch/arm/mach-tegra/cpuidle-tegra30.c
arch/arm/mach-ux500/board-mop500-regulators.c
arch/arm/mach-ux500/board-mop500-regulators.h
arch/arm/mach-ux500/board-mop500.c
arch/arm/mach-ux500/cpu-db8500.c
drivers/clk/tegra/clk-tegra20.c
drivers/net/ethernet/smsc/smsc911x.c

diff --combined Makefile
index d3528f6aa9388343bc0acbbd729815e13c80c08f,8004421a93d134ac85b5512ae190f44c370ceb9a..4572f106e30b69fbd5628088b58fbd54133cc09a
+++ b/Makefile
@@@ -1,7 -1,7 +1,7 @@@
  VERSION = 3
  PATCHLEVEL = 9
  SUBLEVEL = 0
 -EXTRAVERSION = -rc5
 +EXTRAVERSION =
  NAME = Unicycling Gorilla
  
  # *DOCUMENTATION*
@@@ -513,8 -513,7 +513,8 @@@ ifeq ($(KBUILD_EXTMOD),
  # Carefully list dependencies so we do not try to build scripts twice
  # in parallel
  PHONY += scripts
 -scripts: scripts_basic include/config/auto.conf include/config/tristate.conf
 +scripts: scripts_basic include/config/auto.conf include/config/tristate.conf \
 +       asm-generic
        $(Q)$(MAKE) $(build)=$(@)
  
  # Objects we will link into vmlinux / subdirs we need to visit
@@@ -571,7 -570,7 +571,7 @@@ endif # $(dot-config
  all: vmlinux
  
  ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE
- KBUILD_CFLAGS += -Os
+ KBUILD_CFLAGS += -Os $(call cc-disable-warning,maybe-uninitialized,)
  else
  KBUILD_CFLAGS += -O2
  endif
@@@ -1332,11 -1331,11 +1332,11 @@@ kernelversion
  # Clear a bunch of variables before executing the submake
  tools/: FORCE
        $(Q)mkdir -p $(objtree)/tools
 -      $(Q)$(MAKE) LDFLAGS= MAKEFLAGS= O=$(objtree) subdir=tools -C $(src)/tools/
 +      $(Q)$(MAKE) LDFLAGS= MAKEFLAGS="$(filter --j% -j,$(MAKEFLAGS))" O=$(objtree) subdir=tools -C $(src)/tools/
  
  tools/%: FORCE
        $(Q)mkdir -p $(objtree)/tools
 -      $(Q)$(MAKE) LDFLAGS= MAKEFLAGS= O=$(objtree) subdir=tools -C $(src)/tools/ $*
 +      $(Q)$(MAKE) LDFLAGS= MAKEFLAGS="$(filter --j% -j,$(MAKEFLAGS))" O=$(objtree) subdir=tools -C $(src)/tools/ $*
  
  # Single targets
  # ---------------------------------------------------------------------------
index aaa63d0a80968b20abd4660492fb2af1ed463072,3e0aa13487b3d73fc6b661702e28a7d80a97d3cc..b6bc4ff17f26481be92cff13ab9d2e46880ead41
  
                prcmu: prcmu@80157000 {
                        compatible = "stericsson,db8500-prcmu";
-                       reg = <0x80157000 0x1000>, <0x801b0000 0x8000>, <0x801b8000 0x1000>;
 -                      reg = <0x80157000 0x2000>;
 -                      reg-names = "prcmu";
++                      reg = <0x80157000 0x2000>, <0x801b0000 0x8000>, <0x801b8000 0x1000>;
 +                      reg-names = "prcmu", "prcmu-tcpm", "prcmu-tcdm";
                        interrupts = <0 47 0x4>;
                        #address-cells = <1>;
                        #size-cells = <1>;
                        compatible = "regulator-gpio";
  
                        regulator-min-microvolt = <1800000>;
-                       regulator-max-microvolt = <2600000>;
+                       regulator-max-microvolt = <2900000>;
                        regulator-name = "mmci-reg";
                        regulator-type = "voltage";
  
+                       startup-delay-us = <100>;
+                       enable-active-high;
                        states = <1800000 0x1
                                  2900000 0x0>;
  
index 85b728cc27abc4db782328f9a0524cb08abc759a,6809c99abb4063b828c5173831a3911476507803..4bb1bc419b798e5323652d36c0cf1413e45ccf31
@@@ -147,7 -147,7 +147,7 @@@ static int clk_busy_mux_set_parent(stru
        return ret;
  }
  
- struct clk_ops clk_busy_mux_ops = {
+ static struct clk_ops clk_busy_mux_ops = {
        .get_parent = clk_busy_mux_get_parent,
        .set_parent = clk_busy_mux_set_parent,
  };
@@@ -169,7 -169,7 +169,7 @@@ struct clk *imx_clk_busy_mux(const cha
  
        busy->mux.reg = reg;
        busy->mux.shift = shift;
 -      busy->mux.width = width;
 +      busy->mux.mask = BIT(width) - 1;
        busy->mux.lock = &imx_ccm_lock;
        busy->mux_ops = &clk_mux_ops;
  
diff --combined arch/arm/mach-imx/src.c
index 09a742f8c7aba31be0155076699eb192f4aa251e,648634d9b6c39e6e28dc7368535e39b0b4f6626a..324731c2a4414949e7dc1cb065172b6d22d8ab37
@@@ -16,6 -16,7 +16,7 @@@
  #include <linux/of_address.h>
  #include <linux/smp.h>
  #include <asm/smp_plat.h>
+ #include "common.h"
  
  #define SRC_SCR                               0x000
  #define SRC_GPR1                      0x020
@@@ -43,18 -44,6 +44,18 @@@ void imx_set_cpu_jump(int cpu, void *ju
                       src_base + SRC_GPR1 + cpu * 8);
  }
  
 +u32 imx_get_cpu_arg(int cpu)
 +{
 +      cpu = cpu_logical_map(cpu);
 +      return readl_relaxed(src_base + SRC_GPR1 + cpu * 8 + 4);
 +}
 +
 +void imx_set_cpu_arg(int cpu, u32 arg)
 +{
 +      cpu = cpu_logical_map(cpu);
 +      writel_relaxed(arg, src_base + SRC_GPR1 + cpu * 8 + 4);
 +}
 +
  void imx_src_prepare_restart(void)
  {
        u32 val;
diff --combined arch/arm/mach-omap2/io.c
index 5c445ca1e271ca9f14c9e4fd008035ee449ad9b4,2bef5a7e6af806a05495d4e7d40de312bd6e160a..e210fa830f8d7d076fdec7a23202bdab8b1a2089
  #include "prm3xxx.h"
  #include "prm44xx.h"
  
 +/*
 + * omap_clk_init: points to a function that does the SoC-specific
 + * clock initializations
 + */
 +int (*omap_clk_init)(void);
 +
  /*
   * The machine specific code may provide the extra mapping besides the
   * default mapping provided here.
@@@ -277,6 -271,14 +277,14 @@@ static struct map_desc omap54xx_io_desc
                .length         = L4_PER_54XX_SIZE,
                .type           = MT_DEVICE,
        },
+ #ifdef CONFIG_OMAP4_ERRATA_I688
+       {
+               .virtual        = OMAP4_SRAM_VA,
+               .pfn            = __phys_to_pfn(OMAP4_SRAM_PA),
+               .length         = PAGE_SIZE,
+               .type           = MT_MEMORY_SO,
+       },
+ #endif
  };
  #endif
  
@@@ -329,6 -331,7 +337,7 @@@ void __init omap4_map_io(void
  void __init omap5_map_io(void)
  {
        iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc));
+       omap_barriers_init();
  }
  #endif
  /*
@@@ -403,7 -406,7 +412,7 @@@ void __init omap2420_init_early(void
        omap242x_clockdomains_init();
        omap2420_hwmod_init();
        omap_hwmod_init_postsetup();
 -      omap2420_clk_init();
 +      omap_clk_init = omap2420_clk_init;
  }
  
  void __init omap2420_init_late(void)
@@@ -433,7 -436,7 +442,7 @@@ void __init omap2430_init_early(void
        omap243x_clockdomains_init();
        omap2430_hwmod_init();
        omap_hwmod_init_postsetup();
 -      omap2430_clk_init();
 +      omap_clk_init = omap2430_clk_init;
  }
  
  void __init omap2430_init_late(void)
@@@ -468,7 -471,7 +477,7 @@@ void __init omap3_init_early(void
        omap3xxx_clockdomains_init();
        omap3xxx_hwmod_init();
        omap_hwmod_init_postsetup();
 -      omap3xxx_clk_init();
 +      omap_clk_init = omap3xxx_clk_init;
  }
  
  void __init omap3430_init_early(void)
@@@ -506,7 -509,7 +515,7 @@@ void __init ti81xx_init_early(void
        omap3xxx_clockdomains_init();
        omap3xxx_hwmod_init();
        omap_hwmod_init_postsetup();
 -      omap3xxx_clk_init();
 +      omap_clk_init = omap3xxx_clk_init;
  }
  
  void __init omap3_init_late(void)
@@@ -574,7 -577,7 +583,7 @@@ void __init am33xx_init_early(void
        am33xx_clockdomains_init();
        am33xx_hwmod_init();
        omap_hwmod_init_postsetup();
 -      am33xx_clk_init();
 +      omap_clk_init = am33xx_clk_init;
  }
  #endif
  
@@@ -599,7 -602,7 +608,7 @@@ void __init omap4430_init_early(void
        omap44xx_clockdomains_init();
        omap44xx_hwmod_init();
        omap_hwmod_init_postsetup();
 -      omap4xxx_clk_init();
 +      omap_clk_init = omap4xxx_clk_init;
  }
  
  void __init omap4430_init_late(void)
index e512253601c82dbb54cc46a498d5e218c81e1bf7,e5cafed8ef2584dc20a86bbbed5821e6063384c0..9553c9907d40930296f3af1103bf319d4f9d2ff9
  #include <linux/spinlock.h>
  #include <linux/slab.h>
  #include <linux/bootmem.h>
 +#include <linux/cpu.h>
  
  #include <asm/system_misc.h>
  
@@@ -611,8 -610,6 +611,6 @@@ static int _enable_wakeup(struct omap_h
  
        /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  
-       oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
        return 0;
  }
  
@@@ -646,8 -643,6 +644,6 @@@ static int _disable_wakeup(struct omap_
  
        /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  
-       oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
        return 0;
  }
  
@@@ -1369,9 -1364,7 +1365,9 @@@ static void _enable_sysc(struct omap_hw
        }
  
        if (sf & SYSC_HAS_MIDLEMODE) {
 -              if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
 +              if (oh->flags & HWMOD_FORCE_MSTANDBY) {
 +                      idlemode = HWMOD_IDLEMODE_FORCE;
 +              } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
                        idlemode = HWMOD_IDLEMODE_NO;
                } else {
                        if (sf & SYSC_HAS_ENAWAKEUP)
@@@ -1443,8 -1436,7 +1439,8 @@@ static void _idle_sysc(struct omap_hwmo
        }
  
        if (sf & SYSC_HAS_MIDLEMODE) {
 -              if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
 +              if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
 +                  (oh->flags & HWMOD_FORCE_MSTANDBY)) {
                        idlemode = HWMOD_IDLEMODE_FORCE;
                } else {
                        if (sf & SYSC_HAS_ENAWAKEUP)
@@@ -2158,7 -2150,7 +2154,7 @@@ static int _enable(struct omap_hwmod *o
        if (soc_ops.enable_module)
                soc_ops.enable_module(oh);
        if (oh->flags & HWMOD_BLOCK_WFI)
 -              disable_hlt();
 +              cpu_idle_poll_ctrl(true);
  
        if (soc_ops.update_context_lost)
                soc_ops.update_context_lost(oh);
@@@ -2222,7 -2214,7 +2218,7 @@@ static int _idle(struct omap_hwmod *oh
        _del_initiator_dep(oh, mpu_oh);
  
        if (oh->flags & HWMOD_BLOCK_WFI)
 -              enable_hlt();
 +              cpu_idle_poll_ctrl(false);
        if (soc_ops.disable_module)
                soc_ops.disable_module(oh);
  
@@@ -2332,7 -2324,7 +2328,7 @@@ static int _shutdown(struct omap_hwmod 
                _del_initiator_dep(oh, mpu_oh);
                /* XXX what about the other system initiators here? dma, dsp */
                if (oh->flags & HWMOD_BLOCK_WFI)
 -                      enable_hlt();
 +                      cpu_idle_poll_ctrl(false);
                if (soc_ops.disable_module)
                        soc_ops.disable_module(oh);
                _disable_clocks(oh);
index d5dc935f6060446aee42a250eddbe6140e9aa42a,28f4dea0512e85f50eb29deb69b4c613f420540f..fe5962921f07244e602429b758f0d5ccecb7398c
@@@ -427,8 -427,8 +427,8 @@@ struct omap_hwmod_omap4_prcm 
   *
   * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out
   *     of idle, rather than relying on module smart-idle
 - * HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out
 - *     of standby, rather than relying on module smart-standby
 + * HWMOD_SWSUP_MSTANDBY: omap_hwmod code should manually bring module in and
 + *     out of standby, rather than relying on module smart-standby
   * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for
   *     SDRAM controller, etc. XXX probably belongs outside the main hwmod file
   *     XXX Should be HWMOD_SETUP_NO_RESET
   *     correctly, or this is being abused to deal with some PM latency
   *     issues -- but we're currently suffering from a shortage of
   *     folks who are able to track these issues down properly.
 + * HWMOD_FORCE_MSTANDBY: Always keep MIDLEMODE bits cleared so that device
 + *     is kept in force-standby mode. Failing to do so causes PM problems
 + *     with musb on OMAP3630 at least. Note that musb has a dedicated register
 + *     to control MSTANDBY signal when MIDLEMODE is set to force-standby.
   */
  #define HWMOD_SWSUP_SIDLE                     (1 << 0)
  #define HWMOD_SWSUP_MSTANDBY                  (1 << 1)
  #define HWMOD_16BIT_REG                               (1 << 8)
  #define HWMOD_EXT_OPT_MAIN_CLK                        (1 << 9)
  #define HWMOD_BLOCK_WFI                               (1 << 10)
 +#define HWMOD_FORCE_MSTANDBY                  (1 << 11)
  
  /*
   * omap_hwmod._int_flags definitions
   * These are for internal use only and are managed by the omap_hwmod code.
   *
   * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module
-  * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP
   * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached
   * _HWMOD_SKIP_ENABLE: set if hwmod enabled during init (HWMOD_INIT_NO_IDLE) -
   *     causes the first call to _enable() to only update the pinmux
   */
  #define _HWMOD_NO_MPU_PORT                    (1 << 0)
- #define _HWMOD_WAKEUP_ENABLED                 (1 << 1)
- #define _HWMOD_SYSCONFIG_LOADED                       (1 << 2)
- #define _HWMOD_SKIP_ENABLE                    (1 << 3)
+ #define _HWMOD_SYSCONFIG_LOADED                       (1 << 1)
+ #define _HWMOD_SKIP_ENABLE                    (1 << 2)
  
  /*
   * omap_hwmod._state definitions
index f62b509ed08de75e6f4191bc8cf43dc130c7cb2d,773733fccd835439bc3d0d96c8826473ff134467..d00d89c93f1ce539591868f2f9307759dcdd30fc
@@@ -62,6 -62,7 +62,7 @@@
  #define OMAP2_MPU_SOURCE      "sys_ck"
  #define OMAP3_MPU_SOURCE      OMAP2_MPU_SOURCE
  #define OMAP4_MPU_SOURCE      "sys_clkin_ck"
+ #define OMAP5_MPU_SOURCE      "sys_clkin"
  #define OMAP2_32K_SOURCE      "func_32k_ck"
  #define OMAP3_32K_SOURCE      "omap_32k_fck"
  #define OMAP4_32K_SOURCE      "sys_32k_ck"
@@@ -487,7 -488,7 +488,7 @@@ static void __init realtime_counter_ini
                pr_err("%s: ioremap failed\n", __func__);
                return;
        }
-       sys_clk = clk_get(NULL, "sys_clkin_ck");
+       sys_clk = clk_get(NULL, OMAP5_MPU_SOURCE);
        if (IS_ERR(sys_clk)) {
                pr_err("%s: failed to get system clock handle\n", __func__);
                iounmap(base);
@@@ -547,8 -548,6 +548,8 @@@ static inline void __init realtime_coun
                               clksrc_nr, clksrc_src)                   \
  void __init omap##name##_gptimer_timer_init(void)                     \
  {                                                                     \
 +      if (omap_clk_init)                                              \
 +              omap_clk_init();                                        \
        omap_dmtimer_init();                                            \
        omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop);    \
        omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src);        \
                                clksrc_nr, clksrc_src)                  \
  void __init omap##name##_sync32k_timer_init(void)             \
  {                                                                     \
 +      if (omap_clk_init)                                              \
 +              omap_clk_init();                                        \
        omap_dmtimer_init();                                            \
        omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop);    \
        /* Enable the use of clocksource="gp_timer" kernel parameter */ \
@@@ -620,7 -617,7 +621,7 @@@ void __init omap4_local_timer_init(void
  
  #ifdef CONFIG_SOC_OMAP5
  OMAP_SYS_32K_TIMER_INIT(5, 1, OMAP4_32K_SOURCE, "ti,timer-alwon",
-                       2, OMAP4_MPU_SOURCE);
+                       2, OMAP5_MPU_SOURCE);
  void __init omap5_realtime_timer_init(void)
  {
        int err;
index ad71c8a03ffd05f26edecd6b7ca11a02839bd018,e13d7732cfe96be25eb84142a67d0b2ea628ecba..2075bf8e3d90959784d27ff0b36bb423836c2711
@@@ -19,6 -19,7 +19,7 @@@
  #include <linux/ata_platform.h>
  #include <linux/delay.h>
  #include <linux/clk-provider.h>
+ #include <linux/cpu.h>
  #include <net/dsa.h>
  #include <asm/page.h>
  #include <asm/setup.h>
@@@ -293,7 -294,7 +294,7 @@@ void __init orion5x_init(void
         */
        if (dev == MV88F5281_DEV_ID && rev == MV88F5281_REV_D0) {
                printk(KERN_INFO "Orion: Applying 5281 D0 WFI workaround.\n");
 -              disable_hlt();
 +              cpu_idle_poll_ctrl(true);
        }
  
        /*
index 36dc2befa9d8c8980cddd9098c4801d872a4eafa,80445ed33d9529d81d0f908d2b359192988c4986..9387daeeadc8371b48faa3b180669c7e53d1b0f8
@@@ -43,6 -43,7 +43,6 @@@ static int tegra30_idle_lp2(struct cpui
  static struct cpuidle_driver tegra_idle_driver = {
        .name = "tegra_idle",
        .owner = THIS_MODULE,
 -      .en_core_tk_irqen = 1,
  #ifdef CONFIG_PM_SLEEP
        .state_count = 2,
  #else
@@@ -64,6 -65,8 +64,6 @@@
        },
  };
  
 -static DEFINE_PER_CPU(struct cpuidle_device, tegra_idle_device);
 -
  #ifdef CONFIG_PM_SLEEP
  static bool tegra30_cpu_cluster_power_down(struct cpuidle_device *dev,
                                           struct cpuidle_driver *drv,
@@@ -99,12 -102,8 +99,8 @@@ static bool tegra30_cpu_core_power_down
  
        smp_wmb();
  
-       save_cpu_arch_register();
        cpu_suspend(0, tegra30_sleep_cpu_secondary_finish);
  
-       restore_cpu_arch_register();
        clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu);
  
        return true;
@@@ -154,8 -153,32 +150,8 @@@ static int tegra30_idle_lp2(struct cpui
  
  int __init tegra30_cpuidle_init(void)
  {
 -      int ret;
 -      unsigned int cpu;
 -      struct cpuidle_device *dev;
 -      struct cpuidle_driver *drv = &tegra_idle_driver;
 -
  #ifdef CONFIG_PM_SLEEP
        tegra_tear_down_cpu = tegra30_tear_down_cpu;
  #endif
 -
 -      ret = cpuidle_register_driver(&tegra_idle_driver);
 -      if (ret) {
 -              pr_err("CPUidle driver registration failed\n");
 -              return ret;
 -      }
 -
 -      for_each_possible_cpu(cpu) {
 -              dev = &per_cpu(tegra_idle_device, cpu);
 -              dev->cpu = cpu;
 -
 -              dev->state_count = drv->state_count;
 -              ret = cpuidle_register_device(dev);
 -              if (ret) {
 -                      pr_err("CPU%u: CPUidle device registration failed\n",
 -                              cpu);
 -                      return ret;
 -              }
 -      }
 -      return 0;
 +      return cpuidle_register(&tegra_idle_driver, NULL);
  }
index ff3c9f016591ba3ae96b7e209bf0cd52e7055880,cb7540573a8541a1fa5df3b204be8d0840d1dd79..33c353bc1c4acacb8bb02cfea52ab7b1beaec2db
@@@ -5,7 -5,6 +5,7 @@@
   *
   * Authors: Sundar Iyer <sundar.iyer@stericsson.com>
   *          Bengt Jonsson <bengt.g.jonsson@stericsson.com>
 + *          Daniel Willerud <daniel.willerud@stericsson.com>
   *
   * MOP500 board specific initialization for regulators
   */
@@@ -13,7 -12,6 +13,7 @@@
  #include <linux/regulator/machine.h>
  #include <linux/regulator/ab8500.h>
  #include "board-mop500-regulators.h"
 +#include "id.h"
  
  static struct regulator_consumer_supply gpio_en_3v3_consumers[] = {
         REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
@@@ -30,6 -28,20 +30,20 @@@ struct regulator_init_data gpio_en_3v3_
         .consumer_supplies = gpio_en_3v3_consumers,
  };
  
+ static struct regulator_consumer_supply sdi0_reg_consumers[] = {
+         REGULATOR_SUPPLY("vqmmc", "sdi0"),
+ };
+ struct regulator_init_data sdi0_reg_init_data = {
+         .constraints = {
+                 .min_uV         = 1800000,
+                 .max_uV         = 2900000,
+                 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE|REGULATOR_CHANGE_STATUS,
+         },
+         .num_consumer_supplies  = ARRAY_SIZE(sdi0_reg_consumers),
+         .consumer_supplies      = sdi0_reg_consumers,
+ };
  /*
   * TPS61052 regulator
   */
@@@ -55,37 -67,21 +69,37 @@@ struct regulator_init_data tps61052_reg
  };
  
  static struct regulator_consumer_supply ab8500_vaux1_consumers[] = {
 -      /* External displays, connector on board 2v5 power supply */
 -      REGULATOR_SUPPLY("vaux12v5", "mcde.0"),
 +      /* Main display, u8500 R3 uib */
 +      REGULATOR_SUPPLY("vddi", "mcde_disp_sony_acx424akp.0"),
 +      /* Main display, u8500 uib and ST uib */
 +      REGULATOR_SUPPLY("vdd1", "samsung_s6d16d0.0"),
 +      /* Secondary display, ST uib */
 +      REGULATOR_SUPPLY("vdd1", "samsung_s6d16d0.1"),
        /* SFH7741 proximity sensor */
        REGULATOR_SUPPLY("vcc", "gpio-keys.0"),
        /* BH1780GLS ambient light sensor */
        REGULATOR_SUPPLY("vcc", "2-0029"),
        /* lsm303dlh accelerometer */
 -      REGULATOR_SUPPLY("vdd", "3-0018"),
 +      REGULATOR_SUPPLY("vdd", "2-0018"),
 +      /* lsm303dlhc accelerometer */
 +      REGULATOR_SUPPLY("vdd", "2-0019"),
        /* lsm303dlh magnetometer */
 -      REGULATOR_SUPPLY("vdd", "3-001e"),
 +      REGULATOR_SUPPLY("vdd", "2-001e"),
        /* Rohm BU21013 Touchscreen devices */
        REGULATOR_SUPPLY("avdd", "3-005c"),
        REGULATOR_SUPPLY("avdd", "3-005d"),
        /* Synaptics RMI4 Touchscreen device */
        REGULATOR_SUPPLY("vdd", "3-004b"),
 +      /* L3G4200D Gyroscope device */
 +      REGULATOR_SUPPLY("vdd", "2-0068"),
 +      /* Ambient light sensor device */
 +      REGULATOR_SUPPLY("vdd", "3-0029"),
 +      /* Pressure sensor device */
 +      REGULATOR_SUPPLY("vdd", "2-005c"),
 +      /* Cypress TrueTouch Touchscreen device */
 +      REGULATOR_SUPPLY("vcpin", "spi8.0"),
 +      /* Camera device */
 +      REGULATOR_SUPPLY("vaux12v5", "mmio_camera"),
  };
  
  static struct regulator_consumer_supply ab8500_vaux2_consumers[] = {
        REGULATOR_SUPPLY("vmmc", "sdi4"),
        /* AB8500 audio codec */
        REGULATOR_SUPPLY("vcc-N2158", "ab8500-codec.0"),
 +      /* AB8500 accessory detect 1 */
 +      REGULATOR_SUPPLY("vcc-N2158", "ab8500-acc-det.0"),
 +      /* AB8500 Tv-out device */
 +      REGULATOR_SUPPLY("vcc-N2158", "mcde_tv_ab8500.4"),
 +      /* AV8100 HDMI device */
 +      REGULATOR_SUPPLY("vcc-N2158", "av8100_hdmi.3"),
  };
  
  static struct regulator_consumer_supply ab8500_vaux3_consumers[] = {
 +      REGULATOR_SUPPLY("v-SD-STM", "stm"),
        /* External MMC slot power */
        REGULATOR_SUPPLY("vmmc", "sdi0"),
  };
  
 +static struct regulator_consumer_supply ab8505_vaux4_consumers[] = {
 +};
 +
 +static struct regulator_consumer_supply ab8505_vaux5_consumers[] = {
 +};
 +
 +static struct regulator_consumer_supply ab8505_vaux6_consumers[] = {
 +};
 +
 +static struct regulator_consumer_supply ab8505_vaux8_consumers[] = {
 +      /* AB8500 audio codec device */
 +      REGULATOR_SUPPLY("v-aux8", NULL),
 +};
 +
 +static struct regulator_consumer_supply ab8505_vadc_consumers[] = {
 +      /* Internal general-purpose ADC */
 +      REGULATOR_SUPPLY("vddadc", "ab8500-gpadc.0"),
 +      /* ADC for charger */
 +      REGULATOR_SUPPLY("vddadc", "ab8500-charger.0"),
 +};
 +
  static struct regulator_consumer_supply ab8500_vtvout_consumers[] = {
        /* TV-out DENC supply */
        REGULATOR_SUPPLY("vtvout", "ab8500-denc.0"),
        /* Internal general-purpose ADC */
        REGULATOR_SUPPLY("vddadc", "ab8500-gpadc.0"),
 +      /* ADC for charger */
 +      REGULATOR_SUPPLY("vddadc", "ab8500-charger.0"),
 +      /* AB8500 Tv-out device */
 +      REGULATOR_SUPPLY("vtvout", "mcde_tv_ab8500.4"),
  };
  
  static struct regulator_consumer_supply ab8500_vaud_consumers[] = {
@@@ -164,90 -128,77 +178,90 @@@ static struct regulator_consumer_suppl
        REGULATOR_SUPPLY("v-intcore", NULL),
        /* USB Transceiver */
        REGULATOR_SUPPLY("vddulpivio18", "ab8500-usb.0"),
 +      /* Handled by abx500 clk driver */
 +      REGULATOR_SUPPLY("v-intcore", "abx500-clk.0"),
 +};
 +
 +static struct regulator_consumer_supply ab8505_usb_consumers[] = {
 +      /* HS USB OTG physical interface */
 +      REGULATOR_SUPPLY("v-ape", NULL),
  };
  
  static struct regulator_consumer_supply ab8500_vana_consumers[] = {
 -      /* External displays, connector on board, 1v8 power supply */
 -      REGULATOR_SUPPLY("vsmps2", "mcde.0"),
 +      /* DB8500 DSI */
 +      REGULATOR_SUPPLY("vdddsi1v2", "mcde"),
 +      REGULATOR_SUPPLY("vdddsi1v2", "b2r2_core"),
 +      REGULATOR_SUPPLY("vdddsi1v2", "b2r2_1_core"),
 +      REGULATOR_SUPPLY("vdddsi1v2", "dsilink.0"),
 +      REGULATOR_SUPPLY("vdddsi1v2", "dsilink.1"),
 +      REGULATOR_SUPPLY("vdddsi1v2", "dsilink.2"),
 +      /* DB8500 CSI */
 +      REGULATOR_SUPPLY("vddcsi1v2", "mmio_camera"),
  };
  
  /* ab8500 regulator register initialization */
 -struct ab8500_regulator_reg_init
 -ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
 +static struct ab8500_regulator_reg_init ab8500_reg_init[] = {
        /*
         * VanaRequestCtrl          = HP/LP depending on VxRequest
         * VextSupply1RequestCtrl   = HP/LP depending on VxRequest
         */
 -      INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL2, 0x00),
 +      INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL2,       0xf0, 0x00),
        /*
         * VextSupply2RequestCtrl   = HP/LP depending on VxRequest
         * VextSupply3RequestCtrl   = HP/LP depending on VxRequest
         * Vaux1RequestCtrl         = HP/LP depending on VxRequest
         * Vaux2RequestCtrl         = HP/LP depending on VxRequest
         */
 -      INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL3, 0x00),
 +      INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL3,       0xff, 0x00),
        /*
         * Vaux3RequestCtrl         = HP/LP depending on VxRequest
         * SwHPReq                  = Control through SWValid disabled
         */
 -      INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL4, 0x00),
 +      INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL4,       0x07, 0x00),
        /*
         * VanaSysClkReq1HPValid    = disabled
         * Vaux1SysClkReq1HPValid   = disabled
         * Vaux2SysClkReq1HPValid   = disabled
         * Vaux3SysClkReq1HPValid   = disabled
         */
 -      INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID1, 0x00),
 +      INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID1, 0xe8, 0x00),
        /*
         * VextSupply1SysClkReq1HPValid = disabled
         * VextSupply2SysClkReq1HPValid = disabled
         * VextSupply3SysClkReq1HPValid = SysClkReq1 controlled
         */
 -      INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID2, 0x40),
 +      INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID2, 0x70, 0x40),
        /*
         * VanaHwHPReq1Valid        = disabled
         * Vaux1HwHPreq1Valid       = disabled
         * Vaux2HwHPReq1Valid       = disabled
         * Vaux3HwHPReqValid        = disabled
         */
 -      INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID1, 0x00),
 +      INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID1,     0xe8, 0x00),
        /*
         * VextSupply1HwHPReq1Valid = disabled
         * VextSupply2HwHPReq1Valid = disabled
         * VextSupply3HwHPReq1Valid = disabled
         */
 -      INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID2, 0x00),
 +      INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID2,     0x07, 0x00),
        /*
         * VanaHwHPReq2Valid        = disabled
         * Vaux1HwHPReq2Valid       = disabled
         * Vaux2HwHPReq2Valid       = disabled
         * Vaux3HwHPReq2Valid       = disabled
         */
 -      INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID1, 0x00),
 +      INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID1,     0xe8, 0x00),
        /*
         * VextSupply1HwHPReq2Valid = disabled
         * VextSupply2HwHPReq2Valid = disabled
         * VextSupply3HwHPReq2Valid = HWReq2 controlled
         */
 -      INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID2, 0x04),
 +      INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID2,     0x07, 0x04),
        /*
         * VanaSwHPReqValid         = disabled
         * Vaux1SwHPReqValid        = disabled
         */
 -      INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID1, 0x00),
 +      INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID1,      0xa0, 0x00),
        /*
         * Vaux2SwHPReqValid        = disabled
         * Vaux3SwHPReqValid        = disabled
         * VextSupply2SwHPReqValid  = disabled
         * VextSupply3SwHPReqValid  = disabled
         */
 -      INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID2, 0x00),
 +      INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID2,      0x1f, 0x00),
        /*
         * SysClkReq2Valid1         = SysClkReq2 controlled
         * SysClkReq3Valid1         = disabled
         * SysClkReq7Valid1         = disabled
         * SysClkReq8Valid1         = disabled
         */
 -      INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID1, 0x2a),
 +      INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID1,    0xfe, 0x2a),
        /*
         * SysClkReq2Valid2         = disabled
         * SysClkReq3Valid2         = disabled
         * SysClkReq7Valid2         = disabled
         * SysClkReq8Valid2         = disabled
         */
 -      INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID2, 0x20),
 +      INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID2,    0xfe, 0x20),
        /*
         * VTVoutEna                = disabled
         * Vintcore12Ena            = disabled
         * Vintcore12LP             = inactive (HP)
         * VTVoutLP                 = inactive (HP)
         */
 -      INIT_REGULATOR_REGISTER(AB8500_REGUMISC1, 0x10),
 +      INIT_REGULATOR_REGISTER(AB8500_REGUMISC1,              0xfe, 0x10),
        /*
         * VaudioEna                = disabled
         * VdmicEna                 = disabled
         * Vamic1Ena                = disabled
         * Vamic2Ena                = disabled
         */
 -      INIT_REGULATOR_REGISTER(AB8500_VAUDIOSUPPLY, 0x00),
 +      INIT_REGULATOR_REGISTER(AB8500_VAUDIOSUPPLY,           0x1e, 0x00),
        /*
         * Vamic1_dzout             = high-Z when Vamic1 is disabled
         * Vamic2_dzout             = high-Z when Vamic2 is disabled
         */
 -      INIT_REGULATOR_REGISTER(AB8500_REGUCTRL1VAMIC, 0x00),
 +      INIT_REGULATOR_REGISTER(AB8500_REGUCTRL1VAMIC,         0x03, 0x00),
        /*
 -       * VPll                     = Hw controlled
 +       * VPll                     = Hw controlled (NOTE! PRCMU bits)
         * VanaRegu                 = force off
         */
 -      INIT_REGULATOR_REGISTER(AB8500_VPLLVANAREGU, 0x02),
 +      INIT_REGULATOR_REGISTER(AB8500_VPLLVANAREGU,           0x0f, 0x02),
        /*
         * VrefDDREna               = disabled
         * VrefDDRSleepMode         = inactive (no pulldown)
         */
 -      INIT_REGULATOR_REGISTER(AB8500_VREFDDR, 0x00),
 +      INIT_REGULATOR_REGISTER(AB8500_VREFDDR,                0x03, 0x00),
        /*
 -       * VextSupply1Regu          = HW control
 -       * VextSupply2Regu          = HW control
 -       * VextSupply3Regu          = HW control
 +       * VextSupply1Regu          = force LP
 +       * VextSupply2Regu          = force OFF
 +       * VextSupply3Regu          = force HP (-> STBB2=LP and TPS=LP)
         * ExtSupply2Bypass         = ExtSupply12LPn ball is 0 when Ena is 0
         * ExtSupply3Bypass         = ExtSupply3LPn ball is 0 when Ena is 0
         */
 -      INIT_REGULATOR_REGISTER(AB8500_EXTSUPPLYREGU, 0x2a),
 +      INIT_REGULATOR_REGISTER(AB8500_EXTSUPPLYREGU,          0xff, 0x13),
        /*
         * Vaux1Regu                = force HP
         * Vaux2Regu                = force off
         */
 -      INIT_REGULATOR_REGISTER(AB8500_VAUX12REGU, 0x01),
 +      INIT_REGULATOR_REGISTER(AB8500_VAUX12REGU,             0x0f, 0x01),
        /*
 -       * Vaux3regu                = force off
 +       * Vaux3Regu                = force off
         */
 -      INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3REGU, 0x00),
 +      INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3REGU,          0x03, 0x00),
        /*
 -       * Vsmps1                   = 1.15V
 +       * Vaux1Sel                 = 2.8 V
         */
 -      INIT_REGULATOR_REGISTER(AB8500_VSMPS1SEL1, 0x24),
 -      /*
 -       * Vaux1Sel                 = 2.5 V
 -       */
 -      INIT_REGULATOR_REGISTER(AB8500_VAUX1SEL, 0x08),
 +      INIT_REGULATOR_REGISTER(AB8500_VAUX1SEL,               0x0f, 0x0C),
        /*
         * Vaux2Sel                 = 2.9 V
         */
 -      INIT_REGULATOR_REGISTER(AB8500_VAUX2SEL, 0x0d),
 +      INIT_REGULATOR_REGISTER(AB8500_VAUX2SEL,               0x0f, 0x0d),
        /*
         * Vaux3Sel                 = 2.91 V
         */
 -      INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3SEL, 0x07),
 +      INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3SEL,           0x07, 0x07),
        /*
         * VextSupply12LP           = disabled (no LP)
         */
 -      INIT_REGULATOR_REGISTER(AB8500_REGUCTRL2SPARE, 0x00),
 +      INIT_REGULATOR_REGISTER(AB8500_REGUCTRL2SPARE,         0x01, 0x00),
        /*
         * Vaux1Disch               = short discharge time
         * Vaux2Disch               = short discharge time
         * VTVoutDisch              = short discharge time
         * VaudioDisch              = short discharge time
         */
 -      INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH, 0x00),
 +      INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH,          0xfc, 0x00),
        /*
         * VanaDisch                = short discharge time
         * VdmicPullDownEna         = pulldown disabled when Vdmic is disabled
         * VdmicDisch               = short discharge time
         */
 -      INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH2, 0x00),
 +      INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH2,         0x16, 0x00),
  };
  
  /* AB8500 regulators */
 -struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
 +static struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
        /* supplies to the display/camera */
        [AB8500_LDO_AUX1] = {
                .constraints = {
                        .name = "V-DISPLAY",
 -                      .min_uV = 2500000,
 -                      .max_uV = 2900000,
 +                      .min_uV = 2800000,
 +                      .max_uV = 3300000,
                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
                                          REGULATOR_CHANGE_STATUS,
                        .boot_on = 1, /* display is on at boot */
 -                      /*
 -                       * This voltage cannot be disabled right now because
 -                       * it is somehow affecting the external MMC
 -                       * functionality, though that typically will use
 -                       * AUX3.
 -                       */
 -                      .always_on = 1,
                },
                .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux1_consumers),
                .consumer_supplies = ab8500_vaux1_consumers,
                        .min_uV = 1100000,
                        .max_uV = 3300000,
                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
 -                                        REGULATOR_CHANGE_STATUS,
 +                                        REGULATOR_CHANGE_STATUS |
 +                                        REGULATOR_CHANGE_MODE,
 +                      .valid_modes_mask = REGULATOR_MODE_NORMAL |
 +                                          REGULATOR_MODE_IDLE,
                },
                .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux2_consumers),
                .consumer_supplies = ab8500_vaux2_consumers,
                        .min_uV = 1100000,
                        .max_uV = 3300000,
                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
 -                                        REGULATOR_CHANGE_STATUS,
 +                                        REGULATOR_CHANGE_STATUS |
 +                                        REGULATOR_CHANGE_MODE,
 +                      .valid_modes_mask = REGULATOR_MODE_NORMAL |
 +                                          REGULATOR_MODE_IDLE,
                },
                .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux3_consumers),
                .consumer_supplies = ab8500_vaux3_consumers,
        [AB8500_LDO_INTCORE] = {
                .constraints = {
                        .name = "V-INTCORE",
 -                      .valid_ops_mask = REGULATOR_CHANGE_STATUS,
 +                      .min_uV = 1250000,
 +                      .max_uV = 1350000,
 +                      .input_uV = 1800000,
 +                      .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
 +                                        REGULATOR_CHANGE_STATUS |
 +                                        REGULATOR_CHANGE_MODE |
 +                                        REGULATOR_CHANGE_DRMS,
 +                      .valid_modes_mask = REGULATOR_MODE_NORMAL |
 +                                          REGULATOR_MODE_IDLE,
                },
                .num_consumer_supplies = ARRAY_SIZE(ab8500_vintcore_consumers),
                .consumer_supplies = ab8500_vintcore_consumers,
        },
 -      /* supply for U8500 CSI/DSI, VANA LDO */
 +      /* supply for U8500 CSI-DSI, VANA LDO */
        [AB8500_LDO_ANA] = {
                .constraints = {
 -                      .name = "V-CSI/DSI",
 +                      .name = "V-CSI-DSI",
                        .valid_ops_mask = REGULATOR_CHANGE_STATUS,
                },
                .num_consumer_supplies = ARRAY_SIZE(ab8500_vana_consumers),
                .consumer_supplies = ab8500_vana_consumers,
        },
  };
 +
 +/* supply for VextSupply3 */
 +static struct regulator_consumer_supply ab8500_ext_supply3_consumers[] = {
 +      /* SIM supply for 3 V SIM cards */
 +      REGULATOR_SUPPLY("vinvsim", "sim-detect.0"),
 +};
 +
 +/* extended configuration for VextSupply2, only used for HREFP_V20 boards */
 +static struct ab8500_ext_regulator_cfg ab8500_ext_supply2 = {
 +      .hwreq = true,
 +};
 +
 +/*
 + * AB8500 external regulators
 + */
 +static struct regulator_init_data ab8500_ext_regulators[] = {
 +      /* fixed Vbat supplies VSMPS1_EXT_1V8 */
 +      [AB8500_EXT_SUPPLY1] = {
 +              .constraints = {
 +                      .name = "ab8500-ext-supply1",
 +                      .min_uV = 1800000,
 +                      .max_uV = 1800000,
 +                      .initial_mode = REGULATOR_MODE_IDLE,
 +                      .boot_on = 1,
 +                      .always_on = 1,
 +              },
 +      },
 +      /* fixed Vbat supplies VSMPS2_EXT_1V36 and VSMPS5_EXT_1V15 */
 +      [AB8500_EXT_SUPPLY2] = {
 +              .constraints = {
 +                      .name = "ab8500-ext-supply2",
 +                      .min_uV = 1360000,
 +                      .max_uV = 1360000,
 +              },
 +      },
 +      /* fixed Vbat supplies VSMPS3_EXT_3V4 and VSMPS4_EXT_3V4 */
 +      [AB8500_EXT_SUPPLY3] = {
 +              .constraints = {
 +                      .name = "ab8500-ext-supply3",
 +                      .min_uV = 3400000,
 +                      .max_uV = 3400000,
 +                      .valid_ops_mask = REGULATOR_CHANGE_STATUS,
 +                      .boot_on = 1,
 +              },
 +              .num_consumer_supplies =
 +                      ARRAY_SIZE(ab8500_ext_supply3_consumers),
 +              .consumer_supplies = ab8500_ext_supply3_consumers,
 +      },
 +};
 +
 +/* ab8505 regulator register initialization */
 +static struct ab8500_regulator_reg_init ab8505_reg_init[] = {
 +      /*
 +       * VarmRequestCtrl
 +       * VsmpsCRequestCtrl
 +       * VsmpsARequestCtrl
 +       * VsmpsBRequestCtrl
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL1,       0x00, 0x00),
 +      /*
 +       * VsafeRequestCtrl
 +       * VpllRequestCtrl
 +       * VanaRequestCtrl          = HP/LP depending on VxRequest
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL2,       0x30, 0x00),
 +      /*
 +       * Vaux1RequestCtrl         = HP/LP depending on VxRequest
 +       * Vaux2RequestCtrl         = HP/LP depending on VxRequest
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL3,       0xf0, 0x00),
 +      /*
 +       * Vaux3RequestCtrl         = HP/LP depending on VxRequest
 +       * SwHPReq                  = Control through SWValid disabled
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL4,       0x07, 0x00),
 +      /*
 +       * VsmpsASysClkReq1HPValid
 +       * VsmpsBSysClkReq1HPValid
 +       * VsafeSysClkReq1HPValid
 +       * VanaSysClkReq1HPValid    = disabled
 +       * VpllSysClkReq1HPValid
 +       * Vaux1SysClkReq1HPValid   = disabled
 +       * Vaux2SysClkReq1HPValid   = disabled
 +       * Vaux3SysClkReq1HPValid   = disabled
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQ1HPVALID1, 0xe8, 0x00),
 +      /*
 +       * VsmpsCSysClkReq1HPValid
 +       * VarmSysClkReq1HPValid
 +       * VbbSysClkReq1HPValid
 +       * VsmpsMSysClkReq1HPValid
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQ1HPVALID2, 0x00, 0x00),
 +      /*
 +       * VsmpsAHwHPReq1Valid
 +       * VsmpsBHwHPReq1Valid
 +       * VsafeHwHPReq1Valid
 +       * VanaHwHPReq1Valid        = disabled
 +       * VpllHwHPReq1Valid
 +       * Vaux1HwHPreq1Valid       = disabled
 +       * Vaux2HwHPReq1Valid       = disabled
 +       * Vaux3HwHPReqValid        = disabled
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ1VALID1,     0xe8, 0x00),
 +      /*
 +       * VsmpsMHwHPReq1Valid
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ1VALID2,     0x00, 0x00),
 +      /*
 +       * VsmpsAHwHPReq2Valid
 +       * VsmpsBHwHPReq2Valid
 +       * VsafeHwHPReq2Valid
 +       * VanaHwHPReq2Valid        = disabled
 +       * VpllHwHPReq2Valid
 +       * Vaux1HwHPReq2Valid       = disabled
 +       * Vaux2HwHPReq2Valid       = disabled
 +       * Vaux3HwHPReq2Valid       = disabled
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ2VALID1,     0xe8, 0x00),
 +      /*
 +       * VsmpsMHwHPReq2Valid
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ2VALID2,     0x00, 0x00),
 +      /**
 +       * VsmpsCSwHPReqValid
 +       * VarmSwHPReqValid
 +       * VsmpsASwHPReqValid
 +       * VsmpsBSwHPReqValid
 +       * VsafeSwHPReqValid
 +       * VanaSwHPReqValid
 +       * VanaSwHPReqValid         = disabled
 +       * VpllSwHPReqValid
 +       * Vaux1SwHPReqValid        = disabled
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_REGUSWHPREQVALID1,      0xa0, 0x00),
 +      /*
 +       * Vaux2SwHPReqValid        = disabled
 +       * Vaux3SwHPReqValid        = disabled
 +       * VsmpsMSwHPReqValid
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_REGUSWHPREQVALID2,      0x03, 0x00),
 +      /*
 +       * SysClkReq2Valid1         = SysClkReq2 controlled
 +       * SysClkReq3Valid1         = disabled
 +       * SysClkReq4Valid1         = SysClkReq4 controlled
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQVALID1,    0x0e, 0x0a),
 +      /*
 +       * SysClkReq2Valid2         = disabled
 +       * SysClkReq3Valid2         = disabled
 +       * SysClkReq4Valid2         = disabled
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQVALID2,    0x0e, 0x00),
 +      /*
 +       * Vaux4SwHPReqValid
 +       * Vaux4HwHPReq2Valid
 +       * Vaux4HwHPReq1Valid
 +       * Vaux4SysClkReq1HPValid
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_REGUVAUX4REQVALID,    0x00, 0x00),
 +      /*
 +       * VadcEna                  = disabled
 +       * VintCore12Ena            = disabled
 +       * VintCore12Sel            = 1.25 V
 +       * VintCore12LP             = inactive (HP)
 +       * VadcLP                   = inactive (HP)
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_REGUMISC1,              0xfe, 0x10),
 +      /*
 +       * VaudioEna                = disabled
 +       * Vaux8Ena                 = disabled
 +       * Vamic1Ena                = disabled
 +       * Vamic2Ena                = disabled
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_VAUDIOSUPPLY,           0x1e, 0x00),
 +      /*
 +       * Vamic1_dzout             = high-Z when Vamic1 is disabled
 +       * Vamic2_dzout             = high-Z when Vamic2 is disabled
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_REGUCTRL1VAMIC,         0x03, 0x00),
 +      /*
 +       * VsmpsARegu
 +       * VsmpsASelCtrl
 +       * VsmpsAAutoMode
 +       * VsmpsAPWMMode
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_VSMPSAREGU,    0x00, 0x00),
 +      /*
 +       * VsmpsBRegu
 +       * VsmpsBSelCtrl
 +       * VsmpsBAutoMode
 +       * VsmpsBPWMMode
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_VSMPSBREGU,    0x00, 0x00),
 +      /*
 +       * VsafeRegu
 +       * VsafeSelCtrl
 +       * VsafeAutoMode
 +       * VsafePWMMode
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_VSAFEREGU,    0x00, 0x00),
 +      /*
 +       * VPll                     = Hw controlled (NOTE! PRCMU bits)
 +       * VanaRegu                 = force off
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_VPLLVANAREGU,           0x0f, 0x02),
 +      /*
 +       * VextSupply1Regu          = force OFF (OTP_ExtSupply12LPnPolarity 1)
 +       * VextSupply2Regu          = force OFF (OTP_ExtSupply12LPnPolarity 1)
 +       * VextSupply3Regu          = force OFF (OTP_ExtSupply3LPnPolarity 0)
 +       * ExtSupply2Bypass         = ExtSupply12LPn ball is 0 when Ena is 0
 +       * ExtSupply3Bypass         = ExtSupply3LPn ball is 0 when Ena is 0
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_EXTSUPPLYREGU,          0xff, 0x30),
 +      /*
 +       * Vaux1Regu                = force HP
 +       * Vaux2Regu                = force off
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_VAUX12REGU,             0x0f, 0x01),
 +      /*
 +       * Vaux3Regu                = force off
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_VRF1VAUX3REGU,          0x03, 0x00),
 +      /*
 +       * VsmpsASel1
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL1,    0x00, 0x00),
 +      /*
 +       * VsmpsASel2
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL2,    0x00, 0x00),
 +      /*
 +       * VsmpsASel3
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL3,    0x00, 0x00),
 +      /*
 +       * VsmpsBSel1
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL1,    0x00, 0x00),
 +      /*
 +       * VsmpsBSel2
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL2,    0x00, 0x00),
 +      /*
 +       * VsmpsBSel3
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL3,    0x00, 0x00),
 +      /*
 +       * VsafeSel1
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_VSAFESEL1,    0x00, 0x00),
 +      /*
 +       * VsafeSel2
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_VSAFESEL2,    0x00, 0x00),
 +      /*
 +       * VsafeSel3
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_VSAFESEL3,    0x00, 0x00),
 +      /*
 +       * Vaux1Sel                 = 2.8 V
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_VAUX1SEL,               0x0f, 0x0C),
 +      /*
 +       * Vaux2Sel                 = 2.9 V
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_VAUX2SEL,               0x0f, 0x0d),
 +      /*
 +       * Vaux3Sel                 = 2.91 V
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_VRF1VAUX3SEL,           0x07, 0x07),
 +      /*
 +       * Vaux4RequestCtrl
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_VAUX4REQCTRL,    0x00, 0x00),
 +      /*
 +       * Vaux4Regu
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_VAUX4REGU,    0x00, 0x00),
 +      /*
 +       * Vaux4Sel
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_VAUX4SEL,    0x00, 0x00),
 +      /*
 +       * Vaux1Disch               = short discharge time
 +       * Vaux2Disch               = short discharge time
 +       * Vaux3Disch               = short discharge time
 +       * Vintcore12Disch          = short discharge time
 +       * VTVoutDisch              = short discharge time
 +       * VaudioDisch              = short discharge time
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH,          0xfc, 0x00),
 +      /*
 +       * VanaDisch                = short discharge time
 +       * Vaux8PullDownEna         = pulldown disabled when Vaux8 is disabled
 +       * Vaux8Disch               = short discharge time
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH2,         0x16, 0x00),
 +      /*
 +       * Vaux4Disch               = short discharge time
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH3,         0x01, 0x00),
 +      /*
 +       * Vaux5Sel
 +       * Vaux5LP
 +       * Vaux5Ena
 +       * Vaux5Disch
 +       * Vaux5DisSfst
 +       * Vaux5DisPulld
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_CTRLVAUX5,              0x00, 0x00),
 +      /*
 +       * Vaux6Sel
 +       * Vaux6LP
 +       * Vaux6Ena
 +       * Vaux6DisPulld
 +       */
 +      INIT_REGULATOR_REGISTER(AB8505_CTRLVAUX6,              0x00, 0x00),
 +};
 +
 +struct regulator_init_data ab8505_regulators[AB8505_NUM_REGULATORS] = {
 +      /* supplies to the display/camera */
 +      [AB8505_LDO_AUX1] = {
 +              .constraints = {
 +                      .name = "V-DISPLAY",
 +                      .min_uV = 2800000,
 +                      .max_uV = 3300000,
 +                      .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
 +                                        REGULATOR_CHANGE_STATUS,
 +                      .boot_on = 1, /* display is on at boot */
 +              },
 +              .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux1_consumers),
 +              .consumer_supplies = ab8500_vaux1_consumers,
 +      },
 +      /* supplies to the on-board eMMC */
 +      [AB8505_LDO_AUX2] = {
 +              .constraints = {
 +                      .name = "V-eMMC1",
 +                      .min_uV = 1100000,
 +                      .max_uV = 3300000,
 +                      .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
 +                                        REGULATOR_CHANGE_STATUS |
 +                                        REGULATOR_CHANGE_MODE,
 +                      .valid_modes_mask = REGULATOR_MODE_NORMAL |
 +                                          REGULATOR_MODE_IDLE,
 +              },
 +              .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux2_consumers),
 +              .consumer_supplies = ab8500_vaux2_consumers,
 +      },
 +      /* supply for VAUX3, supplies to SDcard slots */
 +      [AB8505_LDO_AUX3] = {
 +              .constraints = {
 +                      .name = "V-MMC-SD",
 +                      .min_uV = 1100000,
 +                      .max_uV = 3300000,
 +                      .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
 +                                        REGULATOR_CHANGE_STATUS |
 +                                        REGULATOR_CHANGE_MODE,
 +                      .valid_modes_mask = REGULATOR_MODE_NORMAL |
 +                                          REGULATOR_MODE_IDLE,
 +              },
 +              .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux3_consumers),
 +              .consumer_supplies = ab8500_vaux3_consumers,
 +      },
 +      /* supply for VAUX4, supplies to NFC and standalone secure element */
 +      [AB8505_LDO_AUX4] = {
 +              .constraints = {
 +                      .name = "V-NFC-SE",
 +                      .min_uV = 1100000,
 +                      .max_uV = 3300000,
 +                      .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
 +                                        REGULATOR_CHANGE_STATUS |
 +                                        REGULATOR_CHANGE_MODE,
 +                      .valid_modes_mask = REGULATOR_MODE_NORMAL |
 +                                          REGULATOR_MODE_IDLE,
 +              },
 +              .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux4_consumers),
 +              .consumer_supplies = ab8505_vaux4_consumers,
 +      },
 +      /* supply for VAUX5, supplies to TBD */
 +      [AB8505_LDO_AUX5] = {
 +              .constraints = {
 +                      .name = "V-AUX5",
 +                      .min_uV = 1050000,
 +                      .max_uV = 2790000,
 +                      .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
 +                                        REGULATOR_CHANGE_STATUS |
 +                                        REGULATOR_CHANGE_MODE,
 +                      .valid_modes_mask = REGULATOR_MODE_NORMAL |
 +                                          REGULATOR_MODE_IDLE,
 +              },
 +              .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux5_consumers),
 +              .consumer_supplies = ab8505_vaux5_consumers,
 +      },
 +      /* supply for VAUX6, supplies to TBD */
 +      [AB8505_LDO_AUX6] = {
 +              .constraints = {
 +                      .name = "V-AUX6",
 +                      .min_uV = 1050000,
 +                      .max_uV = 2790000,
 +                      .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
 +                                        REGULATOR_CHANGE_STATUS |
 +                                        REGULATOR_CHANGE_MODE,
 +                      .valid_modes_mask = REGULATOR_MODE_NORMAL |
 +                                          REGULATOR_MODE_IDLE,
 +              },
 +              .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux6_consumers),
 +              .consumer_supplies = ab8505_vaux6_consumers,
 +      },
 +      /* supply for gpadc, ADC LDO */
 +      [AB8505_LDO_ADC] = {
 +              .constraints = {
 +                      .name = "V-ADC",
 +                      .valid_ops_mask = REGULATOR_CHANGE_STATUS,
 +              },
 +              .num_consumer_supplies = ARRAY_SIZE(ab8505_vadc_consumers),
 +              .consumer_supplies = ab8505_vadc_consumers,
 +      },
 +      /* supply for ab8500-vaudio, VAUDIO LDO */
 +      [AB8505_LDO_AUDIO] = {
 +              .constraints = {
 +                      .name = "V-AUD",
 +                      .valid_ops_mask = REGULATOR_CHANGE_STATUS,
 +              },
 +              .num_consumer_supplies = ARRAY_SIZE(ab8500_vaud_consumers),
 +              .consumer_supplies = ab8500_vaud_consumers,
 +      },
 +      /* supply for v-anamic1 VAMic1-LDO */
 +      [AB8505_LDO_ANAMIC1] = {
 +              .constraints = {
 +                      .name = "V-AMIC1",
 +                      .valid_ops_mask = REGULATOR_CHANGE_STATUS |
 +                                        REGULATOR_CHANGE_MODE,
 +                      .valid_modes_mask = REGULATOR_MODE_NORMAL |
 +                                          REGULATOR_MODE_IDLE,
 +              },
 +              .num_consumer_supplies = ARRAY_SIZE(ab8500_vamic1_consumers),
 +              .consumer_supplies = ab8500_vamic1_consumers,
 +      },
 +      /* supply for v-amic2, VAMIC2 LDO, reuse constants for AMIC1 */
 +      [AB8505_LDO_ANAMIC2] = {
 +              .constraints = {
 +                      .name = "V-AMIC2",
 +                      .valid_ops_mask = REGULATOR_CHANGE_STATUS |
 +                                        REGULATOR_CHANGE_MODE,
 +                      .valid_modes_mask = REGULATOR_MODE_NORMAL |
 +                                          REGULATOR_MODE_IDLE,
 +              },
 +              .num_consumer_supplies = ARRAY_SIZE(ab8500_vamic2_consumers),
 +              .consumer_supplies = ab8500_vamic2_consumers,
 +      },
 +      /* supply for v-aux8, VAUX8 LDO */
 +      [AB8505_LDO_AUX8] = {
 +              .constraints = {
 +                      .name = "V-AUX8",
 +                      .valid_ops_mask = REGULATOR_CHANGE_STATUS,
 +              },
 +              .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux8_consumers),
 +              .consumer_supplies = ab8505_vaux8_consumers,
 +      },
 +      /* supply for v-intcore12, VINTCORE12 LDO */
 +      [AB8505_LDO_INTCORE] = {
 +              .constraints = {
 +                      .name = "V-INTCORE",
 +                      .min_uV = 1250000,
 +                      .max_uV = 1350000,
 +                      .input_uV = 1800000,
 +                      .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
 +                                        REGULATOR_CHANGE_STATUS |
 +                                        REGULATOR_CHANGE_MODE |
 +                                        REGULATOR_CHANGE_DRMS,
 +                      .valid_modes_mask = REGULATOR_MODE_NORMAL |
 +                                          REGULATOR_MODE_IDLE,
 +              },
 +              .num_consumer_supplies = ARRAY_SIZE(ab8500_vintcore_consumers),
 +              .consumer_supplies = ab8500_vintcore_consumers,
 +      },
 +      /* supply for LDO USB */
 +      [AB8505_LDO_USB] = {
 +              .constraints = {
 +                      .name = "V-USB",
 +                      .valid_ops_mask = REGULATOR_CHANGE_STATUS |
 +                                        REGULATOR_CHANGE_MODE,
 +                      .valid_modes_mask = REGULATOR_MODE_NORMAL |
 +                                          REGULATOR_MODE_IDLE,
 +              },
 +              .num_consumer_supplies = ARRAY_SIZE(ab8505_usb_consumers),
 +              .consumer_supplies = ab8505_usb_consumers,
 +      },
 +      /* supply for U8500 CSI-DSI, VANA LDO */
 +      [AB8505_LDO_ANA] = {
 +              .constraints = {
 +                      .name = "V-CSI-DSI",
 +                      .valid_ops_mask = REGULATOR_CHANGE_STATUS,
 +              },
 +              .num_consumer_supplies = ARRAY_SIZE(ab8500_vana_consumers),
 +              .consumer_supplies = ab8500_vana_consumers,
 +      },
 +};
 +
 +struct ab8500_regulator_platform_data ab8500_regulator_plat_data = {
 +      .reg_init               = ab8500_reg_init,
 +      .num_reg_init           = ARRAY_SIZE(ab8500_reg_init),
 +      .regulator              = ab8500_regulators,
 +      .num_regulator          = ARRAY_SIZE(ab8500_regulators),
 +      .ext_regulator          = ab8500_ext_regulators,
 +      .num_ext_regulator      = ARRAY_SIZE(ab8500_ext_regulators),
 +};
 +
 +/* Use the AB8500 init settings for AB8505 as they are the same right now */
 +struct ab8500_regulator_platform_data ab8505_regulator_plat_data = {
 +      .reg_init               = ab8505_reg_init,
 +      .num_reg_init           = ARRAY_SIZE(ab8505_reg_init),
 +      .regulator              = ab8505_regulators,
 +      .num_regulator          = ARRAY_SIZE(ab8505_regulators),
 +};
 +
 +static void ab8500_modify_reg_init(int id, u8 mask, u8 value)
 +{
 +      int i;
 +
 +      if (cpu_is_u8520()) {
 +              for (i = ARRAY_SIZE(ab8505_reg_init) - 1; i >= 0; i--) {
 +                      if (ab8505_reg_init[i].id == id) {
 +                              u8 initval = ab8505_reg_init[i].value;
 +                              initval = (initval & ~mask) | (value & mask);
 +                              ab8505_reg_init[i].value = initval;
 +
 +                              BUG_ON(mask & ~ab8505_reg_init[i].mask);
 +                              return;
 +                      }
 +              }
 +      } else {
 +              for (i = ARRAY_SIZE(ab8500_reg_init) - 1; i >= 0; i--) {
 +                      if (ab8500_reg_init[i].id == id) {
 +                              u8 initval = ab8500_reg_init[i].value;
 +                              initval = (initval & ~mask) | (value & mask);
 +                              ab8500_reg_init[i].value = initval;
 +
 +                              BUG_ON(mask & ~ab8500_reg_init[i].mask);
 +                              return;
 +                      }
 +              }
 +      }
 +
 +      BUG_ON(1);
 +}
 +
 +void mop500_regulator_init(void)
 +{
 +      struct regulator_init_data *regulator;
 +
 +      /*
 +       * Temporarily turn on Vaux2 on 8520 machine
 +       */
 +      if (cpu_is_u8520()) {
 +              /* Vaux2 initialized to be on */
 +              ab8500_modify_reg_init(AB8505_VAUX12REGU, 0x0f, 0x05);
 +      }
 +
 +      /*
 +       * Handle AB8500_EXT_SUPPLY2 on HREFP_V20_V50 boards (do it for
 +       * all HREFP_V20 boards)
 +       */
 +      if (cpu_is_u8500v20()) {
 +              /* VextSupply2RequestCtrl =  HP/OFF depending on VxRequest */
 +              ab8500_modify_reg_init(AB8500_REGUREQUESTCTRL3, 0x01, 0x01);
 +
 +              /* VextSupply2SysClkReq1HPValid = SysClkReq1 controlled */
 +              ab8500_modify_reg_init(AB8500_REGUSYSCLKREQ1HPVALID2,
 +                      0x20, 0x20);
 +
 +              /* VextSupply2 = force HP at initialization */
 +              ab8500_modify_reg_init(AB8500_EXTSUPPLYREGU, 0x0c, 0x04);
 +
 +              /* enable VextSupply2 during platform active */
 +              regulator = &ab8500_ext_regulators[AB8500_EXT_SUPPLY2];
 +              regulator->constraints.always_on = 1;
 +
 +              /* disable VextSupply2 in suspend */
 +              regulator = &ab8500_ext_regulators[AB8500_EXT_SUPPLY2];
 +              regulator->constraints.state_mem.disabled = 1;
 +              regulator->constraints.state_standby.disabled = 1;
 +
 +              /* enable VextSupply2 HW control (used in suspend) */
 +              regulator->driver_data = (void *)&ab8500_ext_supply2;
 +      }
 +}
index 9bece38fe9333cf71ec1d95238b57bf955a2f14d,0c79d902f9046666746fa010df44757f56b56c9f..039f5132c370773c7eb8b50b1e16c94cf2e6c1c2
  #include <linux/regulator/machine.h>
  #include <linux/regulator/ab8500.h>
  
 -extern struct ab8500_regulator_reg_init
 -ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS];
 -extern struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS];
 +extern struct ab8500_regulator_platform_data ab8500_regulator_plat_data;
 +extern struct ab8500_regulator_platform_data ab8505_regulator_plat_data;
  extern struct regulator_init_data tps61052_regulator;
  extern struct regulator_init_data gpio_en_3v3_regulator;
+ extern struct regulator_init_data sdi0_reg_init_data;
  
 +void mop500_regulator_init(void);
 +
  #endif
index ce672378a83058c855a5fa053e413b3be1bb2f52,cd100d569f4d2165f5b18525610b8d7fce0e711a..574916b70b2e710215ca6fcb892286a4a3714719
@@@ -12,7 -12,6 +12,7 @@@
  #include <linux/init.h>
  #include <linux/interrupt.h>
  #include <linux/platform_device.h>
 +#include <linux/clk.h>
  #include <linux/io.h>
  #include <linux/i2c.h>
  #include <linux/platform_data/i2c-nomadik.h>
@@@ -25,6 -24,8 +25,8 @@@
  #include <linux/mfd/abx500/ab8500.h>
  #include <linux/regulator/ab8500.h>
  #include <linux/regulator/fixed.h>
+ #include <linux/regulator/driver.h>
+ #include <linux/regulator/gpio-regulator.h>
  #include <linux/mfd/tc3589x.h>
  #include <linux/mfd/tps6105x.h>
  #include <linux/mfd/abx500/ab8500-gpio.h>
@@@ -90,6 -91,37 +92,37 @@@ static struct platform_device snowball_
         },
  };
  
+ /* Dynamically populated. */
+ static struct gpio sdi0_reg_gpios[] = {
+       { 0, GPIOF_OUT_INIT_LOW, "mmci_vsel" },
+ };
+ static struct gpio_regulator_state sdi0_reg_states[] = {
+       { .value = 2900000, .gpios = (0 << 0) },
+       { .value = 1800000, .gpios = (1 << 0) },
+ };
+ static struct gpio_regulator_config sdi0_reg_info = {
+       .supply_name            = "ext-mmc-level-shifter",
+       .gpios                  = sdi0_reg_gpios,
+       .nr_gpios               = ARRAY_SIZE(sdi0_reg_gpios),
+       .states                 = sdi0_reg_states,
+       .nr_states              = ARRAY_SIZE(sdi0_reg_states),
+       .type                   = REGULATOR_VOLTAGE,
+       .enable_high            = 1,
+       .enabled_at_boot        = 0,
+       .init_data              = &sdi0_reg_init_data,
+       .startup_delay          = 100,
+ };
+ static struct platform_device sdi0_regulator = {
+       .name = "gpio-regulator",
+       .id   = -1,
+       .dev  = {
+               .platform_data = &sdi0_reg_info,
+       },
+ };
  static struct abx500_gpio_platform_data ab8500_gpio_pdata = {
        .gpio_base              = MOP500_AB8500_PIN_GPIO(1),
  };
@@@ -199,7 -231,10 +232,7 @@@ static struct platform_device snowball_
  
  struct ab8500_platform_data ab8500_platdata = {
        .irq_base       = MOP500_AB8500_IRQ_BASE,
 -      .regulator_reg_init = ab8500_regulator_reg_init,
 -      .num_regulator_reg_init = ARRAY_SIZE(ab8500_regulator_reg_init),
 -      .regulator      = ab8500_regulators,
 -      .num_regulator  = ARRAY_SIZE(ab8500_regulators),
 +      .regulator      = &ab8500_regulator_plat_data,
        .gpio           = &ab8500_gpio_pdata,
        .codec          = &ab8500_codec_pdata,
  };
@@@ -437,15 -472,6 +470,15 @@@ static void mop500_prox_deactivate(stru
        regulator_put(prox_regulator);
  }
  
 +void mop500_snowball_ethernet_clock_enable(void)
 +{
 +      struct clk *clk;
 +
 +      clk = clk_get_sys("fsmc", NULL);
 +      if (!IS_ERR(clk))
 +              clk_prepare_enable(clk);
 +}
 +
  static struct cryp_platform_data u8500_cryp1_platform_data = {
                .mem_to_engine = {
                                .dir = STEDMA40_MEM_TO_PERIPH,
@@@ -488,6 -514,7 +521,7 @@@ static struct hash_platform_data u8500_
  /* add any platform devices here - TODO */
  static struct platform_device *mop500_platform_devs[] __initdata = {
        &mop500_gpio_keys_device,
+       &sdi0_regulator,
  };
  
  #ifdef CONFIG_STE_DMA40
@@@ -631,6 -658,7 +665,7 @@@ static struct platform_device *snowball
        &snowball_gpio_en_3v3_regulator_dev,
        &u8500_thsens_device,
        &u8500_cpufreq_cooling_device,
+       &sdi0_regulator,
  };
  
  static void __init mop500_init_machine(void)
        platform_device_register(&db8500_prcmu_device);
        mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
  
+       sdi0_reg_info.enable_gpio = GPIO_SDMMC_EN;
+       sdi0_reg_info.gpios[0].gpio = GPIO_SDMMC_1V8_3V_SEL;
        mop500_pinmaps_init();
        parent = u8500_init_devices(&ab8500_platdata);
  
@@@ -675,6 -706,10 +713,10 @@@ static void __init snowball_init_machin
        int i;
  
        platform_device_register(&db8500_prcmu_device);
+       sdi0_reg_info.enable_gpio = SNOWBALL_SDMMC_EN_GPIO;
+       sdi0_reg_info.gpios[0].gpio = SNOWBALL_SDMMC_1V8_3V_GPIO;
        snowball_pinmaps_init();
        parent = u8500_init_devices(&ab8500_platdata);
  
        mop500_audio_init(parent);
        mop500_uart_init(parent);
  
 +      mop500_snowball_ethernet_clock_enable();
 +
        /* This board has full regulator constraints */
        regulator_has_full_constraints();
  }
@@@ -710,6 -743,9 +752,9 @@@ static void __init hrefv60_init_machine
         */
        mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
  
+       sdi0_reg_info.enable_gpio = HREFV60_SDMMC_EN_GPIO;
+       sdi0_reg_info.gpios[0].gpio = HREFV60_SDMMC_1V8_3V_GPIO;
        hrefv60_pinmaps_init();
        parent = u8500_init_devices(&ab8500_platdata);
  
index f1a581844372881e7e0d54aac4b3465495a5941d,1c7f794ad7d198b209528e29873946a2b2995119..5c6c2e633868c81c9410780606f15346c2218d7c
@@@ -282,6 -282,7 +282,7 @@@ static struct of_dev_auxdata u8500_auxd
        OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL),
        OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
                        &db8500_prcmu_pdata),
+       OF_DEV_AUXDATA("smsc,lan9115", 0x50000000, "smsc911x", NULL),
        /* Requires device name bindings. */
        OF_DEV_AUXDATA("stericsson,nmk-pinctrl", U8500_PRCMU_BASE,
                "pinctrl-db8500", NULL),
@@@ -312,10 -313,9 +313,10 @@@ static void __init u8500_init_machine(v
        /* Pinmaps must be in place before devices register */
        if (of_machine_is_compatible("st-ericsson,mop500"))
                mop500_pinmaps_init();
 -      else if (of_machine_is_compatible("calaosystems,snowball-a9500"))
 +      else if (of_machine_is_compatible("calaosystems,snowball-a9500")) {
                snowball_pinmaps_init();
 -      else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
 +              mop500_snowball_ethernet_clock_enable();
 +      } else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
                hrefv60_pinmaps_init();
        else if (of_machine_is_compatible("st-ericsson,ccu9540")) {}
                /* TODO: Add pinmaps for ccu9540 board. */
index f873dcefe0de63b4271ac82302a24892dbe4803d,b92d48be4cc93dab2deb7ad561912f112fecd860..bf194009e20fc029d063b70ae5e741724d4dbb64
@@@ -703,7 -703,7 +703,7 @@@ static void tegra20_pll_init(void
        clks[pll_a_out0] = clk;
  
        /* PLLE */
 -      clk = tegra_clk_register_plle("pll_e", "pll_ref", clk_base, NULL,
 +      clk = tegra_clk_register_plle("pll_e", "pll_ref", clk_base, pmc_base,
                             0, 100000000, &pll_e_params,
                             0, pll_e_freq_table, NULL);
        clk_register_clkdev(clk, "pll_e", NULL);
  }
  
  static const char *cclk_parents[] = { "clk_m", "pll_c", "clk_32k", "pll_m",
-                                     "pll_p_cclk", "pll_p_out4_cclk",
-                                     "pll_p_out3_cclk", "clk_d", "pll_x" };
+                                     "pll_p", "pll_p_out4",
+                                     "pll_p_out3", "clk_d", "pll_x" };
  static const char *sclk_parents[] = { "clk_m", "pll_c_out1", "pll_p_out4",
                                      "pll_p_out3", "pll_p_out2", "clk_d",
                                      "clk_32k", "pll_m_out1" };
@@@ -721,38 -721,6 +721,6 @@@ static void tegra20_super_clk_init(void
  {
        struct clk *clk;
  
-       /*
-        * DIV_U71 dividers for CCLK, these dividers are used only
-        * if parent clock is fixed rate.
-        */
-       /*
-        * Clock input to cclk divided from pll_p using
-        * U71 divider of cclk.
-        */
-       clk = tegra_clk_register_divider("pll_p_cclk", "pll_p",
-                               clk_base + SUPER_CCLK_DIVIDER, 0,
-                               TEGRA_DIVIDER_INT, 16, 8, 1, NULL);
-       clk_register_clkdev(clk, "pll_p_cclk", NULL);
-       /*
-        * Clock input to cclk divided from pll_p_out3 using
-        * U71 divider of cclk.
-        */
-       clk = tegra_clk_register_divider("pll_p_out3_cclk", "pll_p_out3",
-                               clk_base + SUPER_CCLK_DIVIDER, 0,
-                               TEGRA_DIVIDER_INT, 16, 8, 1, NULL);
-       clk_register_clkdev(clk, "pll_p_out3_cclk", NULL);
-       /*
-        * Clock input to cclk divided from pll_p_out4 using
-        * U71 divider of cclk.
-        */
-       clk = tegra_clk_register_divider("pll_p_out4_cclk", "pll_p_out4",
-                               clk_base + SUPER_CCLK_DIVIDER, 0,
-                               TEGRA_DIVIDER_INT, 16, 8, 1, NULL);
-       clk_register_clkdev(clk, "pll_p_out4_cclk", NULL);
        /* CCLK */
        clk = tegra_clk_register_super_mux("cclk", cclk_parents,
                              ARRAY_SIZE(cclk_parents), CLK_SET_RATE_PARENT,
index 48e2b99bec51335c87a877ed5d16f6e4c488d937,df77df16d991c8b6ce197865e5a42a5a9d4ba315..3663b9e04a31345b3a0a02ba28e8c9111de11737
@@@ -33,6 -33,7 +33,7 @@@
  #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  
  #include <linux/crc32.h>
+ #include <linux/clk.h>
  #include <linux/delay.h>
  #include <linux/errno.h>
  #include <linux/etherdevice.h>
@@@ -144,6 -145,9 +145,9 @@@ struct smsc911x_data 
  
        /* regulators */
        struct regulator_bulk_data supplies[SMSC911X_NUM_SUPPLIES];
+       /* clock */
+       struct clk *clk;
  };
  
  /* Easy access to information */
@@@ -369,7 -373,7 +373,7 @@@ out
  }
  
  /*
-  * enable resources, currently just regulators.
+  * enable regulator and clock resources.
   */
  static int smsc911x_enable_resources(struct platform_device *pdev)
  {
        if (ret)
                netdev_err(ndev, "failed to enable regulators %d\n",
                                ret);
+       if (!IS_ERR(pdata->clk)) {
+               ret = clk_prepare_enable(pdata->clk);
+               if (ret < 0)
+                       netdev_err(ndev, "failed to enable clock %d\n", ret);
+       }
        return ret;
  }
  
@@@ -396,6 -407,10 +407,10 @@@ static int smsc911x_disable_resources(s
  
        ret = regulator_bulk_disable(ARRAY_SIZE(pdata->supplies),
                        pdata->supplies);
+       if (!IS_ERR(pdata->clk))
+               clk_disable_unprepare(pdata->clk);
        return ret;
  }
  
@@@ -421,6 -436,12 +436,12 @@@ static int smsc911x_request_resources(s
        if (ret)
                netdev_err(ndev, "couldn't get regulators %d\n",
                                ret);
+       /* Request clock */
+       pdata->clk = clk_get(&pdev->dev, NULL);
+       if (IS_ERR(pdata->clk))
+               netdev_warn(ndev, "couldn't get clock %li\n", PTR_ERR(pdata->clk));
        return ret;
  }
  
@@@ -436,6 -457,12 +457,12 @@@ static void smsc911x_free_resources(str
        /* Free regulators */
        regulator_bulk_free(ARRAY_SIZE(pdata->supplies),
                        pdata->supplies);
+       /* Free clock */
+       if (!IS_ERR(pdata->clk)) {
+               clk_put(pdata->clk);
+               pdata->clk = NULL;
+       }
  }
  
  /* waits for MAC not busy, with timeout.  Only called by smsc911x_mac_read
@@@ -2115,7 -2142,7 +2142,7 @@@ static int smsc911x_init(struct net_dev
        spin_lock_init(&pdata->dev_lock);
        spin_lock_init(&pdata->mac_lock);
  
 -      if (pdata->ioaddr == 0) {
 +      if (pdata->ioaddr == NULL) {
                SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000");
                return -ENODEV;
        }