ARM: sun8i: h3: orangepi-pc: Enable USB OTG

The Orange Pi PC, PC Plus, and Plus 2E all have a USB OTG port
that can be used in both powered host mode and peripheral mode.
When in peripheral mode, the port does not power the board.
There is no VBUS sensing on the port. All three boards have all
related pins routed the same way.

The device tree file for the Orange Pi Plus 2E is based on the
Orange Pi PC Plus, which itself is based on the Orange Pi PC.
Changes to the base Orange Pi PC device tree file affects all 3
boards.

This patch adds the regulator controlling VBUS on the OTG port,
the GPIO for the ID detect pin, and enables the USB OTG and host
controllers.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index f148111c326d073674de51ca921ca97525bf28fd..1a044b17d6c61e5cc391782c5e06aa3df7322548 100644 (file)
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -97,6 +97,10 @@
        status = "okay";
 };
 
+&ehci0 {
+       status = "okay";
+};
+
 &ehci1 {
        status = "okay";
 };
@@ -125,6 +129,10 @@
        status = "okay";
 };
 
+&ohci0 {
+       status = "okay";
+};
+
 &ohci1 {
        status = "okay";
 };
@@ -156,6 +164,11 @@
        };
 };
 
+&reg_usb0_vbus {
+       gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
+       status = "okay";
+};
+
 &uart0 {
        pinctrl-names = "default";
        pinctrl-0 = <&uart0_pins_a>;
@@ -180,7 +193,14 @@
        status = "disabled";
 };
 
+&usb_otg {
+       dr_mode = "otg";
+       status = "okay";
+};
+
 &usbphy {
-       /* USB VBUS is always on */
+       usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+       usb0_vbus-supply = <&reg_usb0_vbus>;
+       /* VBUS on USB host ports are always on */
        status = "okay";
 };