Blackfin: bfin_spi: round up clock divider

If the requested clock cannot be exactly obtained, round it up so that we
err on the side of slightly slower rather than slightly faster.

Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>

diff --git a/drivers/spi/bfin_spi.c b/drivers/spi/bfin_spi.c
index 093166efed8f6155329b703f1a1bed2d533973eb..f28d42b4893d5a30499af9e3ffc821eee03e3877 100644 (file)
--- a/drivers/spi/bfin_spi.c
+++ b/drivers/spi/bfin_spi.c
@@ -85,6 +85,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
                unsigned int max_hz, unsigned int mode)
 {
        struct bfin_spi_slave *bss;
+       ulong sclk;
        u32 mmr_base;
        u32 baud;
 
@@ -105,7 +106,11 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
                default: return NULL;
        }
 
-       baud = get_sclk() / (2 * max_hz);
+       sclk = get_sclk();
+       baud = sclk / (2 * max_hz);
+       /* baud should be rounded up */
+       if (sclk % (2 * max_hz))
+               baud += 1;
        if (baud < 2)
                baud = 2;
        else if (baud > (u16)-1)