ARM: EXYNOS: Fix crash on soft reset on EXYNOS5440

The soft-reset control register is located in the XMU controller space.
Map this controller space before writing to the soft-reset controller
register.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Girish K S <ks.giri@samsung.com>
Signed-off-by: Kukjin <kgene.kim@samsung.com>

diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index e07da6e186a3acfed8e09c784abba10897ded1c9..0c7e3ad7ba93fb8583b4ce16a1c71ea44f47a118 100644 (file)
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -299,6 +299,7 @@ void exynos4_restart(char mode, const char *cmd)
 
 void exynos5_restart(char mode, const char *cmd)
 {
+       struct device_node *np;
        u32 val;
        void __iomem *addr;
 
@@ -306,8 +307,9 @@ void exynos5_restart(char mode, const char *cmd)
                val = 0x1;
                addr = EXYNOS_SWRESET;
        } else if (of_machine_is_compatible("samsung,exynos5440")) {
-               val = (0x10 << 20) | (0x1 << 16);
-               addr = EXYNOS5440_SWRESET;
+               np = of_find_compatible_node(NULL, NULL, "samsung,exynos5440-clock");
+               addr = of_iomap(np, 0) + 0xcc;
+               val = (0xfff << 20) | (0x1 << 16);
        } else {
                pr_err("%s: cannot support non-DT\n", __func__);
                return;