+++ /dev/null
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_S5PV210=y
-CONFIG_S3C_LOWLEVEL_UART_PORT=1
-CONFIG_MACH_SMDKC110=y
-CONFIG_VMSPLIT_2G=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
-CONFIG_VFP=y
-CONFIG_NEON=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-# CONFIG_MISC_DEVICES is not set
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_SAMSUNG=y
-CONFIG_SERIAL_SAMSUNG_CONSOLE=y
-CONFIG_HW_RANDOM=y
-# CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_INOTIFY=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_CRAMFS=y
-CONFIG_ROMFS_FS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_BSD_DISKLABEL=y
-CONFIG_SOLARIS_X86_PARTITION=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_PREEMPT is not set
-CONFIG_DEBUG_RT_MUTEXES=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_MUTEXES=y
-CONFIG_DEBUG_SPINLOCK_SLEEP=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-CONFIG_EARLY_PRINTK=y
-CONFIG_DEBUG_S3C_UART=1
-CONFIG_CRC_CCITT=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_ARCH_S5PV210=y
CONFIG_S3C_LOWLEVEL_UART_PORT=1
+CONFIG_S3C_DEV_FB=y
+CONFIG_S5PV210_SETUP_FB_24BPP=y
+CONFIG_MACH_AQUILA=y
+CONFIG_MACH_GONI=y
+CONFIG_MACH_SMDKC110=y
CONFIG_MACH_SMDKV210=y
CONFIG_VMSPLIT_2G=y
CONFIG_PREEMPT=y
help
Enable S5P6440 CPU support
+config S5P6440_SETUP_I2C1
+ bool
+ help
+ Common setup code for i2c bus 1.
+
config MACH_SMDK6440
bool "SMDK6440"
select CPU_S5P6440
select SAMSUNG_DEV_TS
select SAMSUNG_DEV_ADC
+ select S3C_DEV_RTC
+ select S3C_DEV_I2C1
select S3C_DEV_WDT
+ select HAVE_S3C_RTC
select HAVE_S3C2410_WATCHDOG
+ select S5P6440_SETUP_I2C1
help
Machine support for the Samsung SMDK6440
# device support
obj-y += dev-audio.o
obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
+obj-$(CONFIG_S5P6440_SETUP_I2C1) += setup-i2c1.o
#define S5P_PA_TIMER S5P6440_PA_TIMER
#define S5P6440_PA_RTC (0xEA100000)
-#define S5P_PA_RTC S5P6440_PA_RTC
#define S5P6440_PA_WDT (0xEA200000)
#define S5P_PA_WDT S5P6440_PA_WDT
#define S5P_SZ_UART SZ_256
#define S5P6440_PA_IIC0 (0xEC104000)
+#define S5P6440_PA_IIC1 (0xEC20F000)
#define S5P6440_PA_SPI0 0xEC400000
#define S5P6440_PA_SPI1 0xEC500000
/* compatibiltiy defines. */
#define S3C_PA_UART S5P6440_PA_UART
#define S3C_PA_IIC S5P6440_PA_IIC0
+#define S3C_PA_RTC S5P6440_PA_RTC
+#define S3C_PA_IIC1 S5P6440_PA_IIC1
#define S3C_PA_WDT S5P6440_PA_WDT
#define SAMSUNG_PA_ADC S5P6440_PA_ADC
#include <linux/timer.h>
#include <linux/delay.h>
#include <linux/init.h>
+#include <linux/i2c.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <mach/regs-clock.h>
#include <plat/devs.h>
#include <plat/cpu.h>
+#include <plat/iic.h>
#include <plat/pll.h>
#include <plat/adc.h>
#include <plat/ts.h>
static struct platform_device *smdk6440_devices[] __initdata = {
&s5p6440_device_iis,
&s3c_device_adc,
+ &s3c_device_rtc,
+ &s3c_device_i2c0,
+ &s3c_device_i2c1,
&s3c_device_ts,
&s3c_device_wdt,
};
+static struct i2c_board_info smdk6440_i2c_devs0[] __initdata = {
+ { I2C_BOARD_INFO("24c08", 0x50), },
+};
+
+static struct i2c_board_info smdk6440_i2c_devs1[] __initdata = {
+ /* To be populated */
+};
+
static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
.delay = 10000,
.presc = 49,
{
s3c24xx_ts_set_platdata(&s3c_ts_platform);
+ /* I2C */
+ s3c_i2c0_set_platdata(NULL);
+ s3c_i2c1_set_platdata(NULL);
+ i2c_register_board_info(0, smdk6440_i2c_devs0,
+ ARRAY_SIZE(smdk6440_i2c_devs0));
+ i2c_register_board_info(1, smdk6440_i2c_devs1,
+ ARRAY_SIZE(smdk6440_i2c_devs1));
+
platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices));
}
struct platform_device; /* don't need the contents */
+#include <linux/gpio.h>
+#include <plat/gpio-cfg.h>
#include <plat/iic.h>
void s3c_i2c0_cfg_gpio(struct platform_device *dev)
{
- /* Will be populated later */
+ s3c_gpio_cfgpin(S5P6440_GPB(5), S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(S5P6440_GPB(5), S3C_GPIO_PULL_UP);
+ s3c_gpio_cfgpin(S5P6440_GPB(6), S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(S5P6440_GPB(6), S3C_GPIO_PULL_UP);
}
--- /dev/null
+/* linux/arch/arm/mach-s5p6440/setup-i2c1.c
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com/
+ *
+ * I2C1 GPIO configuration.
+ *
+ * Based on plat-s3c64xx/setup-i2c0.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/gpio.h>
+
+struct platform_device; /* don't need the contents */
+
+#include <plat/gpio-cfg.h>
+#include <plat/iic.h>
+
+void s3c_i2c1_cfg_gpio(struct platform_device *dev)
+{
+ s3c_gpio_cfgpin(S5P6440_GPR(9), S3C_GPIO_SFN(6));
+ s3c_gpio_setpull(S5P6440_GPR(9), S3C_GPIO_PULL_UP);
+ s3c_gpio_cfgpin(S5P6440_GPR(10), S3C_GPIO_SFN(6));
+ s3c_gpio_setpull(S5P6440_GPR(10), S3C_GPIO_PULL_UP);
+}
config MACH_SMDK6442
bool "SMDK6442"
select CPU_S5P6442
+ select S3C_DEV_WDT
+ select HAVE_S3C2410_WATCHDOG
help
Machine support for Samsung SMDK6442
.parent = &clk_pclkd1,
.enable = s5p6442_clk_ip3_ctrl,
.ctrlbit = (1<<19),
+ }, {
+ .name = "watchdog",
+ .id = -1,
+ .parent = &clk_pclkd1,
+ .enable = s5p6442_clk_ip3_ctrl,
+ .ctrlbit = (1 << 22),
}, {
.name = "timers",
.id = -1,
#define S5P6442_PA_SYSTIMER (0xEA100000)
+#define S5P6442_PA_WATCHDOG (0xEA200000)
+
#define S5P6442_PA_UART (0xEC000000)
#define S5P_PA_UART0 (S5P6442_PA_UART + 0x0)
#define S5P6442_PA_PCM1 0xF2500000
/* compatibiltiy defines. */
+#define S3C_PA_WDT S5P6442_PA_WATCHDOG
#define S3C_PA_UART S5P6442_PA_UART
#define S3C_PA_IIC S5P6442_PA_IIC0
static struct platform_device *smdk6442_devices[] __initdata = {
&s5p6442_device_iis0,
+ &s3c_device_wdt,
};
static void __init smdk6442_map_io(void)
help
Common setup code for i2c bus 1.
+config S5PC100_SETUP_IDE
+ bool
+ help
+ Common setup code for S5PC100 IDE GPIO configurations
+
+config S5PC100_SETUP_KEYPAD
+ bool
+ help
+ Common setup code for KEYPAD GPIO configurations.
+
config S5PC100_SETUP_SDHCI
bool
select S5PC100_SETUP_SDHCI_GPIO
config MACH_SMDKC100
bool "SMDKC100"
select CPU_S5PC100
+ select SAMSUNG_DEV_ADC
select S3C_DEV_FB
select S3C_DEV_I2C1
+ select SAMSUNG_DEV_IDE
select S3C_DEV_HSMMC
select S3C_DEV_HSMMC1
select S3C_DEV_HSMMC2
+ select SAMSUNG_DEV_KEYPAD
+ select S3C_DEV_RTC
+ select SAMSUNG_DEV_TS
+ select S3C_DEV_WDT
+ select HAVE_S3C2410_WATCHDOG
select S5PC100_SETUP_FB_24BPP
select S5PC100_SETUP_I2C1
+ select S5PC100_SETUP_IDE
+ select S5PC100_SETUP_KEYPAD
select S5PC100_SETUP_SDHCI
+ select HAVE_S3C_RTC
help
Machine support for the Samsung SMDKC100
obj-$(CONFIG_S5PC100_SETUP_FB_24BPP) += setup-fb-24bpp.o
obj-$(CONFIG_S5PC100_SETUP_I2C1) += setup-i2c1.o
+obj-$(CONFIG_S5PC100_SETUP_IDE) += setup-ide.o
+obj-$(CONFIG_S5PC100_SETUP_KEYPAD) += setup-keypad.o
obj-$(CONFIG_S5PC100_SETUP_SDHCI) += setup-sdhci.o
obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
.enable = s5pc100_d1_5_ctrl,
.ctrlbit = (1 << 7),
}, {
- .name = "keyif",
+ .name = "keypad",
.id = -1,
.parent = &clk_div_d1_bus.clk,
.enable = s5pc100_d1_5_ctrl,
.reg_div = { .reg = S5P_CLK_DIV3, .shift = 24, .size = 4 },
}, {
.clk = {
- .name = "mmc_bus",
+ .name = "sclk_mmc",
.id = 0,
.ctrlbit = (1 << 12),
.enable = s5pc100_sclk1_ctrl,
.reg_div = { .reg = S5P_CLK_DIV3, .shift = 0, .size = 4 },
}, {
.clk = {
- .name = "mmc_bus",
+ .name = "sclk_mmc",
.id = 1,
.ctrlbit = (1 << 13),
.enable = s5pc100_sclk1_ctrl,
.reg_div = { .reg = S5P_CLK_DIV3, .shift = 4, .size = 4 },
}, {
.clk = {
- .name = "mmc_bus",
+ .name = "sclk_mmc",
.id = 2,
.ctrlbit = (1 << 14),
.enable = s5pc100_sclk1_ctrl,
#include <plat/cpu.h>
#include <plat/devs.h>
#include <plat/clock.h>
+#include <plat/ata-core.h>
#include <plat/iic-core.h>
#include <plat/sdhci.h>
+#include <plat/adc-core.h>
#include <plat/onenand-core.h>
#include <plat/s5pc100.h>
s5pc100_default_sdhci1();
s5pc100_default_sdhci2();
+ s3c_adc_setname("s3c64xx-adc");
+
/* the i2c devices are directly compatible with s3c2440 */
s3c_i2c0_setname("s3c2440-i2c");
s3c_i2c1_setname("s3c2440-i2c");
s3c_onenand_setname("s5pc100-onenand");
+ s3c_cfcon_setname("s5pc100-pata");
}
void __init s5pc100_init_clocks(int xtal)
#define IRQ_IEMIEC S5P_IRQ_VIC1(6)
#define IRQ_ONENAND S5P_IRQ_VIC1(7)
#define IRQ_NFC S5P_IRQ_VIC1(8)
-#define IRQ_CFC S5P_IRQ_VIC1(9)
+#define IRQ_CFCON S5P_IRQ_VIC1(9)
#define IRQ_UART0 S5P_IRQ_VIC1(10)
#define IRQ_UART1 S5P_IRQ_VIC1(11)
#define IRQ_UART2 S5P_IRQ_VIC1(12)
#define S5PC100_PA_ONENAND (0xE7100000)
+#define S5PC100_PA_CFCON (0xE7800000)
+
/* DMA */
#define S5PC100_PA_MDMA (0xE8100000)
#define S5PC100_PA_PDMA0 (0xE9000000)
#define S5PC100_PA_SYSTIMER (0xEA100000)
+#define S5PC100_PA_WATCHDOG (0xEA200000)
+#define S5PC100_PA_RTC (0xEA300000)
+
#define S5PC100_PA_UART (0xEC000000)
#define S5P_PA_UART0 (S5PC100_PA_UART + 0x0)
#define S5PC100_PA_PCM0 0xF2400000
#define S5PC100_PA_PCM1 0xF2500000
+#define S5PC100_PA_TSADC (0xF3000000)
+
/* KEYPAD */
#define S5PC100_PA_KEYPAD (0xF3100000)
#define S3C_PA_HSMMC1 S5PC100_PA_HSMMC(1)
#define S3C_PA_HSMMC2 S5PC100_PA_HSMMC(2)
#define S3C_PA_KEYPAD S5PC100_PA_KEYPAD
+#define S3C_PA_WDT S5PC100_PA_WATCHDOG
#define S3C_PA_TSADC S5PC100_PA_TSADC
#define S3C_PA_ONENAND S5PC100_PA_ONENAND
#define S3C_PA_ONENAND_BUF S5PC100_PA_ONENAND_BUF
#define S3C_SZ_ONENAND_BUF S5PC100_SZ_ONENAND_BUF
+#define S3C_PA_RTC S5PC100_PA_RTC
+
+#define SAMSUNG_PA_ADC S5PC100_PA_TSADC
+#define SAMSUNG_PA_CFCON S5PC100_PA_CFCON
+#define SAMSUNG_PA_KEYPAD S5PC100_PA_KEYPAD
#endif /* __ASM_ARCH_C100_MAP_H */
#define S5P_CLKDIV1_PCLKD1_SHIFT (16)
#define S5PC100_SWRESET S5PC100_REG_OTHERS(0x000)
+#define S5PC100_MEM_SYS_CFG S5PC100_REG_OTHERS(0x200)
#define S5PC100_SWRESET_RESETVAL 0xc100
+#define MEM_SYS_CFG_EBI_FIX_PRI_CFCON 0x30
+
#endif /* __ASM_ARCH_REGS_CLOCK_H */
#include <linux/i2c.h>
#include <linux/fb.h>
#include <linux/delay.h>
+#include <linux/input.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/s5pc100.h>
#include <plat/fb.h>
#include <plat/iic.h>
+#include <plat/ata.h>
+#include <plat/adc.h>
+#include <plat/keypad.h>
+#include <plat/ts.h>
/* Following are default values for UCON, ULCON and UFCON UART registers */
#define S5PC100_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
.setup_gpio = s5pc100_fb_gpio_setup_24bpp,
};
+static struct s3c_ide_platdata smdkc100_ide_pdata __initdata = {
+ .setup_gpio = s5pc100_ide_setup_gpio,
+};
+
+static uint32_t smdkc100_keymap[] __initdata = {
+ /* KEY(row, col, keycode) */
+ KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
+ KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
+ KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
+ KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
+};
+
+static struct matrix_keymap_data smdkc100_keymap_data __initdata = {
+ .keymap = smdkc100_keymap,
+ .keymap_size = ARRAY_SIZE(smdkc100_keymap),
+};
+
+static struct samsung_keypad_platdata smdkc100_keypad_data __initdata = {
+ .keymap_data = &smdkc100_keymap_data,
+ .rows = 2,
+ .cols = 8,
+};
+
static struct platform_device *smdkc100_devices[] __initdata = {
+ &s3c_device_adc,
+ &s3c_device_cfcon,
&s3c_device_i2c0,
&s3c_device_i2c1,
&s3c_device_fb,
&s3c_device_hsmmc0,
&s3c_device_hsmmc1,
&s3c_device_hsmmc2,
+ &s3c_device_ts,
+ &s3c_device_wdt,
&smdkc100_lcd_powerdev,
&s5pc100_device_iis0,
+ &samsung_device_keypad,
&s5pc100_device_ac97,
+ &s3c_device_rtc,
+};
+
+static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
+ .delay = 10000,
+ .presc = 49,
+ .oversampling_shift = 2,
};
static void __init smdkc100_map_io(void)
static void __init smdkc100_machine_init(void)
{
+ s3c24xx_ts_set_platdata(&s3c_ts_platform);
+
/* I2C */
s3c_i2c0_set_platdata(NULL);
s3c_i2c1_set_platdata(NULL);
i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
s3c_fb_set_platdata(&smdkc100_lcd_pdata);
+ s3c_ide_set_platdata(&smdkc100_ide_pdata);
+
+ samsung_keypad_set_platdata(&smdkc100_keypad_data);
/* LCD init */
gpio_request(S5PC100_GPD(0), "GPD");
--- /dev/null
+/* linux/arch/arm/mach-s5pc100/setup-ide.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * S5PC100 setup information for IDE
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+#include <linux/io.h>
+
+#include <mach/regs-clock.h>
+#include <plat/gpio-cfg.h>
+
+void s5pc100_ide_setup_gpio(void)
+{
+ u32 reg;
+ u32 gpio = 0;
+
+ /* Independent CF interface, CF chip select configuration */
+ reg = readl(S5PC100_MEM_SYS_CFG) & (~0x3f);
+ writel(reg | MEM_SYS_CFG_EBI_FIX_PRI_CFCON, S5PC100_MEM_SYS_CFG);
+
+ /* CF_Add[0 - 2], CF_IORDY, CF_INTRQ, CF_DMARQ, CF_DMARST, CF_DMACK */
+ for (gpio = S5PC100_GPJ0(0); gpio <= S5PC100_GPJ0(7); gpio++) {
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+ s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
+ }
+
+ /*CF_Data[0 - 7] */
+ for (gpio = S5PC100_GPJ2(0); gpio <= S5PC100_GPJ2(7); gpio++) {
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+ s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
+ }
+
+ /* CF_Data[8 - 15] */
+ for (gpio = S5PC100_GPJ3(0); gpio <= S5PC100_GPJ3(7); gpio++) {
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+ s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
+ }
+
+ /* CF_CS0, CF_CS1, CF_IORD, CF_IOWR */
+ for (gpio = S5PC100_GPJ4(0); gpio <= S5PC100_GPJ4(3); gpio++) {
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+ s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
+ }
+
+ /* EBI_OE, EBI_WE */
+ for (gpio = S5PC100_GPK0(6); gpio <= S5PC100_GPK0(7); gpio++)
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0));
+
+ /* CF_OE, CF_WE */
+ for (gpio = S5PC100_GPK1(6); gpio <= S5PC100_GPK1(7); gpio++) {
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+ }
+
+ /* CF_CD */
+ s3c_gpio_cfgpin(S5PC100_GPK3(5), S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(S5PC100_GPK3(5), S3C_GPIO_PULL_NONE);
+}
--- /dev/null
+/* linux/arch/arm/mach-s5pc100/setup-keypad.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com/
+ *
+ * GPIO configuration for S5PC100 KeyPad device
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/gpio.h>
+#include <plat/gpio-cfg.h>
+
+void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
+{
+ unsigned int gpio;
+ unsigned int end;
+
+ /* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */
+ end = S5PC100_GPH3(rows);
+ for (gpio = S5PC100_GPH3(0); gpio < end; gpio++) {
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+ }
+
+ /* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */
+ end = S5PC100_GPH2(cols);
+ for (gpio = S5PC100_GPH2(0); gpio < end; gpio++) {
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+ }
+}
/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
char *s5pc100_hsmmc_clksrcs[4] = {
- [0] = "hsmmc",
- [1] = "hsmmc",
- /* [2] = "mmc_bus", not yet successfully used yet */
- /* [3] = "48m", - note not successfully used yet */
+ [0] = "hsmmc", /* HCLK */
+ /* [1] = "hsmmc", - duplicate HCLK entry */
+ [2] = "sclk_mmc", /* mmc_bus */
+ /* [3] = "48m", - note not successfully used yet */
};
help
Common setup code for i2c bus 2.
+config S5PV210_SETUP_IDE
+ bool
+ help
+ Common setup code for S5PV210 IDE GPIO configurations
+
config S5PV210_SETUP_FB_24BPP
bool
help
Common setup code for S5PV210 with an 24bpp RGB display helper.
+config S5PV210_SETUP_KEYPAD
+ bool
+ help
+ Common setup code for keypad.
+
config S5PV210_SETUP_SDHCI
bool
select S5PV210_SETUP_SDHCI_GPIO
help
Common setup code for SDHCI gpio.
-# machine support
+menu "S5PC110 Machines"
config MACH_AQUILA
- bool "Samsung Aquila"
+ bool "Aquila"
select CPU_S5PV210
select ARCH_SPARSEMEM_ENABLE
select S5PV210_SETUP_FB_24BPP
+ select S5PV210_SETUP_SDHCI
select S3C_DEV_FB
+ select S5PC110_DEV_ONENAND
+ select S3C_DEV_HSMMC
+ select S3C_DEV_HSMMC1
+ select S3C_DEV_HSMMC2
help
Machine support for the Samsung Aquila target based on S5PC110 SoC
bool "GONI"
select CPU_S5PV210
select ARCH_SPARSEMEM_ENABLE
+ select S5PV210_SETUP_FB_24BPP
+ select S5PV210_SETUP_SDHCI
+ select S3C_DEV_FB
+ select S5PC110_DEV_ONENAND
+ select S3C_DEV_HSMMC
+ select S3C_DEV_HSMMC1
+ select S3C_DEV_HSMMC2
help
Machine support for Samsung GONI board
S5PC110(MCP) is one of package option of S5PV210
+config MACH_SMDKC110
+ bool "SMDKC110"
+ select CPU_S5PV210
+ select ARCH_SPARSEMEM_ENABLE
+ select S3C_DEV_I2C1
+ select S3C_DEV_I2C2
+ select SAMSUNG_DEV_IDE
+ select S3C_DEV_RTC
+ select S3C_DEV_WDT
+ select HAVE_S3C_RTC
+ select HAVE_S3C2410_WATCHDOG
+ select S5PV210_SETUP_I2C1
+ select S5PV210_SETUP_I2C2
+ select S5PV210_SETUP_IDE
+ help
+ Machine support for Samsung SMDKC110
+ S5PC110(MCP) is one of package option of S5PV210
+
+endmenu
+
config S5PC110_DEV_ONENAND
bool
help
Compile in platform device definition for OneNAND1 controller
+menu "S5PV210 Machines"
+
config MACH_SMDKV210
bool "SMDKV210"
select CPU_S5PV210
select ARCH_SPARSEMEM_ENABLE
select SAMSUNG_DEV_ADC
+ select S3C_DEV_HSMMC
+ select S3C_DEV_HSMMC1
+ select S3C_DEV_HSMMC2
+ select S3C_DEV_HSMMC3
+ select S3C_DEV_I2C1
+ select S3C_DEV_I2C2
+ select SAMSUNG_DEV_IDE
+ select SAMSUNG_DEV_KEYPAD
select SAMSUNG_DEV_TS
+ select S3C_DEV_RTC
select S3C_DEV_WDT
+ select HAVE_S3C_RTC
select HAVE_S3C2410_WATCHDOG
+ select S5PV210_SETUP_I2C1
+ select S5PV210_SETUP_I2C2
+ select S5PV210_SETUP_IDE
+ select S5PV210_SETUP_KEYPAD
+ select S5PV210_SETUP_SDHCI
help
Machine support for Samsung SMDKV210
-config MACH_SMDKC110
- bool "SMDKC110"
- select CPU_S5PV210
- select ARCH_SPARSEMEM_ENABLE
- select S3C_DEV_WDT
- select HAVE_S3C2410_WATCHDOG
- help
- Machine support for Samsung SMDKC110
- S5PC110(MCP) is one of package option of S5PV210
+endmenu
endif
obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o
obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o
obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o
+obj-$(CONFIG_S5PV210_SETUP_IDE) += setup-ide.o
+obj-$(CONFIG_S5PV210_SETUP_KEYPAD) += setup-keypad.o
obj-$(CONFIG_S5PV210_SETUP_SDHCI) += setup-sdhci.o
obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
#include <plat/devs.h>
#include <plat/clock.h>
#include <plat/s5pv210.h>
+#include <plat/ata-core.h>
#include <plat/iic-core.h>
+#include <plat/keypad-core.h>
#include <plat/sdhci.h>
+#include <plat/reset.h>
/* Initial IO mappings */
local_irq_enable();
}
+static void s5pv210_sw_reset(void)
+{
+ __raw_writel(0x1, S5P_SWRESET);
+}
+
/* s5pv210_map_io
*
* register the standard cpu IO areas
#ifdef CONFIG_S3C_DEV_ADC
s3c_device_adc.name = "s3c64xx-adc";
#endif
-
iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc));
/* initialise device information early */
s5pv210_default_sdhci0();
s5pv210_default_sdhci1();
s5pv210_default_sdhci2();
+ s5pv210_default_sdhci3();
+
+ s3c_cfcon_setname("s5pv210-pata");
/* the i2c devices are directly compatible with s3c2440 */
s3c_i2c0_setname("s3c2440-i2c");
s3c_i2c1_setname("s3c2440-i2c");
s3c_i2c2_setname("s3c2440-i2c");
+
+ /* Use s5pv210-keypad instead of samsung-keypad */
+ samsung_keypad_setname("s5pv210-keypad");
}
void __init s5pv210_init_clocks(int xtal)
/* set idle function */
pm_idle = s5pv210_idle;
+ /* set sw_reset function */
+ s5p_reset_hook = s5pv210_sw_reset;
+
return sysdev_register(&s5pv210_sysdev);
}
},
[1] = {
.start = S5PC110_PA_ONENAND_DMA,
- .end = S5PC110_PA_ONENAND_DMA + SZ_2K - 1,
+ .end = S5PC110_PA_ONENAND_DMA + SZ_8K - 1,
.flags = IORESOURCE_MEM,
},
+ [2] = {
+ .start = IRQ_ONENAND_AUDI,
+ .end = IRQ_ONENAND_AUDI,
+ .flags = IORESOURCE_IRQ,
+ },
};
struct platform_device s5pc110_device_onenand = {
.ngpio = S5PV210_GPIO_MP03_NR,
.label = "MP03",
},
+ }, {
+ .config = &gpio_cfg_noint,
+ .chip = {
+ .base = S5PV210_MP04(0),
+ .ngpio = S5PV210_GPIO_MP04_NR,
+ .label = "MP04",
+ },
+ }, {
+ .config = &gpio_cfg_noint,
+ .chip = {
+ .base = S5PV210_MP05(0),
+ .ngpio = S5PV210_GPIO_MP05_NR,
+ .label = "MP05",
+ },
}, {
.base = (S5P_VA_GPIO + 0xC00),
.config = &gpio_cfg_noint,
#define S5PV210_GPIO_MP01_NR (8)
#define S5PV210_GPIO_MP02_NR (4)
#define S5PV210_GPIO_MP03_NR (8)
+#define S5PV210_GPIO_MP04_NR (8)
+#define S5PV210_GPIO_MP05_NR (8)
/* GPIO bank numbers */
S5PV210_GPIO_MP01_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J4),
S5PV210_GPIO_MP02_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP01),
S5PV210_GPIO_MP03_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP02),
+ S5PV210_GPIO_MP04_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP03),
+ S5PV210_GPIO_MP05_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP04),
};
/* S5PV210 GPIO number definitions */
#define S5PV210_MP01(_nr) (S5PV210_GPIO_MP01_START + (_nr))
#define S5PV210_MP02(_nr) (S5PV210_GPIO_MP02_START + (_nr))
#define S5PV210_MP03(_nr) (S5PV210_GPIO_MP03_START + (_nr))
+#define S5PV210_MP04(_nr) (S5PV210_GPIO_MP04_START + (_nr))
+#define S5PV210_MP05(_nr) (S5PV210_GPIO_MP05_START + (_nr))
/* the end of the S5PV210 specific gpios */
-#define S5PV210_GPIO_END (S5PV210_MP03(S5PV210_GPIO_MP03_NR) + 1)
+#define S5PV210_GPIO_END (S5PV210_MP05(S5PV210_GPIO_MP05_NR) + 1)
#define S3C_GPIO_END S5PV210_GPIO_END
-/* define the number of gpios we need to the one after the MP03() range */
-#define ARCH_NR_GPIOS (S5PV210_MP03(S5PV210_GPIO_MP03_NR) + \
+/* define the number of gpios we need to the one after the MP05() range */
+#define ARCH_NR_GPIOS (S5PV210_MP05(S5PV210_GPIO_MP05_NR) + \
CONFIG_SAMSUNG_GPIO_EXTRA + 1)
#include <asm-generic/gpio.h>
#define IRQ_IEMIEC S5P_IRQ_VIC1(6)
#define IRQ_ONENAND S5P_IRQ_VIC1(7)
#define IRQ_NFC S5P_IRQ_VIC1(8)
-#define IRQ_CFC S5P_IRQ_VIC1(9)
+#define IRQ_CFCON S5P_IRQ_VIC1(9)
#define IRQ_UART0 S5P_IRQ_VIC1(10)
#define IRQ_UART1 S5P_IRQ_VIC1(11)
#define IRQ_UART2 S5P_IRQ_VIC1(12)
#define S5PV210_PA_SPI0 0xE1300000
#define S5PV210_PA_SPI1 0xE1400000
+#define S5PV210_PA_KEYPAD (0xE1600000)
+
#define S5PV210_PA_IIC0 (0xE1800000)
#define S5PV210_PA_IIC1 (0xFAB00000)
#define S5PV210_PA_IIC2 (0xE1A00000)
#define S5PV210_PA_WATCHDOG (0xE2700000)
+#define S5PV210_PA_RTC (0xE2800000)
#define S5PV210_PA_UART (0xE2900000)
#define S5P_PA_UART0 (S5PV210_PA_UART + 0x0)
#define S5PV210_PA_SROMC (0xE8000000)
+#define S5PV210_PA_CFCON (0xE8200000)
+
#define S5PV210_PA_MDMA 0xFA200000
#define S5PV210_PA_PDMA0 0xE0900000
#define S5PV210_PA_PDMA1 0xE0A00000
#define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0)
#define S3C_PA_HSMMC1 S5PV210_PA_HSMMC(1)
#define S3C_PA_HSMMC2 S5PV210_PA_HSMMC(2)
+#define S3C_PA_HSMMC3 S5PV210_PA_HSMMC(3)
#define S3C_PA_IIC S5PV210_PA_IIC0
#define S3C_PA_IIC1 S5PV210_PA_IIC1
#define S3C_PA_IIC2 S5PV210_PA_IIC2
#define S3C_PA_FB S5PV210_PA_FB
+#define S3C_PA_RTC S5PV210_PA_RTC
#define S3C_PA_WDT S5PV210_PA_WATCHDOG
#define SAMSUNG_PA_ADC S5PV210_PA_ADC
+#define SAMSUNG_PA_CFCON S5PV210_PA_CFCON
+#define SAMSUNG_PA_KEYPAD S5PV210_PA_KEYPAD
#endif /* __ASM_ARCH_MAP_H */
#define PHYS_OFFSET UL(0x20000000)
#define CONSISTENT_DMA_SIZE (SZ_8M + SZ_4M + SZ_2M)
-/* Maximum of 256MiB in one bank */
-#define MAX_PHYSMEM_BITS 32
+/*
+ * Sparsemem support
+ * Physical memory can be located from 0x20000000 to 0x7fffffff,
+ * so MAX_PHYSMEM_BITS is 31.
+ */
+
+#define MAX_PHYSMEM_BITS 31
#define SECTION_SIZE_BITS 28
#endif /* __ASM_ARCH_MEMORY_H */
#define S5P_CLKDIV0_PCLK66_SHIFT (28)
#define S5P_CLKDIV0_PCLK66_MASK (0x7 << S5P_CLKDIV0_PCLK66_SHIFT)
+#define S5P_SWRESET S5P_CLKREG(0x2000)
+
/* Registers related to power management */
#define S5P_PWR_CFG S5P_CLKREG(0xC000)
#define S5P_EINT_WAKEUP_MASK S5P_CLKREG(0xC004)
#include <linux/init.h>
#include <linux/serial_core.h>
#include <linux/fb.h>
+#include <linux/i2c.h>
+#include <linux/i2c-gpio.h>
+#include <linux/mfd/max8998.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <linux/gpio.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/regs-clock.h>
#include <mach/regs-fb.h>
+#include <plat/gpio-cfg.h>
#include <plat/regs-serial.h>
#include <plat/s5pv210.h>
#include <plat/devs.h>
#include <plat/cpu.h>
#include <plat/fb.h>
+#include <plat/sdhci.h>
/* Following are default values for UCON, ULCON and UFCON UART registers */
#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
#define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8
-#define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
- S5PV210_UFCON_TXTRIG4 | \
- S5PV210_UFCON_RXTRIG4)
+#define S5PV210_UFCON_DEFAULT S3C2410_UFCON_FIFOMODE
-static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
+static struct s3c2410_uartcfg aquila_uartcfgs[] __initdata = {
[0] = {
.hwport = 0,
.flags = 0,
.ucon = S5PV210_UCON_DEFAULT,
.ulcon = S5PV210_ULCON_DEFAULT,
- .ufcon = S5PV210_UFCON_DEFAULT,
+ /*
+ * Actually UART0 can support 256 bytes fifo, but aquila board
+ * supports 128 bytes fifo because of initial chip bug
+ */
+ .ufcon = S5PV210_UFCON_DEFAULT |
+ S5PV210_UFCON_TXTRIG128 | S5PV210_UFCON_RXTRIG128,
},
[1] = {
.hwport = 1,
.flags = 0,
.ucon = S5PV210_UCON_DEFAULT,
.ulcon = S5PV210_ULCON_DEFAULT,
- .ufcon = S5PV210_UFCON_DEFAULT,
+ .ufcon = S5PV210_UFCON_DEFAULT |
+ S5PV210_UFCON_TXTRIG64 | S5PV210_UFCON_RXTRIG64,
},
[2] = {
.hwport = 2,
.flags = 0,
.ucon = S5PV210_UCON_DEFAULT,
.ulcon = S5PV210_ULCON_DEFAULT,
- .ufcon = S5PV210_UFCON_DEFAULT,
+ .ufcon = S5PV210_UFCON_DEFAULT |
+ S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
},
[3] = {
.hwport = 3,
.flags = 0,
.ucon = S5PV210_UCON_DEFAULT,
.ulcon = S5PV210_ULCON_DEFAULT,
- .ufcon = S5PV210_UFCON_DEFAULT,
+ .ufcon = S5PV210_UFCON_DEFAULT |
+ S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
},
};
.setup_gpio = s5pv210_fb_gpio_setup_24bpp,
};
+/* MAX8998 regulators */
+#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE)
+
+static struct regulator_init_data aquila_ldo2_data = {
+ .constraints = {
+ .name = "VALIVE_1.1V",
+ .min_uV = 1100000,
+ .max_uV = 1100000,
+ .apply_uV = 1,
+ .always_on = 1,
+ .state_mem = {
+ .enabled = 1,
+ },
+ },
+};
+
+static struct regulator_init_data aquila_ldo3_data = {
+ .constraints = {
+ .name = "VUSB/MIPI_1.1V",
+ .min_uV = 1100000,
+ .max_uV = 1100000,
+ .apply_uV = 1,
+ .always_on = 1,
+ },
+};
+
+static struct regulator_init_data aquila_ldo4_data = {
+ .constraints = {
+ .name = "VDAC_3.3V",
+ .min_uV = 3300000,
+ .max_uV = 3300000,
+ .apply_uV = 1,
+ },
+};
+
+static struct regulator_init_data aquila_ldo5_data = {
+ .constraints = {
+ .name = "VTF_2.8V",
+ .min_uV = 2800000,
+ .max_uV = 2800000,
+ .apply_uV = 1,
+ },
+};
+
+static struct regulator_init_data aquila_ldo6_data = {
+ .constraints = {
+ .name = "VCC_3.3V",
+ .min_uV = 3300000,
+ .max_uV = 3300000,
+ .apply_uV = 1,
+ },
+};
+
+static struct regulator_init_data aquila_ldo7_data = {
+ .constraints = {
+ .name = "VCC_3.0V",
+ .min_uV = 3000000,
+ .max_uV = 3000000,
+ .apply_uV = 1,
+ .boot_on = 1,
+ .always_on = 1,
+ },
+};
+
+static struct regulator_init_data aquila_ldo8_data = {
+ .constraints = {
+ .name = "VUSB/VADC_3.3V",
+ .min_uV = 3300000,
+ .max_uV = 3300000,
+ .apply_uV = 1,
+ .always_on = 1,
+ },
+};
+
+static struct regulator_init_data aquila_ldo9_data = {
+ .constraints = {
+ .name = "VCC/VCAM_2.8V",
+ .min_uV = 2800000,
+ .max_uV = 2800000,
+ .apply_uV = 1,
+ .always_on = 1,
+ },
+};
+
+static struct regulator_init_data aquila_ldo10_data = {
+ .constraints = {
+ .name = "VPLL_1.1V",
+ .min_uV = 1100000,
+ .max_uV = 1100000,
+ .apply_uV = 1,
+ .boot_on = 1,
+ },
+};
+
+static struct regulator_init_data aquila_ldo11_data = {
+ .constraints = {
+ .name = "CAM_IO_2.8V",
+ .min_uV = 2800000,
+ .max_uV = 2800000,
+ .apply_uV = 1,
+ .always_on = 1,
+ },
+};
+
+static struct regulator_init_data aquila_ldo12_data = {
+ .constraints = {
+ .name = "CAM_ISP_1.2V",
+ .min_uV = 1200000,
+ .max_uV = 1200000,
+ .apply_uV = 1,
+ .always_on = 1,
+ },
+};
+
+static struct regulator_init_data aquila_ldo13_data = {
+ .constraints = {
+ .name = "CAM_A_2.8V",
+ .min_uV = 2800000,
+ .max_uV = 2800000,
+ .apply_uV = 1,
+ .always_on = 1,
+ },
+};
+
+static struct regulator_init_data aquila_ldo14_data = {
+ .constraints = {
+ .name = "CAM_CIF_1.8V",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .apply_uV = 1,
+ .always_on = 1,
+ },
+};
+
+static struct regulator_init_data aquila_ldo15_data = {
+ .constraints = {
+ .name = "CAM_AF_3.3V",
+ .min_uV = 3300000,
+ .max_uV = 3300000,
+ .apply_uV = 1,
+ .always_on = 1,
+ },
+};
+
+static struct regulator_init_data aquila_ldo16_data = {
+ .constraints = {
+ .name = "VMIPI_1.8V",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .apply_uV = 1,
+ .always_on = 1,
+ },
+};
+
+static struct regulator_init_data aquila_ldo17_data = {
+ .constraints = {
+ .name = "CAM_8M_1.8V",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .apply_uV = 1,
+ .always_on = 1,
+ },
+};
+
+/* BUCK */
+static struct regulator_consumer_supply buck1_consumer[] = {
+ { .supply = "vddarm", },
+};
+
+static struct regulator_consumer_supply buck2_consumer[] = {
+ { .supply = "vddint", },
+};
+
+static struct regulator_init_data aquila_buck1_data = {
+ .constraints = {
+ .name = "VARM_1.2V",
+ .min_uV = 1200000,
+ .max_uV = 1200000,
+ .apply_uV = 1,
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
+ REGULATOR_CHANGE_STATUS,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(buck1_consumer),
+ .consumer_supplies = buck1_consumer,
+};
+
+static struct regulator_init_data aquila_buck2_data = {
+ .constraints = {
+ .name = "VINT_1.2V",
+ .min_uV = 1200000,
+ .max_uV = 1200000,
+ .apply_uV = 1,
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
+ REGULATOR_CHANGE_STATUS,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(buck2_consumer),
+ .consumer_supplies = buck2_consumer,
+};
+
+static struct regulator_init_data aquila_buck3_data = {
+ .constraints = {
+ .name = "VCC_1.8V",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .apply_uV = 1,
+ .state_mem = {
+ .enabled = 1,
+ },
+ },
+};
+
+static struct regulator_init_data aquila_buck4_data = {
+ .constraints = {
+ .name = "CAM_CORE_1.2V",
+ .min_uV = 1200000,
+ .max_uV = 1200000,
+ .apply_uV = 1,
+ .always_on = 1,
+ },
+};
+
+static struct max8998_regulator_data aquila_regulators[] = {
+ { MAX8998_LDO2, &aquila_ldo2_data },
+ { MAX8998_LDO3, &aquila_ldo3_data },
+ { MAX8998_LDO4, &aquila_ldo4_data },
+ { MAX8998_LDO5, &aquila_ldo5_data },
+ { MAX8998_LDO6, &aquila_ldo6_data },
+ { MAX8998_LDO7, &aquila_ldo7_data },
+ { MAX8998_LDO8, &aquila_ldo8_data },
+ { MAX8998_LDO9, &aquila_ldo9_data },
+ { MAX8998_LDO10, &aquila_ldo10_data },
+ { MAX8998_LDO11, &aquila_ldo11_data },
+ { MAX8998_LDO12, &aquila_ldo12_data },
+ { MAX8998_LDO13, &aquila_ldo13_data },
+ { MAX8998_LDO14, &aquila_ldo14_data },
+ { MAX8998_LDO15, &aquila_ldo15_data },
+ { MAX8998_LDO16, &aquila_ldo16_data },
+ { MAX8998_LDO17, &aquila_ldo17_data },
+ { MAX8998_BUCK1, &aquila_buck1_data },
+ { MAX8998_BUCK2, &aquila_buck2_data },
+ { MAX8998_BUCK3, &aquila_buck3_data },
+ { MAX8998_BUCK4, &aquila_buck4_data },
+};
+
+static struct max8998_platform_data aquila_max8998_pdata = {
+ .num_regulators = ARRAY_SIZE(aquila_regulators),
+ .regulators = aquila_regulators,
+};
+#endif
+
+/* GPIO I2C PMIC */
+#define AP_I2C_GPIO_PMIC_BUS_4 4
+static struct i2c_gpio_platform_data aquila_i2c_gpio_pmic_data = {
+ .sda_pin = S5PV210_GPJ4(0), /* XMSMCSN */
+ .scl_pin = S5PV210_GPJ4(3), /* XMSMIRQN */
+};
+
+static struct platform_device aquila_i2c_gpio_pmic = {
+ .name = "i2c-gpio",
+ .id = AP_I2C_GPIO_PMIC_BUS_4,
+ .dev = {
+ .platform_data = &aquila_i2c_gpio_pmic_data,
+ },
+};
+
+static struct i2c_board_info i2c_gpio_pmic_devs[] __initdata = {
+#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE)
+ {
+ /* 0xCC when SRAD = 0 */
+ I2C_BOARD_INFO("max8998", 0xCC >> 1),
+ .platform_data = &aquila_max8998_pdata,
+ },
+#endif
+};
+
+/* PMIC Power button */
+static struct gpio_keys_button aquila_gpio_keys_table[] = {
+ {
+ .code = KEY_POWER,
+ .gpio = S5PV210_GPH2(6),
+ .desc = "gpio-keys: KEY_POWER",
+ .type = EV_KEY,
+ .active_low = 1,
+ .wakeup = 1,
+ .debounce_interval = 1,
+ },
+};
+
+static struct gpio_keys_platform_data aquila_gpio_keys_data = {
+ .buttons = aquila_gpio_keys_table,
+ .nbuttons = ARRAY_SIZE(aquila_gpio_keys_table),
+};
+
+static struct platform_device aquila_device_gpiokeys = {
+ .name = "gpio-keys",
+ .dev = {
+ .platform_data = &aquila_gpio_keys_data,
+ },
+};
+
+static void __init aquila_pmic_init(void)
+{
+ /* AP_PMIC_IRQ: EINT7 */
+ s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_SFN(0xf));
+ s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP);
+
+ /* nPower: EINT22 */
+ s3c_gpio_cfgpin(S5PV210_GPH2(6), S3C_GPIO_SFN(0xf));
+ s3c_gpio_setpull(S5PV210_GPH2(6), S3C_GPIO_PULL_UP);
+}
+
+/* MoviNAND */
+static struct s3c_sdhci_platdata aquila_hsmmc0_data __initdata = {
+ .max_width = 4,
+ .cd_type = S3C_SDHCI_CD_PERMANENT,
+};
+
+/* Wireless LAN */
+static struct s3c_sdhci_platdata aquila_hsmmc1_data __initdata = {
+ .max_width = 4,
+ .cd_type = S3C_SDHCI_CD_EXTERNAL,
+ /* ext_cd_{init,cleanup} callbacks will be added later */
+};
+
+/* External Flash */
+#define AQUILA_EXT_FLASH_EN S5PV210_MP05(4)
+#define AQUILA_EXT_FLASH_CD S5PV210_GPH3(4)
+static struct s3c_sdhci_platdata aquila_hsmmc2_data __initdata = {
+ .max_width = 4,
+ .cd_type = S3C_SDHCI_CD_GPIO,
+ .ext_cd_gpio = AQUILA_EXT_FLASH_CD,
+ .ext_cd_gpio_invert = 1,
+};
+
+static void aquila_setup_sdhci(void)
+{
+ gpio_request(AQUILA_EXT_FLASH_EN, "FLASH_EN");
+ gpio_direction_output(AQUILA_EXT_FLASH_EN, 1);
+
+ s3c_sdhci0_set_platdata(&aquila_hsmmc0_data);
+ s3c_sdhci1_set_platdata(&aquila_hsmmc1_data);
+ s3c_sdhci2_set_platdata(&aquila_hsmmc2_data);
+};
+
static struct platform_device *aquila_devices[] __initdata = {
+ &aquila_i2c_gpio_pmic,
+ &aquila_device_gpiokeys,
&s3c_device_fb,
+ &s5pc110_device_onenand,
+ &s3c_device_hsmmc0,
+ &s3c_device_hsmmc1,
+ &s3c_device_hsmmc2,
};
static void __init aquila_map_io(void)
{
s5p_init_io(NULL, 0, S5P_VA_CHIPID);
s3c24xx_init_clocks(24000000);
- s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs));
+ s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs));
}
static void __init aquila_machine_init(void)
{
+ /* PMIC */
+ aquila_pmic_init();
+ i2c_register_board_info(AP_I2C_GPIO_PMIC_BUS_4, i2c_gpio_pmic_devs,
+ ARRAY_SIZE(i2c_gpio_pmic_devs));
+ /* SDHCI */
+ aquila_setup_sdhci();
+
/* FB */
s3c_fb_set_platdata(&aquila_lcd_pdata);
#include <linux/types.h>
#include <linux/init.h>
#include <linux/serial_core.h>
+#include <linux/fb.h>
+#include <linux/i2c.h>
+#include <linux/i2c-gpio.h>
+#include <linux/mfd/max8998.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <linux/gpio.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/map.h>
#include <mach/regs-clock.h>
+#include <mach/regs-fb.h>
+#include <plat/gpio-cfg.h>
#include <plat/regs-serial.h>
#include <plat/s5pv210.h>
#include <plat/devs.h>
#include <plat/cpu.h>
+#include <plat/fb.h>
+#include <plat/sdhci.h>
/* Following are default values for UCON, ULCON and UFCON UART registers */
#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
#define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8
-#define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
- S5PV210_UFCON_TXTRIG4 | \
- S5PV210_UFCON_RXTRIG4)
+#define S5PV210_UFCON_DEFAULT S3C2410_UFCON_FIFOMODE
static struct s3c2410_uartcfg goni_uartcfgs[] __initdata = {
[0] = {
.flags = 0,
.ucon = S5PV210_UCON_DEFAULT,
.ulcon = S5PV210_ULCON_DEFAULT,
- .ufcon = S5PV210_UFCON_DEFAULT,
+ .ufcon = S5PV210_UFCON_DEFAULT |
+ S5PV210_UFCON_TXTRIG256 | S5PV210_UFCON_RXTRIG256,
},
[1] = {
.hwport = 1,
.flags = 0,
.ucon = S5PV210_UCON_DEFAULT,
.ulcon = S5PV210_ULCON_DEFAULT,
- .ufcon = S5PV210_UFCON_DEFAULT,
+ .ufcon = S5PV210_UFCON_DEFAULT |
+ S5PV210_UFCON_TXTRIG64 | S5PV210_UFCON_RXTRIG64,
},
[2] = {
.hwport = 2,
.flags = 0,
.ucon = S5PV210_UCON_DEFAULT,
.ulcon = S5PV210_ULCON_DEFAULT,
- .ufcon = S5PV210_UFCON_DEFAULT,
+ .ufcon = S5PV210_UFCON_DEFAULT |
+ S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
},
[3] = {
.hwport = 3,
.flags = 0,
.ucon = S5PV210_UCON_DEFAULT,
.ulcon = S5PV210_ULCON_DEFAULT,
- .ufcon = S5PV210_UFCON_DEFAULT,
+ .ufcon = S5PV210_UFCON_DEFAULT |
+ S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
},
};
+/* Frame Buffer */
+static struct s3c_fb_pd_win goni_fb_win0 = {
+ .win_mode = {
+ .pixclock = 1000000000000ULL / ((16+16+2+480)*(28+3+2+800)*55),
+ .left_margin = 16,
+ .right_margin = 16,
+ .upper_margin = 3,
+ .lower_margin = 28,
+ .hsync_len = 2,
+ .vsync_len = 2,
+ .xres = 480,
+ .yres = 800,
+ .refresh = 55,
+ },
+ .max_bpp = 32,
+ .default_bpp = 16,
+};
+
+static struct s3c_fb_platdata goni_lcd_pdata __initdata = {
+ .win[0] = &goni_fb_win0,
+ .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
+ VIDCON0_CLKSEL_LCD,
+ .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
+ | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
+ .setup_gpio = s5pv210_fb_gpio_setup_24bpp,
+};
+
+/* MAX8998 regulators */
+#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE)
+
+static struct regulator_init_data goni_ldo2_data = {
+ .constraints = {
+ .name = "VALIVE_1.1V",
+ .min_uV = 1100000,
+ .max_uV = 1100000,
+ .apply_uV = 1,
+ .always_on = 1,
+ .state_mem = {
+ .enabled = 1,
+ },
+ },
+};
+
+static struct regulator_init_data goni_ldo3_data = {
+ .constraints = {
+ .name = "VUSB/MIPI_1.1V",
+ .min_uV = 1100000,
+ .max_uV = 1100000,
+ .apply_uV = 1,
+ .always_on = 1,
+ },
+};
+
+static struct regulator_init_data goni_ldo4_data = {
+ .constraints = {
+ .name = "VDAC_3.3V",
+ .min_uV = 3300000,
+ .max_uV = 3300000,
+ .apply_uV = 1,
+ },
+};
+
+static struct regulator_init_data goni_ldo5_data = {
+ .constraints = {
+ .name = "VTF_2.8V",
+ .min_uV = 2800000,
+ .max_uV = 2800000,
+ .apply_uV = 1,
+ },
+};
+
+static struct regulator_init_data goni_ldo6_data = {
+ .constraints = {
+ .name = "VCC_3.3V",
+ .min_uV = 3300000,
+ .max_uV = 3300000,
+ .apply_uV = 1,
+ },
+};
+
+static struct regulator_init_data goni_ldo7_data = {
+ .constraints = {
+ .name = "VLCD_1.8V",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .apply_uV = 1,
+ .always_on = 1,
+ },
+};
+
+static struct regulator_init_data goni_ldo8_data = {
+ .constraints = {
+ .name = "VUSB/VADC_3.3V",
+ .min_uV = 3300000,
+ .max_uV = 3300000,
+ .apply_uV = 1,
+ .always_on = 1,
+ },
+};
+
+static struct regulator_init_data goni_ldo9_data = {
+ .constraints = {
+ .name = "VCC/VCAM_2.8V",
+ .min_uV = 2800000,
+ .max_uV = 2800000,
+ .apply_uV = 1,
+ .always_on = 1,
+ },
+};
+
+static struct regulator_init_data goni_ldo10_data = {
+ .constraints = {
+ .name = "VPLL_1.1V",
+ .min_uV = 1100000,
+ .max_uV = 1100000,
+ .apply_uV = 1,
+ .boot_on = 1,
+ },
+};
+
+static struct regulator_init_data goni_ldo11_data = {
+ .constraints = {
+ .name = "CAM_IO_2.8V",
+ .min_uV = 2800000,
+ .max_uV = 2800000,
+ .apply_uV = 1,
+ .always_on = 1,
+ },
+};
+
+static struct regulator_init_data goni_ldo12_data = {
+ .constraints = {
+ .name = "CAM_ISP_1.2V",
+ .min_uV = 1200000,
+ .max_uV = 1200000,
+ .apply_uV = 1,
+ .always_on = 1,
+ },
+};
+
+static struct regulator_init_data goni_ldo13_data = {
+ .constraints = {
+ .name = "CAM_A_2.8V",
+ .min_uV = 2800000,
+ .max_uV = 2800000,
+ .apply_uV = 1,
+ .always_on = 1,
+ },
+};
+
+static struct regulator_init_data goni_ldo14_data = {
+ .constraints = {
+ .name = "CAM_CIF_1.8V",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .apply_uV = 1,
+ .always_on = 1,
+ },
+};
+
+static struct regulator_init_data goni_ldo15_data = {
+ .constraints = {
+ .name = "CAM_AF_3.3V",
+ .min_uV = 3300000,
+ .max_uV = 3300000,
+ .apply_uV = 1,
+ .always_on = 1,
+ },
+};
+
+static struct regulator_init_data goni_ldo16_data = {
+ .constraints = {
+ .name = "VMIPI_1.8V",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .apply_uV = 1,
+ .always_on = 1,
+ },
+};
+
+static struct regulator_init_data goni_ldo17_data = {
+ .constraints = {
+ .name = "VCC_3.0V_LCD",
+ .min_uV = 3000000,
+ .max_uV = 3000000,
+ .apply_uV = 1,
+ .always_on = 1,
+ },
+};
+
+/* BUCK */
+static struct regulator_consumer_supply buck1_consumer[] = {
+ { .supply = "vddarm", },
+};
+
+static struct regulator_consumer_supply buck2_consumer[] = {
+ { .supply = "vddint", },
+};
+
+static struct regulator_init_data goni_buck1_data = {
+ .constraints = {
+ .name = "VARM_1.2V",
+ .min_uV = 1200000,
+ .max_uV = 1200000,
+ .apply_uV = 1,
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
+ REGULATOR_CHANGE_STATUS,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(buck1_consumer),
+ .consumer_supplies = buck1_consumer,
+};
+
+static struct regulator_init_data goni_buck2_data = {
+ .constraints = {
+ .name = "VINT_1.2V",
+ .min_uV = 1200000,
+ .max_uV = 1200000,
+ .apply_uV = 1,
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
+ REGULATOR_CHANGE_STATUS,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(buck2_consumer),
+ .consumer_supplies = buck2_consumer,
+};
+
+static struct regulator_init_data goni_buck3_data = {
+ .constraints = {
+ .name = "VCC_1.8V",
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .apply_uV = 1,
+ .state_mem = {
+ .enabled = 1,
+ },
+ },
+};
+
+static struct regulator_init_data goni_buck4_data = {
+ .constraints = {
+ .name = "CAM_CORE_1.2V",
+ .min_uV = 1200000,
+ .max_uV = 1200000,
+ .apply_uV = 1,
+ .always_on = 1,
+ },
+};
+
+static struct max8998_regulator_data goni_regulators[] = {
+ { MAX8998_LDO2, &goni_ldo2_data },
+ { MAX8998_LDO3, &goni_ldo3_data },
+ { MAX8998_LDO4, &goni_ldo4_data },
+ { MAX8998_LDO5, &goni_ldo5_data },
+ { MAX8998_LDO6, &goni_ldo6_data },
+ { MAX8998_LDO7, &goni_ldo7_data },
+ { MAX8998_LDO8, &goni_ldo8_data },
+ { MAX8998_LDO9, &goni_ldo9_data },
+ { MAX8998_LDO10, &goni_ldo10_data },
+ { MAX8998_LDO11, &goni_ldo11_data },
+ { MAX8998_LDO12, &goni_ldo12_data },
+ { MAX8998_LDO13, &goni_ldo13_data },
+ { MAX8998_LDO14, &goni_ldo14_data },
+ { MAX8998_LDO15, &goni_ldo15_data },
+ { MAX8998_LDO16, &goni_ldo16_data },
+ { MAX8998_LDO17, &goni_ldo17_data },
+ { MAX8998_BUCK1, &goni_buck1_data },
+ { MAX8998_BUCK2, &goni_buck2_data },
+ { MAX8998_BUCK3, &goni_buck3_data },
+ { MAX8998_BUCK4, &goni_buck4_data },
+};
+
+static struct max8998_platform_data goni_max8998_pdata = {
+ .num_regulators = ARRAY_SIZE(goni_regulators),
+ .regulators = goni_regulators,
+};
+#endif
+
+/* GPIO I2C PMIC */
+#define AP_I2C_GPIO_PMIC_BUS_4 4
+static struct i2c_gpio_platform_data goni_i2c_gpio_pmic_data = {
+ .sda_pin = S5PV210_GPJ4(0), /* XMSMCSN */
+ .scl_pin = S5PV210_GPJ4(3), /* XMSMIRQN */
+};
+
+static struct platform_device goni_i2c_gpio_pmic = {
+ .name = "i2c-gpio",
+ .id = AP_I2C_GPIO_PMIC_BUS_4,
+ .dev = {
+ .platform_data = &goni_i2c_gpio_pmic_data,
+ },
+};
+
+static struct i2c_board_info i2c_gpio_pmic_devs[] __initdata = {
+#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE)
+ {
+ /* 0xCC when SRAD = 0 */
+ I2C_BOARD_INFO("max8998", 0xCC >> 1),
+ .platform_data = &goni_max8998_pdata,
+ },
+#endif
+};
+
+/* PMIC Power button */
+static struct gpio_keys_button goni_gpio_keys_table[] = {
+ {
+ .code = KEY_POWER,
+ .gpio = S5PV210_GPH2(6),
+ .desc = "gpio-keys: KEY_POWER",
+ .type = EV_KEY,
+ .active_low = 1,
+ .wakeup = 1,
+ .debounce_interval = 1,
+ },
+};
+
+static struct gpio_keys_platform_data goni_gpio_keys_data = {
+ .buttons = goni_gpio_keys_table,
+ .nbuttons = ARRAY_SIZE(goni_gpio_keys_table),
+};
+
+static struct platform_device goni_device_gpiokeys = {
+ .name = "gpio-keys",
+ .dev = {
+ .platform_data = &goni_gpio_keys_data,
+ },
+};
+
+static void __init goni_pmic_init(void)
+{
+ /* AP_PMIC_IRQ: EINT7 */
+ s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_SFN(0xf));
+ s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP);
+
+ /* nPower: EINT22 */
+ s3c_gpio_cfgpin(S5PV210_GPH2(6), S3C_GPIO_SFN(0xf));
+ s3c_gpio_setpull(S5PV210_GPH2(6), S3C_GPIO_PULL_UP);
+}
+
+/* MoviNAND */
+static struct s3c_sdhci_platdata goni_hsmmc0_data __initdata = {
+ .max_width = 4,
+ .cd_type = S3C_SDHCI_CD_PERMANENT,
+};
+
+/* Wireless LAN */
+static struct s3c_sdhci_platdata goni_hsmmc1_data __initdata = {
+ .max_width = 4,
+ .cd_type = S3C_SDHCI_CD_EXTERNAL,
+ /* ext_cd_{init,cleanup} callbacks will be added later */
+};
+
+/* External Flash */
+#define GONI_EXT_FLASH_EN S5PV210_MP05(4)
+#define GONI_EXT_FLASH_CD S5PV210_GPH3(4)
+static struct s3c_sdhci_platdata goni_hsmmc2_data __initdata = {
+ .max_width = 4,
+ .cd_type = S3C_SDHCI_CD_GPIO,
+ .ext_cd_gpio = GONI_EXT_FLASH_CD,
+ .ext_cd_gpio_invert = 1,
+};
+
+static void goni_setup_sdhci(void)
+{
+ gpio_request(GONI_EXT_FLASH_EN, "FLASH_EN");
+ gpio_direction_output(GONI_EXT_FLASH_EN, 1);
+
+ s3c_sdhci0_set_platdata(&goni_hsmmc0_data);
+ s3c_sdhci1_set_platdata(&goni_hsmmc1_data);
+ s3c_sdhci2_set_platdata(&goni_hsmmc2_data);
+};
+
static struct platform_device *goni_devices[] __initdata = {
+ &s3c_device_fb,
+ &s5pc110_device_onenand,
+ &goni_i2c_gpio_pmic,
+ &goni_device_gpiokeys,
+ &s3c_device_hsmmc0,
+ &s3c_device_hsmmc1,
+ &s3c_device_hsmmc2,
};
static void __init goni_map_io(void)
static void __init goni_machine_init(void)
{
+ /* PMIC */
+ goni_pmic_init();
+ i2c_register_board_info(AP_I2C_GPIO_PMIC_BUS_4, i2c_gpio_pmic_devs,
+ ARRAY_SIZE(i2c_gpio_pmic_devs));
+ /* SDHCI */
+ goni_setup_sdhci();
+
+ /* FB */
+ s3c_fb_set_platdata(&goni_lcd_pdata);
+
platform_add_devices(goni_devices, ARRAY_SIZE(goni_devices));
}
#include <linux/types.h>
#include <linux/init.h>
#include <linux/serial_core.h>
+#include <linux/i2c.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/s5pv210.h>
#include <plat/devs.h>
#include <plat/cpu.h>
+#include <plat/ata.h>
+#include <plat/iic.h>
/* Following are default values for UCON, ULCON and UFCON UART registers */
#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
},
};
+static struct s3c_ide_platdata smdkc110_ide_pdata __initdata = {
+ .setup_gpio = s5pv210_ide_setup_gpio,
+};
+
static struct platform_device *smdkc110_devices[] __initdata = {
&s5pv210_device_iis0,
&s5pv210_device_ac97,
+ &s3c_device_cfcon,
+ &s3c_device_i2c0,
+ &s3c_device_i2c1,
+ &s3c_device_i2c2,
+ &s3c_device_rtc,
&s3c_device_wdt,
};
+static struct i2c_board_info smdkc110_i2c_devs0[] __initdata = {
+ { I2C_BOARD_INFO("24c08", 0x50), }, /* Samsung S524AD0XD1 */
+};
+
+static struct i2c_board_info smdkc110_i2c_devs1[] __initdata = {
+ /* To Be Updated */
+};
+
+static struct i2c_board_info smdkc110_i2c_devs2[] __initdata = {
+ /* To Be Updated */
+};
+
static void __init smdkc110_map_io(void)
{
s5p_init_io(NULL, 0, S5P_VA_CHIPID);
static void __init smdkc110_machine_init(void)
{
+ s3c_i2c0_set_platdata(NULL);
+ s3c_i2c1_set_platdata(NULL);
+ s3c_i2c2_set_platdata(NULL);
+ i2c_register_board_info(0, smdkc110_i2c_devs0,
+ ARRAY_SIZE(smdkc110_i2c_devs0));
+ i2c_register_board_info(1, smdkc110_i2c_devs1,
+ ARRAY_SIZE(smdkc110_i2c_devs1));
+ i2c_register_board_info(2, smdkc110_i2c_devs2,
+ ARRAY_SIZE(smdkc110_i2c_devs2));
+
+ s3c_ide_set_platdata(&smdkc110_ide_pdata);
+
platform_add_devices(smdkc110_devices, ARRAY_SIZE(smdkc110_devices));
}
#include <linux/kernel.h>
#include <linux/types.h>
+#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/serial_core.h>
#include <plat/cpu.h>
#include <plat/adc.h>
#include <plat/ts.h>
+#include <plat/ata.h>
+#include <plat/iic.h>
+#include <plat/keypad.h>
/* Following are default values for UCON, ULCON and UFCON UART registers */
#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
},
};
+static struct s3c_ide_platdata smdkv210_ide_pdata __initdata = {
+ .setup_gpio = s5pv210_ide_setup_gpio,
+};
+
+static uint32_t smdkv210_keymap[] __initdata = {
+ /* KEY(row, col, keycode) */
+ KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
+ KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
+ KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
+ KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
+};
+
+static struct matrix_keymap_data smdkv210_keymap_data __initdata = {
+ .keymap = smdkv210_keymap,
+ .keymap_size = ARRAY_SIZE(smdkv210_keymap),
+};
+
+static struct samsung_keypad_platdata smdkv210_keypad_data __initdata = {
+ .keymap_data = &smdkv210_keymap_data,
+ .rows = 8,
+ .cols = 8,
+};
+
static struct platform_device *smdkv210_devices[] __initdata = {
&s5pv210_device_iis0,
&s5pv210_device_ac97,
&s3c_device_adc,
+ &s3c_device_cfcon,
+ &s3c_device_hsmmc0,
+ &s3c_device_hsmmc1,
+ &s3c_device_hsmmc2,
+ &s3c_device_hsmmc3,
+ &s3c_device_i2c0,
+ &s3c_device_i2c1,
+ &s3c_device_i2c2,
+ &samsung_device_keypad,
+ &s3c_device_rtc,
&s3c_device_ts,
&s3c_device_wdt,
};
+static struct i2c_board_info smdkv210_i2c_devs0[] __initdata = {
+ { I2C_BOARD_INFO("24c08", 0x50), }, /* Samsung S524AD0XD1 */
+};
+
+static struct i2c_board_info smdkv210_i2c_devs1[] __initdata = {
+ /* To Be Updated */
+};
+
+static struct i2c_board_info smdkv210_i2c_devs2[] __initdata = {
+ /* To Be Updated */
+};
+
static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
.delay = 10000,
.presc = 49,
static void __init smdkv210_machine_init(void)
{
+ samsung_keypad_set_platdata(&smdkv210_keypad_data);
s3c24xx_ts_set_platdata(&s3c_ts_platform);
+
+ s3c_i2c0_set_platdata(NULL);
+ s3c_i2c1_set_platdata(NULL);
+ s3c_i2c2_set_platdata(NULL);
+ i2c_register_board_info(0, smdkv210_i2c_devs0,
+ ARRAY_SIZE(smdkv210_i2c_devs0));
+ i2c_register_board_info(1, smdkv210_i2c_devs1,
+ ARRAY_SIZE(smdkv210_i2c_devs1));
+ i2c_register_board_info(2, smdkv210_i2c_devs2,
+ ARRAY_SIZE(smdkv210_i2c_devs2));
+
+ s3c_ide_set_platdata(&smdkv210_ide_pdata);
+
platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
}
--- /dev/null
+/* linux/arch/arm/mach-s5pv210/setup-ide.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * S5PV210 setup information for IDE
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+
+#include <plat/gpio-cfg.h>
+
+void s5pv210_ide_setup_gpio(void)
+{
+ unsigned int gpio = 0;
+
+ for (gpio = S5PV210_GPJ0(0); gpio <= S5PV210_GPJ0(7); gpio++) {
+ /* CF_Add[0 - 2], CF_IORDY, CF_INTRQ, CF_DMARQ, CF_DMARST,
+ CF_DMACK */
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+ s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
+ }
+
+ for (gpio = S5PV210_GPJ2(0); gpio <= S5PV210_GPJ2(7); gpio++) {
+ /*CF_Data[0 - 7] */
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+ s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
+ }
+
+ for (gpio = S5PV210_GPJ3(0); gpio <= S5PV210_GPJ3(7); gpio++) {
+ /* CF_Data[8 - 15] */
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+ s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
+ }
+
+ for (gpio = S5PV210_GPJ4(0); gpio <= S5PV210_GPJ4(3); gpio++) {
+ /* CF_CS0, CF_CS1, CF_IORD, CF_IOWR */
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+ s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
+ }
+}
--- /dev/null
+/*
+ * linux/arch/arm/mach-s5pv210/setup-keypad.c
+ *
+ * Copyright (C) 2010 Samsung Electronics Co.Ltd
+ * Author: Joonyoung Shim <jy0922.shim@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+#include <linux/gpio.h>
+#include <plat/gpio-cfg.h>
+
+void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
+{
+ unsigned int gpio, end;
+
+ /* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */
+ end = S5PV210_GPH3(rows);
+ for (gpio = S5PV210_GPH3(0); gpio < end; gpio++) {
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+ }
+
+ /* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */
+ end = S5PV210_GPH2(cols);
+ for (gpio = S5PV210_GPH2(0); gpio < end; gpio++) {
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+ }
+}
s3c_gpio_setpull(S5PV210_GPG2(2), S3C_GPIO_PULL_UP);
s3c_gpio_cfgpin(S5PV210_GPG2(2), S3C_GPIO_SFN(2));
}
+
+void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *dev, int width)
+{
+ unsigned int gpio;
+
+ /* Set all the necessary GPG3[0:2] pins to special-function 2 */
+ for (gpio = S5PV210_GPG3(0); gpio < S5PV210_GPG3(2); gpio++) {
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+ }
+
+ /* Data pin GPG3[3:6] to special-function 2 */
+ for (gpio = S5PV210_GPG3(3); gpio <= S5PV210_GPG3(6); gpio++) {
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+ }
+
+ s3c_gpio_setpull(S5PV210_GPG3(2), S3C_GPIO_PULL_UP);
+ s3c_gpio_cfgpin(S5PV210_GPG3(2), S3C_GPIO_SFN(2));
+}
char *s5pv210_hsmmc_clksrcs[4] = {
[0] = "hsmmc", /* HCLK */
- [1] = "hsmmc", /* HCLK */
+ /* [1] = "hsmmc", - duplicate HCLK entry */
[2] = "sclk_mmc", /* mmc_bus */
- /*[4] = reserved */
+ /* [3] = NULL, - reserved */
};
void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
--- /dev/null
+/*
+ * linux/arch/arm/plat-samsung/include/plat/keypad-core.h
+ *
+ * Copyright (C) 2010 Samsung Electronics Co.Ltd
+ * Author: Joonyoung Shim <jy0922.shim@samsung.com>
+ *
+ * Samsung keypad controller core function
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_KEYPAD_CORE_H
+#define __ASM_ARCH_KEYPAD_CORE_H
+
+/* These function are only for use with the core support code, such as
+ * the cpu specific initialisation code
+ */
+
+/* re-define device name depending on support. */
+static inline void samsung_keypad_setname(char *name)
+{
+#ifdef CONFIG_SAMSUNG_DEV_KEYPAD
+ samsung_device_keypad.name = name;
+#endif
+}
+
+#endif /* __ASM_ARCH_KEYPAD_CORE_H */
extern void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
extern void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
extern void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
+extern void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *, int w);
/* S3C6400 SDHCI setup */
static inline void s5pv210_default_sdhci2(void) { }
#endif /* CONFIG_S3C_DEV_HSMMC2 */
+#ifdef CONFIG_S3C_DEV_HSMMC3
+static inline void s5pv210_default_sdhci3(void)
+{
+ s3c_hsmmc3_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
+ s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio;
+ s3c_hsmmc3_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card;
+}
+#else
+static inline void s5pv210_default_sdhci3(void) { }
+#endif /* CONFIG_S3C_DEV_HSMMC3 */
+
#else
static inline void s5pv210_default_sdhci0(void) { }
static inline void s5pv210_default_sdhci1(void) { }
static inline void s5pv210_default_sdhci2(void) { }
+static inline void s5pv210_default_sdhci3(void) { }
#endif /* CONFIG_S5PC100_SETUP_SDHCI */
projects / karo-tx-linux.git / commitdiff