#include <asm/mach/map.h>
#include <mach/mux.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <plat/tc.h>
#include <mach/irda.h>
#include <linux/platform_data/keypad-omap.h>
#include "common.h"
#include "board-h2.h"
+#include "dma.h"
/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
#define OMAP1610_ETHR_START 0x04000300
#include <mach/mux.h>
#include <plat/tc.h>
#include <linux/platform_data/keypad-omap.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <mach/flash.h>
#include <mach/hardware.h>
#include <mach/flash.h>
#include <mach/mux.h>
#include <plat/tc.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <mach/irda.h>
#include <linux/platform_data/keypad-omap.h>
#include <mach/usb.h>
#include "common.h"
+#include "dma.h"
#define PALMTE_USBDETECT_GPIO 0
#define PALMTE_USB_OR_DC_GPIO 1
#include <plat/led.h>
#include <mach/flash.h>
#include <mach/mux.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <plat/tc.h>
#include <mach/irda.h>
#include <linux/platform_data/keypad-omap.h>
#include <mach/usb.h>
#include "common.h"
+#include "dma.h"
#define PALMTT_USBDETECT_GPIO 0
#define PALMTT_CABLE_GPIO 1
#include <mach/flash.h>
#include <mach/mux.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <plat/tc.h>
#include <mach/irda.h>
#include <linux/platform_data/keypad-omap.h>
#include <mach/usb.h>
#include "common.h"
+#include "dma.h"
#define PALMZ71_USBDETECT_GPIO 0
#define PALMZ71_PENIRQ_GPIO 6
#include <mach/flash.h>
#include <mach/mux.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <mach/irda.h>
#include <plat/tc.h>
#include <mach/board-sx1.h>
#include <mach/usb.h>
#include "common.h"
+#include "dma.h"
/* Write to I2C device */
int sx1_i2c_write_byte(u8 devaddr, u8 regoffset, u8 value)
#include <plat/tc.h>
#include <mach/mux.h>
-#include <plat/dma.h>
#include <plat/mmc.h>
#include <mach/omap7xx.h>
#include "common.h"
#include "clock.h"
+#include "dma.h"
#if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
#include <linux/device.h>
#include <linux/io.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <plat/tc.h>
#include <mach/irqs.h>
+#include "dma.h"
+
#define OMAP1_DMA_BASE (0xfffed800)
#define OMAP1_LOGICAL_DMA_CH_COUNT 17
#define OMAP1_DMA_STRIDE 0x40
--- /dev/null
+/*
+ * OMAP1 DMA channel definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef __OMAP1_DMA_CHANNEL_H
+#define __OMAP1_DMA_CHANNEL_H
+
+/* DMA channels for omap1 */
+#define OMAP_DMA_NO_DEVICE 0
+#define OMAP_DMA_MCSI1_TX 1
+#define OMAP_DMA_MCSI1_RX 2
+#define OMAP_DMA_I2C_RX 3
+#define OMAP_DMA_I2C_TX 4
+#define OMAP_DMA_EXT_NDMA_REQ 5
+#define OMAP_DMA_EXT_NDMA_REQ2 6
+#define OMAP_DMA_UWIRE_TX 7
+#define OMAP_DMA_MCBSP1_TX 8
+#define OMAP_DMA_MCBSP1_RX 9
+#define OMAP_DMA_MCBSP3_TX 10
+#define OMAP_DMA_MCBSP3_RX 11
+#define OMAP_DMA_UART1_TX 12
+#define OMAP_DMA_UART1_RX 13
+#define OMAP_DMA_UART2_TX 14
+#define OMAP_DMA_UART2_RX 15
+#define OMAP_DMA_MCBSP2_TX 16
+#define OMAP_DMA_MCBSP2_RX 17
+#define OMAP_DMA_UART3_TX 18
+#define OMAP_DMA_UART3_RX 19
+#define OMAP_DMA_CAMERA_IF_RX 20
+#define OMAP_DMA_MMC_TX 21
+#define OMAP_DMA_MMC_RX 22
+#define OMAP_DMA_NAND 23
+#define OMAP_DMA_IRQ_LCD_LINE 24
+#define OMAP_DMA_MEMORY_STICK 25
+#define OMAP_DMA_USB_W2FC_RX0 26
+#define OMAP_DMA_USB_W2FC_RX1 27
+#define OMAP_DMA_USB_W2FC_RX2 28
+#define OMAP_DMA_USB_W2FC_TX0 29
+#define OMAP_DMA_USB_W2FC_TX1 30
+#define OMAP_DMA_USB_W2FC_TX2 31
+
+/* These are only for 1610 */
+#define OMAP_DMA_CRYPTO_DES_IN 32
+#define OMAP_DMA_SPI_TX 33
+#define OMAP_DMA_SPI_RX 34
+#define OMAP_DMA_CRYPTO_HASH 35
+#define OMAP_DMA_CCP_ATTN 36
+#define OMAP_DMA_CCP_FIFO_NOT_EMPTY 37
+#define OMAP_DMA_CMT_APE_TX_CHAN_0 38
+#define OMAP_DMA_CMT_APE_RV_CHAN_0 39
+#define OMAP_DMA_CMT_APE_TX_CHAN_1 40
+#define OMAP_DMA_CMT_APE_RV_CHAN_1 41
+#define OMAP_DMA_CMT_APE_TX_CHAN_2 42
+#define OMAP_DMA_CMT_APE_RV_CHAN_2 43
+#define OMAP_DMA_CMT_APE_TX_CHAN_3 44
+#define OMAP_DMA_CMT_APE_RV_CHAN_3 45
+#define OMAP_DMA_CMT_APE_TX_CHAN_4 46
+#define OMAP_DMA_CMT_APE_RV_CHAN_4 47
+#define OMAP_DMA_CMT_APE_TX_CHAN_5 48
+#define OMAP_DMA_CMT_APE_RV_CHAN_5 49
+#define OMAP_DMA_CMT_APE_TX_CHAN_6 50
+#define OMAP_DMA_CMT_APE_RV_CHAN_6 51
+#define OMAP_DMA_CMT_APE_TX_CHAN_7 52
+#define OMAP_DMA_CMT_APE_RV_CHAN_7 53
+#define OMAP_DMA_MMC2_TX 54
+#define OMAP_DMA_MMC2_RX 55
+#define OMAP_DMA_CRYPTO_DES_OUT 56
+
+#endif /* __OMAP1_DMA_CHANNEL_H */
#include <mach/mux.h>
#include <plat/tc.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include "iomap.h"
#include "common.h"
#include <linux/interrupt.h>
#include <linux/io.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <mach/hardware.h>
#include <mach/lcdc.h>
+#include "dma.h"
+
int omap_lcd_dma_running(void)
{
/*
#include <linux/platform_device.h>
#include <linux/slab.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <mach/mux.h>
#include <plat/cpu.h>
#include <linux/platform_data/asoc-ti-mcbsp.h>
#include <mach/irqs.h>
#include "iomap.h"
+#include "dma.h"
#define DPS_RSTCT2_PER_EN (1 << 0)
#define DSP_RSTCT2_WD_PER_EN (1 << 1)
#include <plat/sram.h>
#include <plat/tc.h>
#include <mach/mux.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <plat/dmtimer.h>
#include <mach/irqs.h>
#include <plat/usb.h>
#include "common.h"
-#include <plat/dma.h>
-#include "gpmc.h"
+#include <plat-omap/dma-omap.h>
#include <video/omapdss.h>
#include <video/omap-panel-tfp410.h>
+#include "gpmc.h"
#include "gpmc-smc91x.h"
#include "board-flash.h"
#include <asm/mach/map.h>
#include <plat/menelaus.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include "debug-devices.h"
#include <video/omapdss.h>
#include <asm/system_info.h>
#include "common.h"
-#include <plat/dma.h>
-#include "gpmc.h"
+#include <plat-omap/dma-omap.h>
#include <plat/omap-pm.h>
#include "gpmc-smc91x.h"
#include "mux.h"
#include "hsmmc.h"
#include "common-board-devices.h"
+#include "gpmc.h"
#include "gpmc-onenand.h"
#define SYSTEM_REV_B_USES_VAUX3 0x1699
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
-#include "common.h"
-#include <plat/dma.h>
-#include "gpmc.h"
+#include <plat-omap/dma-omap.h>
#include <plat/usb.h>
+#include "common.h"
#include "mux.h"
+#include "gpmc.h"
#include "pm.h"
#include "sdram-nokia.h"
#include <asm/mach/map.h>
#include "iomap.h"
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <plat/omap_hwmod.h>
#include <plat/omap_device.h>
#include "omap4-keypad.h"
#include "mux.h"
#include "control.h"
#include "devices.h"
+#include "dma.h"
#define L3_MODULES_MAX_LEN 12
#define L3_MODULES 3
#include <plat/omap_hwmod.h>
#include <plat/omap_device.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#define OMAP2_DMA_STRIDE 0x60
--- /dev/null
+/*
+ * OMAP2PLUS DMA channel definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef __OMAP2PLUS_DMA_CHANNEL_H
+#define __OMAP2PLUS_DMA_CHANNEL_H
+
+
+/* DMA channels for 24xx */
+#define OMAP24XX_DMA_NO_DEVICE 0
+#define OMAP24XX_DMA_XTI_DMA 1 /* S_DMA_0 */
+#define OMAP24XX_DMA_EXT_DMAREQ0 2 /* S_DMA_1 */
+#define OMAP24XX_DMA_EXT_DMAREQ1 3 /* S_DMA_2 */
+#define OMAP24XX_DMA_GPMC 4 /* S_DMA_3 */
+#define OMAP24XX_DMA_GFX 5 /* S_DMA_4 */
+#define OMAP24XX_DMA_DSS 6 /* S_DMA_5 */
+#define OMAP242X_DMA_VLYNQ_TX 7 /* S_DMA_6 */
+#define OMAP24XX_DMA_EXT_DMAREQ2 7 /* S_DMA_6 */
+#define OMAP24XX_DMA_CWT 8 /* S_DMA_7 */
+#define OMAP24XX_DMA_AES_TX 9 /* S_DMA_8 */
+#define OMAP24XX_DMA_AES_RX 10 /* S_DMA_9 */
+#define OMAP24XX_DMA_DES_TX 11 /* S_DMA_10 */
+#define OMAP24XX_DMA_DES_RX 12 /* S_DMA_11 */
+#define OMAP24XX_DMA_SHA1MD5_RX 13 /* S_DMA_12 */
+#define OMAP34XX_DMA_SHA2MD5_RX 13 /* S_DMA_12 */
+#define OMAP242X_DMA_EXT_DMAREQ2 14 /* S_DMA_13 */
+#define OMAP242X_DMA_EXT_DMAREQ3 15 /* S_DMA_14 */
+#define OMAP242X_DMA_EXT_DMAREQ4 16 /* S_DMA_15 */
+#define OMAP242X_DMA_EAC_AC_RD 17 /* S_DMA_16 */
+#define OMAP242X_DMA_EAC_AC_WR 18 /* S_DMA_17 */
+#define OMAP242X_DMA_EAC_MD_UL_RD 19 /* S_DMA_18 */
+#define OMAP242X_DMA_EAC_MD_UL_WR 20 /* S_DMA_19 */
+#define OMAP242X_DMA_EAC_MD_DL_RD 21 /* S_DMA_20 */
+#define OMAP242X_DMA_EAC_MD_DL_WR 22 /* S_DMA_21 */
+#define OMAP242X_DMA_EAC_BT_UL_RD 23 /* S_DMA_22 */
+#define OMAP242X_DMA_EAC_BT_UL_WR 24 /* S_DMA_23 */
+#define OMAP242X_DMA_EAC_BT_DL_RD 25 /* S_DMA_24 */
+#define OMAP242X_DMA_EAC_BT_DL_WR 26 /* S_DMA_25 */
+#define OMAP243X_DMA_EXT_DMAREQ3 14 /* S_DMA_13 */
+#define OMAP24XX_DMA_SPI3_TX0 15 /* S_DMA_14 */
+#define OMAP24XX_DMA_SPI3_RX0 16 /* S_DMA_15 */
+#define OMAP24XX_DMA_MCBSP3_TX 17 /* S_DMA_16 */
+#define OMAP24XX_DMA_MCBSP3_RX 18 /* S_DMA_17 */
+#define OMAP24XX_DMA_MCBSP4_TX 19 /* S_DMA_18 */
+#define OMAP24XX_DMA_MCBSP4_RX 20 /* S_DMA_19 */
+#define OMAP24XX_DMA_MCBSP5_TX 21 /* S_DMA_20 */
+#define OMAP24XX_DMA_MCBSP5_RX 22 /* S_DMA_21 */
+#define OMAP24XX_DMA_SPI3_TX1 23 /* S_DMA_22 */
+#define OMAP24XX_DMA_SPI3_RX1 24 /* S_DMA_23 */
+#define OMAP243X_DMA_EXT_DMAREQ4 25 /* S_DMA_24 */
+#define OMAP243X_DMA_EXT_DMAREQ5 26 /* S_DMA_25 */
+#define OMAP34XX_DMA_I2C3_TX 25 /* S_DMA_24 */
+#define OMAP34XX_DMA_I2C3_RX 26 /* S_DMA_25 */
+#define OMAP24XX_DMA_I2C1_TX 27 /* S_DMA_26 */
+#define OMAP24XX_DMA_I2C1_RX 28 /* S_DMA_27 */
+#define OMAP24XX_DMA_I2C2_TX 29 /* S_DMA_28 */
+#define OMAP24XX_DMA_I2C2_RX 30 /* S_DMA_29 */
+#define OMAP24XX_DMA_MCBSP1_TX 31 /* S_DMA_30 */
+#define OMAP24XX_DMA_MCBSP1_RX 32 /* S_DMA_31 */
+#define OMAP24XX_DMA_MCBSP2_TX 33 /* S_DMA_32 */
+#define OMAP24XX_DMA_MCBSP2_RX 34 /* S_DMA_33 */
+#define OMAP24XX_DMA_SPI1_TX0 35 /* S_DMA_34 */
+#define OMAP24XX_DMA_SPI1_RX0 36 /* S_DMA_35 */
+#define OMAP24XX_DMA_SPI1_TX1 37 /* S_DMA_36 */
+#define OMAP24XX_DMA_SPI1_RX1 38 /* S_DMA_37 */
+#define OMAP24XX_DMA_SPI1_TX2 39 /* S_DMA_38 */
+#define OMAP24XX_DMA_SPI1_RX2 40 /* S_DMA_39 */
+#define OMAP24XX_DMA_SPI1_TX3 41 /* S_DMA_40 */
+#define OMAP24XX_DMA_SPI1_RX3 42 /* S_DMA_41 */
+#define OMAP24XX_DMA_SPI2_TX0 43 /* S_DMA_42 */
+#define OMAP24XX_DMA_SPI2_RX0 44 /* S_DMA_43 */
+#define OMAP24XX_DMA_SPI2_TX1 45 /* S_DMA_44 */
+#define OMAP24XX_DMA_SPI2_RX1 46 /* S_DMA_45 */
+#define OMAP24XX_DMA_MMC2_TX 47 /* S_DMA_46 */
+#define OMAP24XX_DMA_MMC2_RX 48 /* S_DMA_47 */
+#define OMAP24XX_DMA_UART1_TX 49 /* S_DMA_48 */
+#define OMAP24XX_DMA_UART1_RX 50 /* S_DMA_49 */
+#define OMAP24XX_DMA_UART2_TX 51 /* S_DMA_50 */
+#define OMAP24XX_DMA_UART2_RX 52 /* S_DMA_51 */
+#define OMAP24XX_DMA_UART3_TX 53 /* S_DMA_52 */
+#define OMAP24XX_DMA_UART3_RX 54 /* S_DMA_53 */
+#define OMAP24XX_DMA_USB_W2FC_TX0 55 /* S_DMA_54 */
+#define OMAP24XX_DMA_USB_W2FC_RX0 56 /* S_DMA_55 */
+#define OMAP24XX_DMA_USB_W2FC_TX1 57 /* S_DMA_56 */
+#define OMAP24XX_DMA_USB_W2FC_RX1 58 /* S_DMA_57 */
+#define OMAP24XX_DMA_USB_W2FC_TX2 59 /* S_DMA_58 */
+#define OMAP24XX_DMA_USB_W2FC_RX2 60 /* S_DMA_59 */
+#define OMAP24XX_DMA_MMC1_TX 61 /* S_DMA_60 */
+#define OMAP24XX_DMA_MMC1_RX 62 /* S_DMA_61 */
+#define OMAP24XX_DMA_MS 63 /* S_DMA_62 */
+#define OMAP242X_DMA_EXT_DMAREQ5 64 /* S_DMA_63 */
+#define OMAP243X_DMA_EXT_DMAREQ6 64 /* S_DMA_63 */
+#define OMAP34XX_DMA_EXT_DMAREQ3 64 /* S_DMA_63 */
+#define OMAP34XX_DMA_AES2_TX 65 /* S_DMA_64 */
+#define OMAP34XX_DMA_AES2_RX 66 /* S_DMA_65 */
+#define OMAP34XX_DMA_DES2_TX 67 /* S_DMA_66 */
+#define OMAP34XX_DMA_DES2_RX 68 /* S_DMA_67 */
+#define OMAP34XX_DMA_SHA1MD5_RX 69 /* S_DMA_68 */
+#define OMAP34XX_DMA_SPI4_TX0 70 /* S_DMA_69 */
+#define OMAP34XX_DMA_SPI4_RX0 71 /* S_DMA_70 */
+#define OMAP34XX_DSS_DMA0 72 /* S_DMA_71 */
+#define OMAP34XX_DSS_DMA1 73 /* S_DMA_72 */
+#define OMAP34XX_DSS_DMA2 74 /* S_DMA_73 */
+#define OMAP34XX_DSS_DMA3 75 /* S_DMA_74 */
+#define OMAP34XX_DMA_MMC3_TX 77 /* S_DMA_76 */
+#define OMAP34XX_DMA_MMC3_RX 78 /* S_DMA_77 */
+#define OMAP34XX_DMA_USIM_TX 79 /* S_DMA_78 */
+#define OMAP34XX_DMA_USIM_RX 80 /* S_DMA_79 */
+
+#define OMAP36XX_DMA_UART4_TX 81 /* S_DMA_80 */
+#define OMAP36XX_DMA_UART4_RX 82 /* S_DMA_81 */
+
+/* Only for AM35xx */
+#define AM35XX_DMA_UART4_TX 54
+#define AM35XX_DMA_UART4_RX 55
+
+#endif /* __OMAP2PLUS_DMA_CHANNEL_H */
#include <plat/omap-pm.h>
#include <plat/omap_hwmod.h>
#include <plat/multi.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include "soc.h"
#include "iomap.h"
#include <linux/slab.h>
#include <linux/platform_data/asoc-ti-mcbsp.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <plat/omap_device.h>
#include <linux/pm_runtime.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
#include <plat/omap_hwmod.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <plat/serial.h>
#include <plat/i2c.h>
#include <plat/dmtimer.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
#include <plat/omap_hwmod.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <plat/serial.h>
#include <plat/i2c.h>
#include <plat/dmtimer.h>
*/
#include <plat/omap_hwmod.h>
#include <plat/serial.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <plat/common.h>
#include "hdq1w.h"
#include "omap_hwmod_common_data.h"
+#include "dma.h"
/* UART */
#include <plat/omap_hwmod.h>
#include <plat/serial.h>
#include <linux/platform_data/gpio-omap.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <plat/dmtimer.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
#include <plat/cpu.h>
#include <linux/platform_data/gpio-omap.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <plat/mmc.h>
#include <plat/i2c.h>
#include <linux/platform_data/gpio-omap.h>
#include <plat/omap_hwmod.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <plat/serial.h>
#include "l3_3xxx.h"
#include "l4_3xxx.h"
#include "omap_hwmod_common_data.h"
#include "prm-regbits-34xx.h"
#include "cm-regbits-34xx.h"
+
+#include "dma.h"
#include "wd_timer.h"
/*
#include <plat/omap_hwmod.h>
#include <plat/i2c.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
#include <linux/platform_data/asoc-ti-mcbsp.h>
#include <plat/mmc.h>
#include <plat/clock.h>
#include <plat/sram.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include "common.h"
#include "prm2xxx_3xxx.h"
#include "powerdomain.h"
#include <plat/sdrc.h>
#include <plat/prcm.h>
-#include "gpmc.h"
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include "common.h"
#include "cm2xxx_3xxx.h"
#include "cm-regbits-34xx.h"
+#include "gpmc.h"
#include "prm-regbits-34xx.h"
#include "prm2xxx_3xxx.h"
#include <plat/omap-serial.h>
#include "common.h"
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <plat/omap_hwmod.h>
#include <plat/omap_device.h>
#include <plat/omap-pm.h>
#include <plat/common.h>
#include <plat/vram.h>
#include <linux/platform_data/dsp-omap.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <plat/omap-secure.h>
#include <linux/delay.h>
#include <plat/cpu.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <plat/tc.h>
/*
/*
- * arch/arm/plat-omap/include/mach/dma.h
+ * OMAP DMA handling defines and function
*
* Copyright (C) 2003 Nokia Corporation
* Author: Juha Yrjölä <juha.yrjola@nokia.com>
#include <linux/platform_device.h>
-/*
- * TODO: These dma channel defines should go away once all
- * the omap drivers hwmod adapted.
- */
-
-/* Move omap4 specific defines to dma-44xx.h */
-#include "dma-44xx.h"
-
#define INT_DMA_LCD 25
-/* DMA channels for omap1 */
-#define OMAP_DMA_NO_DEVICE 0
-#define OMAP_DMA_MCSI1_TX 1
-#define OMAP_DMA_MCSI1_RX 2
-#define OMAP_DMA_I2C_RX 3
-#define OMAP_DMA_I2C_TX 4
-#define OMAP_DMA_EXT_NDMA_REQ 5
-#define OMAP_DMA_EXT_NDMA_REQ2 6
-#define OMAP_DMA_UWIRE_TX 7
-#define OMAP_DMA_MCBSP1_TX 8
-#define OMAP_DMA_MCBSP1_RX 9
-#define OMAP_DMA_MCBSP3_TX 10
-#define OMAP_DMA_MCBSP3_RX 11
-#define OMAP_DMA_UART1_TX 12
-#define OMAP_DMA_UART1_RX 13
-#define OMAP_DMA_UART2_TX 14
-#define OMAP_DMA_UART2_RX 15
-#define OMAP_DMA_MCBSP2_TX 16
-#define OMAP_DMA_MCBSP2_RX 17
-#define OMAP_DMA_UART3_TX 18
-#define OMAP_DMA_UART3_RX 19
-#define OMAP_DMA_CAMERA_IF_RX 20
-#define OMAP_DMA_MMC_TX 21
-#define OMAP_DMA_MMC_RX 22
-#define OMAP_DMA_NAND 23
-#define OMAP_DMA_IRQ_LCD_LINE 24
-#define OMAP_DMA_MEMORY_STICK 25
-#define OMAP_DMA_USB_W2FC_RX0 26
-#define OMAP_DMA_USB_W2FC_RX1 27
-#define OMAP_DMA_USB_W2FC_RX2 28
-#define OMAP_DMA_USB_W2FC_TX0 29
-#define OMAP_DMA_USB_W2FC_TX1 30
-#define OMAP_DMA_USB_W2FC_TX2 31
-
-/* These are only for 1610 */
-#define OMAP_DMA_CRYPTO_DES_IN 32
-#define OMAP_DMA_SPI_TX 33
-#define OMAP_DMA_SPI_RX 34
-#define OMAP_DMA_CRYPTO_HASH 35
-#define OMAP_DMA_CCP_ATTN 36
-#define OMAP_DMA_CCP_FIFO_NOT_EMPTY 37
-#define OMAP_DMA_CMT_APE_TX_CHAN_0 38
-#define OMAP_DMA_CMT_APE_RV_CHAN_0 39
-#define OMAP_DMA_CMT_APE_TX_CHAN_1 40
-#define OMAP_DMA_CMT_APE_RV_CHAN_1 41
-#define OMAP_DMA_CMT_APE_TX_CHAN_2 42
-#define OMAP_DMA_CMT_APE_RV_CHAN_2 43
-#define OMAP_DMA_CMT_APE_TX_CHAN_3 44
-#define OMAP_DMA_CMT_APE_RV_CHAN_3 45
-#define OMAP_DMA_CMT_APE_TX_CHAN_4 46
-#define OMAP_DMA_CMT_APE_RV_CHAN_4 47
-#define OMAP_DMA_CMT_APE_TX_CHAN_5 48
-#define OMAP_DMA_CMT_APE_RV_CHAN_5 49
-#define OMAP_DMA_CMT_APE_TX_CHAN_6 50
-#define OMAP_DMA_CMT_APE_RV_CHAN_6 51
-#define OMAP_DMA_CMT_APE_TX_CHAN_7 52
-#define OMAP_DMA_CMT_APE_RV_CHAN_7 53
-#define OMAP_DMA_MMC2_TX 54
-#define OMAP_DMA_MMC2_RX 55
-#define OMAP_DMA_CRYPTO_DES_OUT 56
-
-/* DMA channels for 24xx */
-#define OMAP24XX_DMA_NO_DEVICE 0
-#define OMAP24XX_DMA_XTI_DMA 1 /* S_DMA_0 */
-#define OMAP24XX_DMA_EXT_DMAREQ0 2 /* S_DMA_1 */
-#define OMAP24XX_DMA_EXT_DMAREQ1 3 /* S_DMA_2 */
-#define OMAP24XX_DMA_GPMC 4 /* S_DMA_3 */
-#define OMAP24XX_DMA_GFX 5 /* S_DMA_4 */
-#define OMAP24XX_DMA_DSS 6 /* S_DMA_5 */
-#define OMAP242X_DMA_VLYNQ_TX 7 /* S_DMA_6 */
-#define OMAP24XX_DMA_EXT_DMAREQ2 7 /* S_DMA_6 */
-#define OMAP24XX_DMA_CWT 8 /* S_DMA_7 */
-#define OMAP24XX_DMA_AES_TX 9 /* S_DMA_8 */
-#define OMAP24XX_DMA_AES_RX 10 /* S_DMA_9 */
-#define OMAP24XX_DMA_DES_TX 11 /* S_DMA_10 */
-#define OMAP24XX_DMA_DES_RX 12 /* S_DMA_11 */
-#define OMAP24XX_DMA_SHA1MD5_RX 13 /* S_DMA_12 */
-#define OMAP34XX_DMA_SHA2MD5_RX 13 /* S_DMA_12 */
-#define OMAP242X_DMA_EXT_DMAREQ2 14 /* S_DMA_13 */
-#define OMAP242X_DMA_EXT_DMAREQ3 15 /* S_DMA_14 */
-#define OMAP242X_DMA_EXT_DMAREQ4 16 /* S_DMA_15 */
-#define OMAP242X_DMA_EAC_AC_RD 17 /* S_DMA_16 */
-#define OMAP242X_DMA_EAC_AC_WR 18 /* S_DMA_17 */
-#define OMAP242X_DMA_EAC_MD_UL_RD 19 /* S_DMA_18 */
-#define OMAP242X_DMA_EAC_MD_UL_WR 20 /* S_DMA_19 */
-#define OMAP242X_DMA_EAC_MD_DL_RD 21 /* S_DMA_20 */
-#define OMAP242X_DMA_EAC_MD_DL_WR 22 /* S_DMA_21 */
-#define OMAP242X_DMA_EAC_BT_UL_RD 23 /* S_DMA_22 */
-#define OMAP242X_DMA_EAC_BT_UL_WR 24 /* S_DMA_23 */
-#define OMAP242X_DMA_EAC_BT_DL_RD 25 /* S_DMA_24 */
-#define OMAP242X_DMA_EAC_BT_DL_WR 26 /* S_DMA_25 */
-#define OMAP243X_DMA_EXT_DMAREQ3 14 /* S_DMA_13 */
-#define OMAP24XX_DMA_SPI3_TX0 15 /* S_DMA_14 */
-#define OMAP24XX_DMA_SPI3_RX0 16 /* S_DMA_15 */
-#define OMAP24XX_DMA_MCBSP3_TX 17 /* S_DMA_16 */
-#define OMAP24XX_DMA_MCBSP3_RX 18 /* S_DMA_17 */
-#define OMAP24XX_DMA_MCBSP4_TX 19 /* S_DMA_18 */
-#define OMAP24XX_DMA_MCBSP4_RX 20 /* S_DMA_19 */
-#define OMAP24XX_DMA_MCBSP5_TX 21 /* S_DMA_20 */
-#define OMAP24XX_DMA_MCBSP5_RX 22 /* S_DMA_21 */
-#define OMAP24XX_DMA_SPI3_TX1 23 /* S_DMA_22 */
-#define OMAP24XX_DMA_SPI3_RX1 24 /* S_DMA_23 */
-#define OMAP243X_DMA_EXT_DMAREQ4 25 /* S_DMA_24 */
-#define OMAP243X_DMA_EXT_DMAREQ5 26 /* S_DMA_25 */
-#define OMAP34XX_DMA_I2C3_TX 25 /* S_DMA_24 */
-#define OMAP34XX_DMA_I2C3_RX 26 /* S_DMA_25 */
-#define OMAP24XX_DMA_I2C1_TX 27 /* S_DMA_26 */
-#define OMAP24XX_DMA_I2C1_RX 28 /* S_DMA_27 */
-#define OMAP24XX_DMA_I2C2_TX 29 /* S_DMA_28 */
-#define OMAP24XX_DMA_I2C2_RX 30 /* S_DMA_29 */
-#define OMAP24XX_DMA_MCBSP1_TX 31 /* S_DMA_30 */
-#define OMAP24XX_DMA_MCBSP1_RX 32 /* S_DMA_31 */
-#define OMAP24XX_DMA_MCBSP2_TX 33 /* S_DMA_32 */
-#define OMAP24XX_DMA_MCBSP2_RX 34 /* S_DMA_33 */
-#define OMAP24XX_DMA_SPI1_TX0 35 /* S_DMA_34 */
-#define OMAP24XX_DMA_SPI1_RX0 36 /* S_DMA_35 */
-#define OMAP24XX_DMA_SPI1_TX1 37 /* S_DMA_36 */
-#define OMAP24XX_DMA_SPI1_RX1 38 /* S_DMA_37 */
-#define OMAP24XX_DMA_SPI1_TX2 39 /* S_DMA_38 */
-#define OMAP24XX_DMA_SPI1_RX2 40 /* S_DMA_39 */
-#define OMAP24XX_DMA_SPI1_TX3 41 /* S_DMA_40 */
-#define OMAP24XX_DMA_SPI1_RX3 42 /* S_DMA_41 */
-#define OMAP24XX_DMA_SPI2_TX0 43 /* S_DMA_42 */
-#define OMAP24XX_DMA_SPI2_RX0 44 /* S_DMA_43 */
-#define OMAP24XX_DMA_SPI2_TX1 45 /* S_DMA_44 */
-#define OMAP24XX_DMA_SPI2_RX1 46 /* S_DMA_45 */
-#define OMAP24XX_DMA_MMC2_TX 47 /* S_DMA_46 */
-#define OMAP24XX_DMA_MMC2_RX 48 /* S_DMA_47 */
-#define OMAP24XX_DMA_UART1_TX 49 /* S_DMA_48 */
-#define OMAP24XX_DMA_UART1_RX 50 /* S_DMA_49 */
-#define OMAP24XX_DMA_UART2_TX 51 /* S_DMA_50 */
-#define OMAP24XX_DMA_UART2_RX 52 /* S_DMA_51 */
-#define OMAP24XX_DMA_UART3_TX 53 /* S_DMA_52 */
-#define OMAP24XX_DMA_UART3_RX 54 /* S_DMA_53 */
-#define OMAP24XX_DMA_USB_W2FC_TX0 55 /* S_DMA_54 */
-#define OMAP24XX_DMA_USB_W2FC_RX0 56 /* S_DMA_55 */
-#define OMAP24XX_DMA_USB_W2FC_TX1 57 /* S_DMA_56 */
-#define OMAP24XX_DMA_USB_W2FC_RX1 58 /* S_DMA_57 */
-#define OMAP24XX_DMA_USB_W2FC_TX2 59 /* S_DMA_58 */
-#define OMAP24XX_DMA_USB_W2FC_RX2 60 /* S_DMA_59 */
-#define OMAP24XX_DMA_MMC1_TX 61 /* S_DMA_60 */
-#define OMAP24XX_DMA_MMC1_RX 62 /* S_DMA_61 */
-#define OMAP24XX_DMA_MS 63 /* S_DMA_62 */
-#define OMAP242X_DMA_EXT_DMAREQ5 64 /* S_DMA_63 */
-#define OMAP243X_DMA_EXT_DMAREQ6 64 /* S_DMA_63 */
-#define OMAP34XX_DMA_EXT_DMAREQ3 64 /* S_DMA_63 */
-#define OMAP34XX_DMA_AES2_TX 65 /* S_DMA_64 */
-#define OMAP34XX_DMA_AES2_RX 66 /* S_DMA_65 */
-#define OMAP34XX_DMA_DES2_TX 67 /* S_DMA_66 */
-#define OMAP34XX_DMA_DES2_RX 68 /* S_DMA_67 */
-#define OMAP34XX_DMA_SHA1MD5_RX 69 /* S_DMA_68 */
-#define OMAP34XX_DMA_SPI4_TX0 70 /* S_DMA_69 */
-#define OMAP34XX_DMA_SPI4_RX0 71 /* S_DMA_70 */
-#define OMAP34XX_DSS_DMA0 72 /* S_DMA_71 */
-#define OMAP34XX_DSS_DMA1 73 /* S_DMA_72 */
-#define OMAP34XX_DSS_DMA2 74 /* S_DMA_73 */
-#define OMAP34XX_DSS_DMA3 75 /* S_DMA_74 */
-#define OMAP34XX_DMA_MMC3_TX 77 /* S_DMA_76 */
-#define OMAP34XX_DMA_MMC3_RX 78 /* S_DMA_77 */
-#define OMAP34XX_DMA_USIM_TX 79 /* S_DMA_78 */
-#define OMAP34XX_DMA_USIM_RX 80 /* S_DMA_79 */
-
-#define OMAP36XX_DMA_UART4_TX 81 /* S_DMA_80 */
-#define OMAP36XX_DMA_UART4_RX 82 /* S_DMA_81 */
-
-/* Only for AM35xx */
-#define AM35XX_DMA_UART4_TX 54
-#define AM35XX_DMA_UART4_RX 55
-
-/*----------------------------------------------------------------------------*/
-
#define OMAP1_DMA_TOUT_IRQ (1 << 0)
#define OMAP_DMA_DROP_IRQ (1 << 1)
#define OMAP_DMA_HALF_IRQ (1 << 2)
+++ /dev/null
-/*
- * OMAP4 SDMA channel definitions
- *
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
- * Copyright (C) 2009-2010 Nokia Corporation
- *
- * Santosh Shilimkar (santosh.shilimkar@ti.com)
- * Benoit Cousson (b-cousson@ti.com)
- * Paul Walmsley (paul@pwsan.com)
- *
- * This file is automatically generated from the OMAP hardware databases.
- * We respectfully ask that any modifications to this file be coordinated
- * with the public linux-omap@vger.kernel.org mailing list and the
- * authors above to ensure that the autogeneration scripts are kept
- * up-to-date with the file contents.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_OMAP44XX_DMA_H
-#define __ARCH_ARM_MACH_OMAP2_OMAP44XX_DMA_H
-
-#define OMAP44XX_DMA_SYS_REQ0 2
-#define OMAP44XX_DMA_SYS_REQ1 3
-#define OMAP44XX_DMA_GPMC 4
-#define OMAP44XX_DMA_DSS_DISPC_REQ 6
-#define OMAP44XX_DMA_SYS_REQ2 7
-#define OMAP44XX_DMA_MCASP1_AXEVT 8
-#define OMAP44XX_DMA_ISS_REQ1 9
-#define OMAP44XX_DMA_ISS_REQ2 10
-#define OMAP44XX_DMA_MCASP1_AREVT 11
-#define OMAP44XX_DMA_ISS_REQ3 12
-#define OMAP44XX_DMA_ISS_REQ4 13
-#define OMAP44XX_DMA_DSS_RFBI_REQ 14
-#define OMAP44XX_DMA_SPI3_TX0 15
-#define OMAP44XX_DMA_SPI3_RX0 16
-#define OMAP44XX_DMA_MCBSP2_TX 17
-#define OMAP44XX_DMA_MCBSP2_RX 18
-#define OMAP44XX_DMA_MCBSP3_TX 19
-#define OMAP44XX_DMA_MCBSP3_RX 20
-#define OMAP44XX_DMA_C2C_SSCM_GPO0 21
-#define OMAP44XX_DMA_C2C_SSCM_GPO1 22
-#define OMAP44XX_DMA_SPI3_TX1 23
-#define OMAP44XX_DMA_SPI3_RX1 24
-#define OMAP44XX_DMA_I2C3_TX 25
-#define OMAP44XX_DMA_I2C3_RX 26
-#define OMAP44XX_DMA_I2C1_TX 27
-#define OMAP44XX_DMA_I2C1_RX 28
-#define OMAP44XX_DMA_I2C2_TX 29
-#define OMAP44XX_DMA_I2C2_RX 30
-#define OMAP44XX_DMA_MCBSP4_TX 31
-#define OMAP44XX_DMA_MCBSP4_RX 32
-#define OMAP44XX_DMA_MCBSP1_TX 33
-#define OMAP44XX_DMA_MCBSP1_RX 34
-#define OMAP44XX_DMA_SPI1_TX0 35
-#define OMAP44XX_DMA_SPI1_RX0 36
-#define OMAP44XX_DMA_SPI1_TX1 37
-#define OMAP44XX_DMA_SPI1_RX1 38
-#define OMAP44XX_DMA_SPI1_TX2 39
-#define OMAP44XX_DMA_SPI1_RX2 40
-#define OMAP44XX_DMA_SPI1_TX3 41
-#define OMAP44XX_DMA_SPI1_RX3 42
-#define OMAP44XX_DMA_SPI2_TX0 43
-#define OMAP44XX_DMA_SPI2_RX0 44
-#define OMAP44XX_DMA_SPI2_TX1 45
-#define OMAP44XX_DMA_SPI2_RX1 46
-#define OMAP44XX_DMA_MMC2_TX 47
-#define OMAP44XX_DMA_MMC2_RX 48
-#define OMAP44XX_DMA_UART1_TX 49
-#define OMAP44XX_DMA_UART1_RX 50
-#define OMAP44XX_DMA_UART2_TX 51
-#define OMAP44XX_DMA_UART2_RX 52
-#define OMAP44XX_DMA_UART3_TX 53
-#define OMAP44XX_DMA_UART3_RX 54
-#define OMAP44XX_DMA_UART4_TX 55
-#define OMAP44XX_DMA_UART4_RX 56
-#define OMAP44XX_DMA_MMC4_TX 57
-#define OMAP44XX_DMA_MMC4_RX 58
-#define OMAP44XX_DMA_MMC5_TX 59
-#define OMAP44XX_DMA_MMC5_RX 60
-#define OMAP44XX_DMA_MMC1_TX 61
-#define OMAP44XX_DMA_MMC1_RX 62
-#define OMAP44XX_DMA_SYS_REQ3 64
-#define OMAP44XX_DMA_MCPDM_UP 65
-#define OMAP44XX_DMA_MCPDM_DL 66
-#define OMAP44XX_DMA_DMIC_REQ 67
-#define OMAP44XX_DMA_C2C_SSCM_GPO2 68
-#define OMAP44XX_DMA_C2C_SSCM_GPO3 69
-#define OMAP44XX_DMA_SPI4_TX0 70
-#define OMAP44XX_DMA_SPI4_RX0 71
-#define OMAP44XX_DMA_DSS_DSI1_REQ0 72
-#define OMAP44XX_DMA_DSS_DSI1_REQ1 73
-#define OMAP44XX_DMA_DSS_DSI1_REQ2 74
-#define OMAP44XX_DMA_DSS_DSI1_REQ3 75
-#define OMAP44XX_DMA_DSS_HDMI_REQ 76
-#define OMAP44XX_DMA_MMC3_TX 77
-#define OMAP44XX_DMA_MMC3_RX 78
-#define OMAP44XX_DMA_USIM_TX 79
-#define OMAP44XX_DMA_USIM_RX 80
-#define OMAP44XX_DMA_DSS_DSI2_REQ0 81
-#define OMAP44XX_DMA_DSS_DSI2_REQ1 82
-#define OMAP44XX_DMA_DSS_DSI2_REQ2 83
-#define OMAP44XX_DMA_DSS_DSI2_REQ3 84
-#define OMAP44XX_DMA_SLIMBUS1_TX0 85
-#define OMAP44XX_DMA_SLIMBUS1_TX1 86
-#define OMAP44XX_DMA_SLIMBUS1_TX2 87
-#define OMAP44XX_DMA_SLIMBUS1_TX3 88
-#define OMAP44XX_DMA_SLIMBUS1_RX0 89
-#define OMAP44XX_DMA_SLIMBUS1_RX1 90
-#define OMAP44XX_DMA_SLIMBUS1_RX2 91
-#define OMAP44XX_DMA_SLIMBUS1_RX3 92
-#define OMAP44XX_DMA_SLIMBUS2_TX0 93
-#define OMAP44XX_DMA_SLIMBUS2_TX1 94
-#define OMAP44XX_DMA_SLIMBUS2_TX2 95
-#define OMAP44XX_DMA_SLIMBUS2_TX3 96
-#define OMAP44XX_DMA_SLIMBUS2_RX0 97
-#define OMAP44XX_DMA_SLIMBUS2_RX1 98
-#define OMAP44XX_DMA_SLIMBUS2_RX2 99
-#define OMAP44XX_DMA_SLIMBUS2_RX3 100
-#define OMAP44XX_DMA_ABE_REQ_0 101
-#define OMAP44XX_DMA_ABE_REQ_1 102
-#define OMAP44XX_DMA_ABE_REQ_2 103
-#define OMAP44XX_DMA_ABE_REQ_3 104
-#define OMAP44XX_DMA_ABE_REQ_4 105
-#define OMAP44XX_DMA_ABE_REQ_5 106
-#define OMAP44XX_DMA_ABE_REQ_6 107
-#define OMAP44XX_DMA_ABE_REQ_7 108
-#define OMAP44XX_DMA_AES1_P_CTX_IN_REQ 109
-#define OMAP44XX_DMA_AES1_P_DATA_IN_REQ 110
-#define OMAP44XX_DMA_AES1_P_DATA_OUT_REQ 111
-#define OMAP44XX_DMA_AES2_P_CTX_IN_REQ 112
-#define OMAP44XX_DMA_AES2_P_DATA_IN_REQ 113
-#define OMAP44XX_DMA_AES2_P_DATA_OUT_REQ 114
-#define OMAP44XX_DMA_DES_P_CTX_IN_REQ 115
-#define OMAP44XX_DMA_DES_P_DATA_IN_REQ 116
-#define OMAP44XX_DMA_DES_P_DATA_OUT_REQ 117
-#define OMAP44XX_DMA_SHA2_CTXIN_P 118
-#define OMAP44XX_DMA_SHA2_DIN_P 119
-#define OMAP44XX_DMA_SHA2_CTXOUT_P 120
-#define OMAP44XX_DMA_AES1_P_CONTEXT_OUT_REQ 121
-#define OMAP44XX_DMA_AES2_P_CONTEXT_OUT_REQ 122
-#define OMAP44XX_DMA_I2C4_TX 124
-#define OMAP44XX_DMA_I2C4_RX 125
-
-#endif
#include <asm/io.h>
-#include <plat/cpu.h>
-
#define RNG_OUT_REG 0x00 /* Output register */
#define RNG_STAT_REG 0x04 /* Status register
[0] = STAT_BUSY */
#include <crypto/scatterwalk.h>
#include <crypto/aes.h>
-#include <plat/cpu.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
/* OMAP TRM gives bitfields as start:end, where start is the higher bit
number. For example 7:0 */
{
pr_info("loading %s driver\n", "omap-aes");
- if (!cpu_class_is_omap2() || omap_type() != OMAP2_DEVICE_TYPE_SEC) {
- pr_err("Unsupported cpu\n");
- return -ENODEV;
- }
-
return platform_driver_register(&omap_aes_driver);
}
#include <crypto/hash.h>
#include <crypto/internal/hash.h>
-#include <plat/cpu.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <mach/irqs.h>
#define SHA_REG_DIGEST(x) (0x00 + ((x) * 0x04))
{
pr_info("loading %s driver\n", "omap-sham");
- if (!cpu_class_is_omap2() ||
- (omap_type() != OMAP2_DEVICE_TYPE_SEC &&
- omap_type() != OMAP2_DEVICE_TYPE_EMU)) {
- pr_err("Unsupported cpu\n");
- return -ENODEV;
- }
-
return platform_driver_register(&omap_sham_driver);
}
#include "virt-dma.h"
-#include <plat/cpu.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
+
+#ifdef CONFIG_ARCH_OMAP2PLUS
+#define dma_omap2plus() 1
+#else
+#define dma_omap2plus() 0
+#endif
struct omap_dmadev {
struct dma_device ddev;
omap_disable_dma_irq(c->dma_ch, OMAP_DMA_BLOCK_IRQ);
}
- if (!cpu_class_is_omap1()) {
+ if (dma_omap2plus()) {
omap_set_dma_src_burst_mode(c->dma_ch, OMAP_DMA_DATA_BURST_16);
omap_set_dma_dest_burst_mode(c->dma_ch, OMAP_DMA_DATA_BURST_16);
}
#include <media/v4l2-ioctl.h>
#include <plat/cpu.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <plat/vrfb.h>
#include <video/omapdss.h>
#include <media/videobuf-dma-contig.h>
#include <media/v4l2-device.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <plat/vrfb.h>
#include "omap_voutdef.h"
#include "omap_voutlib.h"
+#define OMAP_DMA_NO_DEVICE 0
+
/*
* Function for allocating video buffers
*/
#include "ispreg.h"
#include "isphist.h"
+#define OMAP24XX_DMA_NO_DEVICE 0
+
#define HIST_CONFIG_DMA 1
#define HIST_USING_DMA(hist) ((hist)->dma_ch >= 0)
#include <linux/types.h>
#include <linux/omap3isp.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <media/v4l2-event.h>
#include "isp.h"
#include <media/videobuf-dma-contig.h>
#include <media/videobuf-dma-sg.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#define DRIVER_NAME "omap1-camera"
#define DRIVER_VERSION "0.0.2"
+#define OMAP_DMA_CAMERA_IF_RX 20
/*
* ---------------------------------------------------------------------------
#include <linux/slab.h>
#include <plat/mmc.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#define OMAP_MMC_REG_CMD 0x00
#define OMAP_MMC_REG_ARGL 0x01
#define OMAP_MMC_CMDTYPE_AC 2
#define OMAP_MMC_CMDTYPE_ADTC 3
+#define OMAP_DMA_MMC_TX 21
+#define OMAP_DMA_MMC_RX 22
+#define OMAP_DMA_MMC2_TX 54
+#define OMAP_DMA_MMC2_RX 55
+
+#define OMAP24XX_DMA_MMC2_TX 47
+#define OMAP24XX_DMA_MMC2_RX 48
+#define OMAP24XX_DMA_MMC1_TX 61
+#define OMAP24XX_DMA_MMC1_RX 62
+
#define DRIVER_NAME "mmci-omap"
#include <linux/bch.h>
#endif
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <linux/platform_data/mtd-nand-omap2.h>
#define DRIVER_NAME "omap2-nand"
#define PREFETCH_STATUS_FIFO_CNT(val) ((val >> 24) & 0x7F)
#define STATUS_BUFF_EMPTY 0x00000001
+#define OMAP24XX_DMA_GPMC 4
+
/* oob info generated runtime depending on ecc algorithm and layout selected */
static struct nand_ecclayout omap_oobinfo;
/* Define some generic bad / good block scan pattern which are used
#include <linux/platform_data/mtd-onenand-omap2.h>
#include <asm/gpio.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#define DRIVER_NAME "omap2-onenand"
#include <linux/vmalloc.h>
#include <linux/ioport.h>
#include <linux/platform_device.h>
-#include <plat/clock.h>
#include <linux/clk.h>
#include <plat/mailbox.h>
#include <linux/pagemap.h>
#include <asm/unaligned.h>
#include <asm/mach-types.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <mach/usb.h>
#define DRIVER_DESC "OMAP UDC driver"
#define DRIVER_VERSION "4 October 2004"
+#define OMAP_DMA_USB_W2FC_TX0 29
+
/*
* The OMAP UDC needs _very_ early endpoint setup: before enabling the
* D+ pullup to allow enumeration. That's too early for the gadget
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/slab.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include "musb_core.h"
#include "tusb6010.h"
#define MAX_DMAREQ 5 /* REVISIT: Really 6, but req5 not OK */
+#define OMAP24XX_DMA_EXT_DMAREQ0 2
+#define OMAP24XX_DMA_EXT_DMAREQ1 3
+#define OMAP242X_DMA_EXT_DMAREQ2 14
+#define OMAP242X_DMA_EXT_DMAREQ3 15
+#define OMAP242X_DMA_EXT_DMAREQ4 16
+#define OMAP242X_DMA_EXT_DMAREQ5 64
+
struct tusb_omap_dma_ch {
struct musb *musb;
void __iomem *tbase;
#include <linux/gfp.h>
#include <mach/lcdc.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include <asm/mach-types.h>
#include <linux/uaccess.h>
#include <linux/module.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include "omapfb.h"
#include "lcdc.h"
#include <linux/io.h>
#include <linux/interrupt.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
#include "omapfb.h"
#include "lcdc.h"
#include <sound/dmaengine_pcm.h>
#include <sound/soc.h>
-#include <plat/cpu.h>
#include "omap-pcm.h"
+#ifdef CONFIG_ARCH_OMAP1
+#define pcm_omap1510() cpu_is_omap1510()
+#else
+#define pcm_omap1510() 0
+#endif
+
static const struct snd_pcm_hardware omap_pcm_hardware = {
.info = SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_MMAP_VALID |
{
snd_pcm_uframes_t offset;
- if (cpu_is_omap1510())
+ if (pcm_omap1510())
offset = snd_dmaengine_pcm_pointer_no_residue(substream);
else
offset = snd_dmaengine_pcm_pointer(substream);
projects / karo-tx-linux.git / commitdiff