Merge tag 'v4.12-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git...

Pull "Rockchip dts64 updates for 4.12 part1" from Heiko Stübner:

Contains various changes for the rk3368 (dma, i2s, disable mailbox per
default, mmc-resets) and also removes the wrongly added idle states, that
do not match the hardware's capabilities, as well as some general rk3399
pcie fixes as well as also the mmc resets.

* tag 'v4.12-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: fix PCIe domain number for rk3399
  arm64: dts: rockchip: add rk3399 dw-mmc resets
  arm64: dts: rockchip: add rk3368 dw-mmc resets
  arm64: dts: rockchip: disable mailbox of RK3368 SoCs per default
  arm64: dts: rockchip: add i2s nodes support for RK3368 SoCs
  arm64: dts: rockchip: add dmac nodes for rk3368 SoCs
  arm64: dts: rockchip: remove wrongly added idle states on rk3368
  arm64: dts: rockchip: sort rk3399-pcie by unit address

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index a635adc47e742c1bdf3a3cd5be613532fe807a8f..6d5dc0587e599dd768ed00d0df92145a862dce1b 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -108,23 +108,10 @@
                        };
                };
 
-               idle-states {
-                       entry-method = "psci";
-
-                       cpu_sleep: cpu-sleep-0 {
-                               compatible = "arm,idle-state";
-                               arm,psci-suspend-param = <0x1010000>;
-                               entry-latency-us = <0x3fffffff>;
-                               exit-latency-us = <0x40000000>;
-                               min-residency-us = <0xffffffff>;
-                       };
-               };
-
                cpu_l0: cpu@0 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x0>;
-                       cpu-idle-states = <&cpu_sleep>;
                        enable-method = "psci";
 
                        #cooling-cells = <2>; /* min followed by max */
@@ -134,7 +121,6 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x1>;
-                       cpu-idle-states = <&cpu_sleep>;
                        enable-method = "psci";
                };
 
@@ -142,7 +128,6 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x2>;
-                       cpu-idle-states = <&cpu_sleep>;
                        enable-method = "psci";
                };
 
@@ -150,7 +135,6 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x3>;
-                       cpu-idle-states = <&cpu_sleep>;
                        enable-method = "psci";
                };
 
@@ -158,7 +142,6 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x100>;
-                       cpu-idle-states = <&cpu_sleep>;
                        enable-method = "psci";
 
                        #cooling-cells = <2>; /* min followed by max */
@@ -168,7 +151,6 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x101>;
-                       cpu-idle-states = <&cpu_sleep>;
                        enable-method = "psci";
                };
 
@@ -176,7 +158,6 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x102>;
-                       cpu-idle-states = <&cpu_sleep>;
                        enable-method = "psci";
                };
 
@@ -184,11 +165,39 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x103>;
-                       cpu-idle-states = <&cpu_sleep>;
                        enable-method = "psci";
                };
        };
 
+       amba {
+               compatible = "simple-bus";
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               dmac_peri: dma-controller@ff250000 {
+                       compatible = "arm,pl330", "arm,primecell";
+                       reg = <0x0 0xff250000 0x0 0x4000>;
+                       interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+                       #dma-cells = <1>;
+                       arm,pl330-broken-no-flushp;
+                       clocks = <&cru ACLK_DMAC_PERI>;
+                       clock-names = "apb_pclk";
+               };
+
+               dmac_bus: dma-controller@ff600000 {
+                       compatible = "arm,pl330", "arm,primecell";
+                       reg = <0x0 0xff600000 0x0 0x4000>;
+                       interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+                       #dma-cells = <1>;
+                       arm,pl330-broken-no-flushp;
+                       clocks = <&cru ACLK_DMAC_BUS>;
+                       clock-names = "apb_pclk";
+               };
+       };
+
        arm-pmu {
                compatible = "arm,armv8-pmuv3";
                interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
@@ -237,6 +246,8 @@
                clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
                fifo-depth = <0x100>;
                interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+               resets = <&cru SRST_MMC0>;
+               reset-names = "reset";
                status = "disabled";
        };
 
@@ -249,6 +260,8 @@
                clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
                fifo-depth = <0x100>;
                interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+               resets = <&cru SRST_SDIO0>;
+               reset-names = "reset";
                status = "disabled";
        };
 
@@ -261,6 +274,8 @@
                clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
                fifo-depth = <0x100>;
                interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+               resets = <&cru SRST_EMMC>;
+               reset-names = "reset";
                status = "disabled";
        };
 
@@ -631,6 +646,7 @@
                clocks = <&cru PCLK_MAILBOX>;
                clock-names = "pclk_mailbox";
                #mbox-cells = <1>;
+               status = "disabled";
        };
 
        pmugrf: syscon@ff738000 {
@@ -684,6 +700,30 @@
                interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
        };
 
+       i2s_2ch: i2s-2ch@ff890000 {
+               compatible = "rockchip,rk3368-i2s", "rockchip,rk3066-i2s";
+               reg = <0x0 0xff890000 0x0 0x1000>;
+               interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+               clock-names = "i2s_clk", "i2s_hclk";
+               clocks = <&cru SCLK_I2S_2CH>, <&cru HCLK_I2S_2CH>;
+               dmas = <&dmac_bus 6>, <&dmac_bus 7>;
+               dma-names = "tx", "rx";
+               status = "disabled";
+       };
+
+       i2s_8ch: i2s-8ch@ff898000 {
+               compatible = "rockchip,rk3368-i2s", "rockchip,rk3066-i2s";
+               reg = <0x0 0xff898000 0x0 0x1000>;
+               interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+               clock-names = "i2s_clk", "i2s_hclk";
+               clocks = <&cru SCLK_I2S_8CH>, <&cru HCLK_I2S_8CH>;
+               dmas = <&dmac_bus 0>, <&dmac_bus 1>;
+               dma-names = "tx", "rx";
+               pinctrl-names = "default";
+               pinctrl-0 = <&i2s_8ch_bus>;
+               status = "disabled";
+       };
+
        gic: interrupt-controller@ffb71000 {
                compatible = "arm,gic-400";
                interrupt-controller;
@@ -886,6 +926,20 @@
                        };
                };
 
+               i2s {
+                       i2s_8ch_bus: i2s-8ch-bus {
+                               rockchip,pins = <2 12 RK_FUNC_1 &pcfg_pull_none>,
+                                               <2 13 RK_FUNC_1 &pcfg_pull_none>,
+                                               <2 14 RK_FUNC_1 &pcfg_pull_none>,
+                                               <2 15 RK_FUNC_1 &pcfg_pull_none>,
+                                               <2 16 RK_FUNC_1 &pcfg_pull_none>,
+                                               <2 17 RK_FUNC_1 &pcfg_pull_none>,
+                                               <2 18 RK_FUNC_1 &pcfg_pull_none>,
+                                               <2 19 RK_FUNC_1 &pcfg_pull_none>,
+                                               <2 20 RK_FUNC_1 &pcfg_pull_none>;
+                       };
+               };
+
                pwm0 {
                        pwm0_pin: pwm0-pin {
                                rockchip,pins = <3 8 RK_FUNC_2 &pcfg_pull_none>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 8e6d1bdeb9c3bdd83f1b4d1b37d92f4073698cb6..00611f9c52cc30d964cb8af2daf347007e243bbd 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -211,6 +211,51 @@
                };
        };
 
+       pcie0: pcie@f8000000 {
+               compatible = "rockchip,rk3399-pcie";
+               reg = <0x0 0xf8000000 0x0 0x2000000>,
+                     <0x0 0xfd000000 0x0 0x1000000>;
+               reg-names = "axi-base", "apb-base";
+               #address-cells = <3>;
+               #size-cells = <2>;
+               #interrupt-cells = <1>;
+               aspm-no-l0s;
+               bus-range = <0x0 0x1>;
+               clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>,
+                        <&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>;
+               clock-names = "aclk", "aclk-perf",
+                             "hclk", "pm";
+               interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH 0>,
+                            <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH 0>,
+                            <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH 0>;
+               interrupt-names = "sys", "legacy", "client";
+               interrupt-map-mask = <0 0 0 7>;
+               interrupt-map = <0 0 0 1 &pcie0_intc 0>,
+                               <0 0 0 2 &pcie0_intc 1>,
+                               <0 0 0 3 &pcie0_intc 2>,
+                               <0 0 0 4 &pcie0_intc 3>;
+               linux,pci-domain = <0>;
+               max-link-speed = <1>;
+               msi-map = <0x0 &its 0x0 0x1000>;
+               phys = <&pcie_phy>;
+               phy-names = "pcie-phy";
+               ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x600000
+                         0x81000000 0x0 0xfa600000 0x0 0xfa600000 0x0 0x100000>;
+               resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>,
+                        <&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE>,
+                        <&cru SRST_PCIE_PM>, <&cru SRST_P_PCIE>,
+                        <&cru SRST_A_PCIE>;
+               reset-names = "core", "mgmt", "mgmt-sticky", "pipe",
+                             "pm", "pclk", "aclk";
+               status = "disabled";
+
+               pcie0_intc: interrupt-controller {
+                       interrupt-controller;
+                       #address-cells = <0>;
+                       #interrupt-cells = <1>;
+               };
+       };
+
        gmac: ethernet@fe300000 {
                compatible = "rockchip,rk3399-gmac";
                reg = <0x0 0xfe300000 0x0 0x10000>;
@@ -241,6 +286,8 @@
                         <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
                clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
                fifo-depth = <0x100>;
+               resets = <&cru SRST_SDIO0>;
+               reset-names = "reset";
                status = "disabled";
        };
 
@@ -255,6 +302,8 @@
                clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
                fifo-depth = <0x100>;
                power-domains = <&power RK3399_PD_SD>;
+               resets = <&cru SRST_SDMMC>;
+               reset-names = "reset";
                status = "disabled";
        };
 
@@ -275,50 +324,6 @@
                status = "disabled";
        };
 
-       pcie0: pcie@f8000000 {
-               compatible = "rockchip,rk3399-pcie";
-               reg = <0x0 0xf8000000 0x0 0x2000000>,
-                     <0x0 0xfd000000 0x0 0x1000000>;
-               reg-names = "axi-base", "apb-base";
-               #address-cells = <3>;
-               #size-cells = <2>;
-               #interrupt-cells = <1>;
-               aspm-no-l0s;
-               bus-range = <0x0 0x1>;
-               clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>,
-                        <&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>;
-               clock-names = "aclk", "aclk-perf",
-                             "hclk", "pm";
-               interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH 0>,
-                            <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH 0>,
-                            <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH 0>;
-               interrupt-names = "sys", "legacy", "client";
-               interrupt-map-mask = <0 0 0 7>;
-               interrupt-map = <0 0 0 1 &pcie0_intc 0>,
-                               <0 0 0 2 &pcie0_intc 1>,
-                               <0 0 0 3 &pcie0_intc 2>,
-                               <0 0 0 4 &pcie0_intc 3>;
-               max-link-speed = <1>;
-               msi-map = <0x0 &its 0x0 0x1000>;
-               phys = <&pcie_phy>;
-               phy-names = "pcie-phy";
-               ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x600000
-                         0x81000000 0x0 0xfa600000 0x0 0xfa600000 0x0 0x100000>;
-               resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>,
-                        <&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE>,
-                        <&cru SRST_PCIE_PM>, <&cru SRST_P_PCIE>,
-                        <&cru SRST_A_PCIE>;
-               reset-names = "core", "mgmt", "mgmt-sticky", "pipe",
-                             "pm", "pclk", "aclk";
-               status = "disabled";
-
-               pcie0_intc: interrupt-controller {
-                       interrupt-controller;
-                       #address-cells = <0>;
-                       #interrupt-cells = <1>;
-               };
-       };
-
        usb_host0_ehci: usb@fe380000 {
                compatible = "generic-ehci";
                reg = <0x0 0xfe380000 0x0 0x20000>;