drm/nouveau/ce: rename from copy (no binary change)

Switch to NVIDIA's name for the device.

The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/include/nvif/class.h b/drivers/gpu/drm/nouveau/include/nvif/class.h
index d5da658d9d43afd63f3b242c3c3cba264ef51d53..0fe20917e05d7228f3a6905a746d45f5b907befa 100644 (file)
--- a/drivers/gpu/drm/nouveau/include/nvif/class.h
+++ b/drivers/gpu/drm/nouveau/include/nvif/class.h
@@ -129,11 +129,11 @@ struct nv_device_v0 {
 #define NV_DEVICE_V0_DISABLE_CIPHER                       0x0000001000000000ULL
 #define NV_DEVICE_V0_DISABLE_BSP                          0x0000002000000000ULL
 #define NV_DEVICE_V0_DISABLE_PPP                          0x0000004000000000ULL
-#define NV_DEVICE_V0_DISABLE_COPY0                        0x0000008000000000ULL
-#define NV_DEVICE_V0_DISABLE_COPY1                        0x0000010000000000ULL
+#define NV_DEVICE_V0_DISABLE_CE0                          0x0000008000000000ULL
+#define NV_DEVICE_V0_DISABLE_CE1                          0x0000010000000000ULL
 #define NV_DEVICE_V0_DISABLE_VIC                          0x0000020000000000ULL
 #define NV_DEVICE_V0_DISABLE_VENC                         0x0000040000000000ULL
-#define NV_DEVICE_V0_DISABLE_COPY2                        0x0000080000000000ULL
+#define NV_DEVICE_V0_DISABLE_CE2                          0x0000080000000000ULL
 #define NV_DEVICE_V0_DISABLE_MSVLD                        0x0000100000000000ULL
 #define NV_DEVICE_V0_DISABLE_SEC                          0x0000200000000000ULL
        __u64 disable;  /* disable particular subsystems */

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/device.h b/drivers/gpu/drm/nouveau/include/nvkm/core/device.h
index cefa8774e11c0ef446af8968fec1b7869e07fdc1..952e36cdb71c0f7db7da7cafda7680f18f6dc903 100644 (file)
--- a/drivers/gpu/drm/nouveau/include/nvkm/core/device.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/core/device.h
@@ -52,9 +52,9 @@ enum nv_subdev_type {
        NVDEV_ENGINE_CIPHER,
        NVDEV_ENGINE_BSP,
        NVDEV_ENGINE_PPP,
-       NVDEV_ENGINE_COPY0,
-       NVDEV_ENGINE_COPY1,
-       NVDEV_ENGINE_COPY2,
+       NVDEV_ENGINE_CE0,
+       NVDEV_ENGINE_CE1,
+       NVDEV_ENGINE_CE2,
        NVDEV_ENGINE_VIC,
        NVDEV_ENGINE_VENC,
        NVDEV_ENGINE_DISP,

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h
new file mode 100644 (file)
index 0000000..639d0fd
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h
@@ -0,0 +1,13 @@
+#ifndef __NVKM_CE_H__
+#define __NVKM_CE_H__
+
+void nva3_ce_intr(struct nouveau_subdev *);
+
+extern struct nouveau_oclass nva3_ce_oclass;
+extern struct nouveau_oclass nvc0_ce0_oclass;
+extern struct nouveau_oclass nvc0_ce1_oclass;
+extern struct nouveau_oclass nve0_ce0_oclass;
+extern struct nouveau_oclass nve0_ce1_oclass;
+extern struct nouveau_oclass nve0_ce2_oclass;
+
+#endif

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/copy.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/copy.h
deleted file mode 100644 (file)
index 316a28a..0000000
--- a/drivers/gpu/drm/nouveau/include/nvkm/engine/copy.h
+++ /dev/null
@@ -1,13 +0,0 @@
-#ifndef __NOUVEAU_COPY_H__
-#define __NOUVEAU_COPY_H__
-
-void nva3_copy_intr(struct nouveau_subdev *);
-
-extern struct nouveau_oclass nva3_copy_oclass;
-extern struct nouveau_oclass nvc0_copy0_oclass;
-extern struct nouveau_oclass nvc0_copy1_oclass;
-extern struct nouveau_oclass nve0_copy0_oclass;
-extern struct nouveau_oclass nve0_copy1_oclass;
-extern struct nouveau_oclass nve0_copy2_oclass;
-
-#endif

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/Kbuild
index aad171d3cbccf0324c4ce001f46069d1de0fd5c0..71d6542147a2d7c2ec9681a8cb6c80e3b13fed66 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/Kbuild
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/Kbuild
@@ -3,7 +3,7 @@ nvkm-y += nvkm/engine/xtensa.o
 
 include $(src)/nvkm/engine/bsp/Kbuild
 include $(src)/nvkm/engine/cipher/Kbuild
-include $(src)/nvkm/engine/copy/Kbuild
+include $(src)/nvkm/engine/ce/Kbuild
 include $(src)/nvkm/engine/device/Kbuild
 include $(src)/nvkm/engine/disp/Kbuild
 include $(src)/nvkm/engine/dmaobj/Kbuild

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/ce/Kbuild
new file mode 100644 (file)
index 0000000..834523d
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/Kbuild
@@ -0,0 +1,3 @@
+nvkm-y += nvkm/engine/ce/nva3.o
+nvkm-y += nvkm/engine/ce/nvc0.o
+nvkm-y += nvkm/engine/ce/nve0.o

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/copy/fuc/com.fuc b/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/com.fuc
similarity index 99%
rename from drivers/gpu/drm/nouveau/nvkm/engine/copy/fuc/com.fuc
rename to drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/com.fuc
index 33b67dc711ac726ae2f88c82721eff248a6c79bb..fcc4ba172443c49e025299327791cf12f2b5d214 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/copy/fuc/com.fuc
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/com.fuc
@@ -31,9 +31,9 @@
  */
 
 #ifdef NVA3
-.section #nva3_pcopy_data
+.section #nva3_pce_data
 #else
-.section #nvc0_pcopy_data
+.section #nvc0_pce_data
 #endif
 
 ctx_object:                   .b32 0
@@ -135,9 +135,9 @@ dispatch_dma:
 .b16 0x800 0
 
 #ifdef NVA3
-.section #nva3_pcopy_code
+.section #nva3_pce_code
 #else
-.section #nvc0_pcopy_code
+.section #nvc0_pce_code
 #endif
 
 main:

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/copy/fuc/nva3.fuc3 b/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/nva3.fuc3
similarity index 100%
rename from drivers/gpu/drm/nouveau/nvkm/engine/copy/fuc/nva3.fuc3
rename to drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/nva3.fuc3

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/copy/fuc/nva3.fuc3.h b/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/nva3.fuc3.h
similarity index 99%
rename from drivers/gpu/drm/nouveau/nvkm/engine/copy/fuc/nva3.fuc3.h
rename to drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/nva3.fuc3.h
index 241b272012062b71c90f16f703d7ec9fb1663c38..362872df592a8fb8493c70bb64c3a66c7cbac4d4 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/copy/fuc/nva3.fuc3.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/nva3.fuc3.h
@@ -1,4 +1,4 @@
-uint32_t nva3_pcopy_data[] = {
+uint32_t nva3_pce_data[] = {
 /* 0x0000: ctx_object */
        0x00000000,
 /* 0x0004: ctx_dma */
@@ -183,7 +183,7 @@ uint32_t nva3_pcopy_data[] = {
        0x00000800,
 };
 
-uint32_t nva3_pcopy_code[] = {
+uint32_t nva3_pce_code[] = {
 /* 0x0000: main */
        0x04fe04bd,
        0x3517f000,

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/copy/fuc/nvc0.fuc3 b/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/nvc0.fuc3
similarity index 100%
rename from drivers/gpu/drm/nouveau/nvkm/engine/copy/fuc/nvc0.fuc3
rename to drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/nvc0.fuc3

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/copy/fuc/nvc0.fuc3.h b/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/nvc0.fuc3.h
similarity index 99%
rename from drivers/gpu/drm/nouveau/nvkm/engine/copy/fuc/nvc0.fuc3.h
rename to drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/nvc0.fuc3.h
index 98cc4216a3722d190fe815620ab6068c2941f4a2..042257daef8b1b1cc28bdb44f754651f9fbb2117 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/copy/fuc/nvc0.fuc3.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/nvc0.fuc3.h
@@ -1,4 +1,4 @@
-uint32_t nvc0_pcopy_data[] = {
+uint32_t nvc0_pce_data[] = {
 /* 0x0000: ctx_object */
        0x00000000,
 /* 0x0004: ctx_query_address_high */
@@ -171,7 +171,7 @@ uint32_t nvc0_pcopy_data[] = {
        0x00000800,
 };
 
-uint32_t nvc0_pcopy_code[] = {
+uint32_t nvc0_pce_code[] = {
 /* 0x0000: main */
        0x04fe04bd,
        0x3517f000,

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/copy/nva3.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/nva3.c
similarity index 81%
rename from drivers/gpu/drm/nouveau/nvkm/engine/copy/nva3.c
rename to drivers/gpu/drm/nouveau/nvkm/engine/ce/nva3.c
index 6ae64969e2e5b01b16d4d8aa18186bb62b5e04ae..b193b5f4037a88ea47925d14759e05549b897e56 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/copy/nva3.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/nva3.c
@@ -24,7 +24,7 @@
 
 #include <engine/falcon.h>
 #include <engine/fifo.h>
-#include <engine/copy.h>
+#include <engine/ce.h>
 
 #include <subdev/fb.h>
 #include <subdev/mmu.h>
@@ -35,7 +35,7 @@
 
 #include "fuc/nva3.fuc3.h"
 
-struct nva3_copy_priv {
+struct nva3_ce_priv {
        struct nouveau_falcon base;
 };
 
@@ -44,18 +44,18 @@ struct nva3_copy_priv {
  ******************************************************************************/
 
 static struct nouveau_oclass
-nva3_copy_sclass[] = {
+nva3_ce_sclass[] = {
        { 0x85b5, &nouveau_object_ofuncs },
        {}
 };
 
 /*******************************************************************************
- * PCOPY context
+ * PCE context
  ******************************************************************************/
 
 static struct nouveau_oclass
-nva3_copy_cclass = {
-       .handle = NV_ENGCTX(COPY0, 0xa3),
+nva3_ce_cclass = {
+       .handle = NV_ENGCTX(CE0, 0xa3),
        .ofuncs = &(struct nouveau_ofuncs) {
                .ctor = _nouveau_falcon_context_ctor,
                .dtor = _nouveau_falcon_context_dtor,
@@ -68,10 +68,10 @@ nva3_copy_cclass = {
 };
 
 /*******************************************************************************
- * PCOPY engine/subdev functions
+ * PCE engine/subdev functions
  ******************************************************************************/
 
-static const struct nouveau_enum nva3_copy_isr_error_name[] = {
+static const struct nouveau_enum nva3_ce_isr_error_name[] = {
        { 0x0001, "ILLEGAL_MTHD" },
        { 0x0002, "INVALID_ENUM" },
        { 0x0003, "INVALID_BITFIELD" },
@@ -79,7 +79,7 @@ static const struct nouveau_enum nva3_copy_isr_error_name[] = {
 };
 
 void
-nva3_copy_intr(struct nouveau_subdev *subdev)
+nva3_ce_intr(struct nouveau_subdev *subdev)
 {
        struct nouveau_fifo *pfifo = nouveau_fifo(subdev);
        struct nouveau_engine *engine = nv_engine(subdev);
@@ -100,7 +100,7 @@ nva3_copy_intr(struct nouveau_subdev *subdev)
 
        if (stat & 0x00000040) {
                nv_error(falcon, "DISPATCH_ERROR [");
-               nouveau_enum_print(nva3_copy_isr_error_name, ssta);
+               nouveau_enum_print(nva3_ce_isr_error_name, ssta);
                pr_cont("] ch %d [0x%010llx %s] subc %d mthd 0x%04x data 0x%08x\n",
                       chid, inst << 12, nouveau_client_name(engctx), subc,
                       mthd, data);
@@ -117,36 +117,36 @@ nva3_copy_intr(struct nouveau_subdev *subdev)
 }
 
 static int
-nva3_copy_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+nva3_ce_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
               struct nouveau_oclass *oclass, void *data, u32 size,
               struct nouveau_object **pobject)
 {
        bool enable = (nv_device(parent)->chipset != 0xaf);
-       struct nva3_copy_priv *priv;
+       struct nva3_ce_priv *priv;
        int ret;
 
        ret = nouveau_falcon_create(parent, engine, oclass, 0x104000, enable,
-                                   "PCE0", "copy0", &priv);
+                                   "PCE0", "ce0", &priv);
        *pobject = nv_object(priv);
        if (ret)
                return ret;
 
        nv_subdev(priv)->unit = 0x00802000;
-       nv_subdev(priv)->intr = nva3_copy_intr;
-       nv_engine(priv)->cclass = &nva3_copy_cclass;
-       nv_engine(priv)->sclass = nva3_copy_sclass;
-       nv_falcon(priv)->code.data = nva3_pcopy_code;
-       nv_falcon(priv)->code.size = sizeof(nva3_pcopy_code);
-       nv_falcon(priv)->data.data = nva3_pcopy_data;
-       nv_falcon(priv)->data.size = sizeof(nva3_pcopy_data);
+       nv_subdev(priv)->intr = nva3_ce_intr;
+       nv_engine(priv)->cclass = &nva3_ce_cclass;
+       nv_engine(priv)->sclass = nva3_ce_sclass;
+       nv_falcon(priv)->code.data = nva3_pce_code;
+       nv_falcon(priv)->code.size = sizeof(nva3_pce_code);
+       nv_falcon(priv)->data.data = nva3_pce_data;
+       nv_falcon(priv)->data.size = sizeof(nva3_pce_data);
        return 0;
 }
 
 struct nouveau_oclass
-nva3_copy_oclass = {
-       .handle = NV_ENGINE(COPY0, 0xa3),
+nva3_ce_oclass = {
+       .handle = NV_ENGINE(CE0, 0xa3),
        .ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = nva3_copy_ctor,
+               .ctor = nva3_ce_ctor,
                .dtor = _nouveau_falcon_dtor,
                .init = _nouveau_falcon_init,
                .fini = _nouveau_falcon_fini,

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/copy/nvc0.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/nvc0.c
similarity index 67%
rename from drivers/gpu/drm/nouveau/nvkm/engine/copy/nvc0.c
rename to drivers/gpu/drm/nouveau/nvkm/engine/ce/nvc0.c
index abe324993eaf3816e3267295c30ac81e1bd966b6..f5dff133362d919aa3d27298c56f254d7b061b9b 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/copy/nvc0.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/nvc0.c
@@ -24,14 +24,14 @@
 
 #include <engine/falcon.h>
 #include <engine/fifo.h>
-#include <engine/copy.h>
+#include <engine/ce.h>
 
 #include <core/enum.h>
 #include <core/enum.h>
 
 #include "fuc/nvc0.fuc3.h"
 
-struct nvc0_copy_priv {
+struct nvc0_ce_priv {
        struct nouveau_falcon base;
 };
 
@@ -40,23 +40,23 @@ struct nvc0_copy_priv {
  ******************************************************************************/
 
 static struct nouveau_oclass
-nvc0_copy0_sclass[] = {
+nvc0_ce0_sclass[] = {
        { 0x90b5, &nouveau_object_ofuncs },
        {},
 };
 
 static struct nouveau_oclass
-nvc0_copy1_sclass[] = {
+nvc0_ce1_sclass[] = {
        { 0x90b8, &nouveau_object_ofuncs },
        {},
 };
 
 /*******************************************************************************
- * PCOPY context
+ * PCE context
  ******************************************************************************/
 
 static struct nouveau_ofuncs
-nvc0_copy_context_ofuncs = {
+nvc0_ce_context_ofuncs = {
        .ctor = _nouveau_falcon_context_ctor,
        .dtor = _nouveau_falcon_context_dtor,
        .init = _nouveau_falcon_context_init,
@@ -66,92 +66,92 @@ nvc0_copy_context_ofuncs = {
 };
 
 static struct nouveau_oclass
-nvc0_copy0_cclass = {
-       .handle = NV_ENGCTX(COPY0, 0xc0),
-       .ofuncs = &nvc0_copy_context_ofuncs,
+nvc0_ce0_cclass = {
+       .handle = NV_ENGCTX(CE0, 0xc0),
+       .ofuncs = &nvc0_ce_context_ofuncs,
 };
 
 static struct nouveau_oclass
-nvc0_copy1_cclass = {
-       .handle = NV_ENGCTX(COPY1, 0xc0),
-       .ofuncs = &nvc0_copy_context_ofuncs,
+nvc0_ce1_cclass = {
+       .handle = NV_ENGCTX(CE1, 0xc0),
+       .ofuncs = &nvc0_ce_context_ofuncs,
 };
 
 /*******************************************************************************
- * PCOPY engine/subdev functions
+ * PCE engine/subdev functions
  ******************************************************************************/
 
 static int
-nvc0_copy_init(struct nouveau_object *object)
+nvc0_ce_init(struct nouveau_object *object)
 {
-       struct nvc0_copy_priv *priv = (void *)object;
+       struct nvc0_ce_priv *priv = (void *)object;
        int ret;
 
        ret = nouveau_falcon_init(&priv->base);
        if (ret)
                return ret;
 
-       nv_wo32(priv, 0x084, nv_engidx(&priv->base.base) - NVDEV_ENGINE_COPY0);
+       nv_wo32(priv, 0x084, nv_engidx(&priv->base.base) - NVDEV_ENGINE_CE0);
        return 0;
 }
 
 static int
-nvc0_copy0_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+nvc0_ce0_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
                struct nouveau_oclass *oclass, void *data, u32 size,
                struct nouveau_object **pobject)
 {
-       struct nvc0_copy_priv *priv;
+       struct nvc0_ce_priv *priv;
        int ret;
 
        ret = nouveau_falcon_create(parent, engine, oclass, 0x104000, true,
-                                   "PCE0", "copy0", &priv);
+                                   "PCE0", "ce0", &priv);
        *pobject = nv_object(priv);
        if (ret)
                return ret;
 
        nv_subdev(priv)->unit = 0x00000040;
-       nv_subdev(priv)->intr = nva3_copy_intr;
-       nv_engine(priv)->cclass = &nvc0_copy0_cclass;
-       nv_engine(priv)->sclass = nvc0_copy0_sclass;
-       nv_falcon(priv)->code.data = nvc0_pcopy_code;
-       nv_falcon(priv)->code.size = sizeof(nvc0_pcopy_code);
-       nv_falcon(priv)->data.data = nvc0_pcopy_data;
-       nv_falcon(priv)->data.size = sizeof(nvc0_pcopy_data);
+       nv_subdev(priv)->intr = nva3_ce_intr;
+       nv_engine(priv)->cclass = &nvc0_ce0_cclass;
+       nv_engine(priv)->sclass = nvc0_ce0_sclass;
+       nv_falcon(priv)->code.data = nvc0_pce_code;
+       nv_falcon(priv)->code.size = sizeof(nvc0_pce_code);
+       nv_falcon(priv)->data.data = nvc0_pce_data;
+       nv_falcon(priv)->data.size = sizeof(nvc0_pce_data);
        return 0;
 }
 
 static int
-nvc0_copy1_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+nvc0_ce1_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
                struct nouveau_oclass *oclass, void *data, u32 size,
                struct nouveau_object **pobject)
 {
-       struct nvc0_copy_priv *priv;
+       struct nvc0_ce_priv *priv;
        int ret;
 
        ret = nouveau_falcon_create(parent, engine, oclass, 0x105000, true,
-                                   "PCE1", "copy1", &priv);
+                                   "PCE1", "ce1", &priv);
        *pobject = nv_object(priv);
        if (ret)
                return ret;
 
        nv_subdev(priv)->unit = 0x00000080;
-       nv_subdev(priv)->intr = nva3_copy_intr;
-       nv_engine(priv)->cclass = &nvc0_copy1_cclass;
-       nv_engine(priv)->sclass = nvc0_copy1_sclass;
-       nv_falcon(priv)->code.data = nvc0_pcopy_code;
-       nv_falcon(priv)->code.size = sizeof(nvc0_pcopy_code);
-       nv_falcon(priv)->data.data = nvc0_pcopy_data;
-       nv_falcon(priv)->data.size = sizeof(nvc0_pcopy_data);
+       nv_subdev(priv)->intr = nva3_ce_intr;
+       nv_engine(priv)->cclass = &nvc0_ce1_cclass;
+       nv_engine(priv)->sclass = nvc0_ce1_sclass;
+       nv_falcon(priv)->code.data = nvc0_pce_code;
+       nv_falcon(priv)->code.size = sizeof(nvc0_pce_code);
+       nv_falcon(priv)->data.data = nvc0_pce_data;
+       nv_falcon(priv)->data.size = sizeof(nvc0_pce_data);
        return 0;
 }
 
 struct nouveau_oclass
-nvc0_copy0_oclass = {
-       .handle = NV_ENGINE(COPY0, 0xc0),
+nvc0_ce0_oclass = {
+       .handle = NV_ENGINE(CE0, 0xc0),
        .ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = nvc0_copy0_ctor,
+               .ctor = nvc0_ce0_ctor,
                .dtor = _nouveau_falcon_dtor,
-               .init = nvc0_copy_init,
+               .init = nvc0_ce_init,
                .fini = _nouveau_falcon_fini,
                .rd32 = _nouveau_falcon_rd32,
                .wr32 = _nouveau_falcon_wr32,
@@ -159,12 +159,12 @@ nvc0_copy0_oclass = {
 };
 
 struct nouveau_oclass
-nvc0_copy1_oclass = {
-       .handle = NV_ENGINE(COPY1, 0xc0),
+nvc0_ce1_oclass = {
+       .handle = NV_ENGINE(CE1, 0xc0),
        .ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = nvc0_copy1_ctor,
+               .ctor = nvc0_ce1_ctor,
                .dtor = _nouveau_falcon_dtor,
-               .init = nvc0_copy_init,
+               .init = nvc0_ce_init,
                .fini = _nouveau_falcon_fini,
                .rd32 = _nouveau_falcon_rd32,
                .wr32 = _nouveau_falcon_wr32,

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/copy/nve0.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/nve0.c
similarity index 71%
rename from drivers/gpu/drm/nouveau/nvkm/engine/copy/nve0.c
rename to drivers/gpu/drm/nouveau/nvkm/engine/ce/nve0.c
index b140a01dd323d13c1a45f0387a7795ff686a5843..b2b31d1b768c1c6c83e64ce4830a51cf48ba7e45 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/copy/nve0.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/nve0.c
@@ -26,9 +26,9 @@
 #include <core/enum.h>
 #include <core/engctx.h>
 
-#include <engine/copy.h>
+#include <engine/ce.h>
 
-struct nve0_copy_priv {
+struct nve0_ce_priv {
        struct nouveau_engine base;
 };
 
@@ -37,17 +37,17 @@ struct nve0_copy_priv {
  ******************************************************************************/
 
 static struct nouveau_oclass
-nve0_copy_sclass[] = {
+nve0_ce_sclass[] = {
        { 0xa0b5, &nouveau_object_ofuncs },
        {},
 };
 
 /*******************************************************************************
- * PCOPY context
+ * PCE context
  ******************************************************************************/
 
 static struct nouveau_ofuncs
-nve0_copy_context_ofuncs = {
+nve0_ce_context_ofuncs = {
        .ctor = _nouveau_engctx_ctor,
        .dtor = _nouveau_engctx_dtor,
        .init = _nouveau_engctx_init,
@@ -57,20 +57,20 @@ nve0_copy_context_ofuncs = {
 };
 
 static struct nouveau_oclass
-nve0_copy_cclass = {
-       .handle = NV_ENGCTX(COPY0, 0xc0),
-       .ofuncs = &nve0_copy_context_ofuncs,
+nve0_ce_cclass = {
+       .handle = NV_ENGCTX(CE0, 0xc0),
+       .ofuncs = &nve0_ce_context_ofuncs,
 };
 
 /*******************************************************************************
- * PCOPY engine/subdev functions
+ * PCE engine/subdev functions
  ******************************************************************************/
 
 static void
-nve0_copy_intr(struct nouveau_subdev *subdev)
+nve0_ce_intr(struct nouveau_subdev *subdev)
 {
-       const int ce = nv_subidx(subdev) - NVDEV_ENGINE_COPY0;
-       struct nve0_copy_priv *priv = (void *)subdev;
+       const int ce = nv_subidx(subdev) - NVDEV_ENGINE_CE0;
+       struct nve0_ce_priv *priv = (void *)subdev;
        u32 stat = nv_rd32(priv, 0x104908 + (ce * 0x1000));
 
        if (stat) {
@@ -80,73 +80,73 @@ nve0_copy_intr(struct nouveau_subdev *subdev)
 }
 
 static int
-nve0_copy0_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+nve0_ce0_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
                struct nouveau_oclass *oclass, void *data, u32 size,
                struct nouveau_object **pobject)
 {
-       struct nve0_copy_priv *priv;
+       struct nve0_ce_priv *priv;
        int ret;
 
        ret = nouveau_engine_create(parent, engine, oclass, true,
-                                   "PCE0", "copy0", &priv);
+                                   "PCE0", "ce0", &priv);
        *pobject = nv_object(priv);
        if (ret)
                return ret;
 
        nv_subdev(priv)->unit = 0x00000040;
-       nv_subdev(priv)->intr = nve0_copy_intr;
-       nv_engine(priv)->cclass = &nve0_copy_cclass;
-       nv_engine(priv)->sclass = nve0_copy_sclass;
+       nv_subdev(priv)->intr = nve0_ce_intr;
+       nv_engine(priv)->cclass = &nve0_ce_cclass;
+       nv_engine(priv)->sclass = nve0_ce_sclass;
        return 0;
 }
 
 static int
-nve0_copy1_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+nve0_ce1_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
                struct nouveau_oclass *oclass, void *data, u32 size,
                struct nouveau_object **pobject)
 {
-       struct nve0_copy_priv *priv;
+       struct nve0_ce_priv *priv;
        int ret;
 
        ret = nouveau_engine_create(parent, engine, oclass, true,
-                                   "PCE1", "copy1", &priv);
+                                   "PCE1", "ce1", &priv);
        *pobject = nv_object(priv);
        if (ret)
                return ret;
 
        nv_subdev(priv)->unit = 0x00000080;
-       nv_subdev(priv)->intr = nve0_copy_intr;
-       nv_engine(priv)->cclass = &nve0_copy_cclass;
-       nv_engine(priv)->sclass = nve0_copy_sclass;
+       nv_subdev(priv)->intr = nve0_ce_intr;
+       nv_engine(priv)->cclass = &nve0_ce_cclass;
+       nv_engine(priv)->sclass = nve0_ce_sclass;
        return 0;
 }
 
 static int
-nve0_copy2_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+nve0_ce2_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
                struct nouveau_oclass *oclass, void *data, u32 size,
                struct nouveau_object **pobject)
 {
-       struct nve0_copy_priv *priv;
+       struct nve0_ce_priv *priv;
        int ret;
 
        ret = nouveau_engine_create(parent, engine, oclass, true,
-                                   "PCE2", "copy2", &priv);
+                                   "PCE2", "ce2", &priv);
        *pobject = nv_object(priv);
        if (ret)
                return ret;
 
        nv_subdev(priv)->unit = 0x00200000;
-       nv_subdev(priv)->intr = nve0_copy_intr;
-       nv_engine(priv)->cclass = &nve0_copy_cclass;
-       nv_engine(priv)->sclass = nve0_copy_sclass;
+       nv_subdev(priv)->intr = nve0_ce_intr;
+       nv_engine(priv)->cclass = &nve0_ce_cclass;
+       nv_engine(priv)->sclass = nve0_ce_sclass;
        return 0;
 }
 
 struct nouveau_oclass
-nve0_copy0_oclass = {
-       .handle = NV_ENGINE(COPY0, 0xe0),
+nve0_ce0_oclass = {
+       .handle = NV_ENGINE(CE0, 0xe0),
        .ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = nve0_copy0_ctor,
+               .ctor = nve0_ce0_ctor,
                .dtor = _nouveau_engine_dtor,
                .init = _nouveau_engine_init,
                .fini = _nouveau_engine_fini,
@@ -154,10 +154,10 @@ nve0_copy0_oclass = {
 };
 
 struct nouveau_oclass
-nve0_copy1_oclass = {
-       .handle = NV_ENGINE(COPY1, 0xe0),
+nve0_ce1_oclass = {
+       .handle = NV_ENGINE(CE1, 0xe0),
        .ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = nve0_copy1_ctor,
+               .ctor = nve0_ce1_ctor,
                .dtor = _nouveau_engine_dtor,
                .init = _nouveau_engine_init,
                .fini = _nouveau_engine_fini,
@@ -165,10 +165,10 @@ nve0_copy1_oclass = {
 };
 
 struct nouveau_oclass
-nve0_copy2_oclass = {
-       .handle = NV_ENGINE(COPY2, 0xe0),
+nve0_ce2_oclass = {
+       .handle = NV_ENGINE(CE2, 0xe0),
        .ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = nve0_copy2_ctor,
+               .ctor = nve0_ce2_ctor,
                .dtor = _nouveau_engine_dtor,
                .init = _nouveau_engine_init,
                .fini = _nouveau_engine_fini,

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/copy/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/copy/Kbuild
deleted file mode 100644 (file)
index d8aa5ed..0000000
--- a/drivers/gpu/drm/nouveau/nvkm/engine/copy/Kbuild
+++ /dev/null
@@ -1,3 +0,0 @@
-nvkm-y += nvkm/engine/copy/nva3.o
-nvkm-y += nvkm/engine/copy/nvc0.o
-nvkm-y += nvkm/engine/copy/nve0.o

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
index fe269ef0035583f6b2130eda55b25f4b198827db..96050a487226cd75972d8755014f28a2c6018408 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
@@ -235,9 +235,9 @@ static const u64 disable_map[] = {
        [NVDEV_ENGINE_CIPHER]   = NV_DEVICE_V0_DISABLE_CIPHER,
        [NVDEV_ENGINE_BSP]      = NV_DEVICE_V0_DISABLE_BSP,
        [NVDEV_ENGINE_PPP]      = NV_DEVICE_V0_DISABLE_PPP,
-       [NVDEV_ENGINE_COPY0]    = NV_DEVICE_V0_DISABLE_COPY0,
-       [NVDEV_ENGINE_COPY1]    = NV_DEVICE_V0_DISABLE_COPY1,
-       [NVDEV_ENGINE_COPY2]    = NV_DEVICE_V0_DISABLE_COPY1,
+       [NVDEV_ENGINE_CE0]      = NV_DEVICE_V0_DISABLE_CE0,
+       [NVDEV_ENGINE_CE1]      = NV_DEVICE_V0_DISABLE_CE1,
+       [NVDEV_ENGINE_CE2]      = NV_DEVICE_V0_DISABLE_CE2,
        [NVDEV_ENGINE_VIC]      = NV_DEVICE_V0_DISABLE_VIC,
        [NVDEV_ENGINE_VENC]     = NV_DEVICE_V0_DISABLE_VENC,
        [NVDEV_ENGINE_DISP]     = NV_DEVICE_V0_DISABLE_DISP,

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
index 391369a1c034353e52416ace921c7c877479abbe..c9c18dc6f21674d18428adeaf1675170af2f4b27 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
@@ -48,7 +48,7 @@
 #include <engine/software.h>
 #include <engine/graph.h>
 #include <engine/disp.h>
-#include <engine/copy.h>
+#include <engine/ce.h>
 #include <engine/bsp.h>
 #include <engine/msvld.h>
 #include <engine/vp.h>
@@ -88,11 +88,11 @@ gm100_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  gm107_graph_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  gm107_disp_oclass;
-               device->oclass[NVDEV_ENGINE_COPY0  ] = &nve0_copy0_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &nve0_ce0_oclass;
 #if 0
-               device->oclass[NVDEV_ENGINE_COPY1  ] = &nve0_copy1_oclass;
+               device->oclass[NVDEV_ENGINE_CE1    ] = &nve0_ce1_oclass;
 #endif
-               device->oclass[NVDEV_ENGINE_COPY2  ] = &nve0_copy2_oclass;
+               device->oclass[NVDEV_ENGINE_CE2    ] = &nve0_ce2_oclass;
 #if 0
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nve0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nve0_vp_oclass;
@@ -134,9 +134,9 @@ gm100_identify(struct nouveau_device *device)
 #endif
                device->oclass[NVDEV_ENGINE_DISP   ] =  gm204_disp_oclass;
 #if 0
-               device->oclass[NVDEV_ENGINE_COPY0  ] = &gm204_copy0_oclass;
-               device->oclass[NVDEV_ENGINE_COPY1  ] = &gm204_copy1_oclass;
-               device->oclass[NVDEV_ENGINE_COPY2  ] = &gm204_copy2_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &gm204_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE1    ] = &gm204_ce1_oclass;
+               device->oclass[NVDEV_ENGINE_CE2    ] = &gm204_ce2_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nve0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nve0_vp_oclass;
                device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c
index 2fb06eb451f36f416392ee0a18138488f3826ba8..cb978023d4722f7923e6902821403b41060c1300 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c
@@ -52,7 +52,7 @@
 #include <engine/bsp.h>
 #include <engine/msvld.h>
 #include <engine/ppp.h>
-#include <engine/copy.h>
+#include <engine/ce.h>
 #include <engine/disp.h>
 #include <engine/perfmon.h>
 
@@ -374,7 +374,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_VP     ] = &nv98_vp_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nv98_msvld_oclass;
                device->oclass[NVDEV_ENGINE_PPP    ] = &nv98_ppp_oclass;
-               device->oclass[NVDEV_ENGINE_COPY0  ] = &nva3_copy_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &nva3_ce_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;
                device->oclass[NVDEV_ENGINE_PERFMON] =  nva3_perfmon_oclass;
                break;
@@ -404,7 +404,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_VP     ] = &nv98_vp_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nv98_msvld_oclass;
                device->oclass[NVDEV_ENGINE_PPP    ] = &nv98_ppp_oclass;
-               device->oclass[NVDEV_ENGINE_COPY0  ] = &nva3_copy_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &nva3_ce_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;
                device->oclass[NVDEV_ENGINE_PERFMON] =  nva3_perfmon_oclass;
                break;
@@ -434,7 +434,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_VP     ] = &nv98_vp_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nv98_msvld_oclass;
                device->oclass[NVDEV_ENGINE_PPP    ] = &nv98_ppp_oclass;
-               device->oclass[NVDEV_ENGINE_COPY0  ] = &nva3_copy_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &nva3_ce_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;
                device->oclass[NVDEV_ENGINE_PERFMON] =  nva3_perfmon_oclass;
                break;
@@ -464,7 +464,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_VP     ] = &nv98_vp_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nv98_msvld_oclass;
                device->oclass[NVDEV_ENGINE_PPP    ] = &nv98_ppp_oclass;
-               device->oclass[NVDEV_ENGINE_COPY0  ] = &nva3_copy_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &nva3_ce_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;
                device->oclass[NVDEV_ENGINE_PERFMON] =  nva3_perfmon_oclass;
                break;

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c
index 0e1be5e2472e600a3930d7316a785a141c6e5906..39bf7d115bc61de6a887d23168a1eb6af778052f 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c
@@ -51,7 +51,7 @@
 #include <engine/bsp.h>
 #include <engine/msvld.h>
 #include <engine/ppp.h>
-#include <engine/copy.h>
+#include <engine/ce.h>
 #include <engine/disp.h>
 #include <engine/perfmon.h>
 
@@ -87,8 +87,8 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;
-               device->oclass[NVDEV_ENGINE_COPY0  ] = &nvc0_copy0_oclass;
-               device->oclass[NVDEV_ENGINE_COPY1  ] = &nvc0_copy1_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &nvc0_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE1    ] = &nvc0_ce1_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;
                device->oclass[NVDEV_ENGINE_PERFMON] = &nvc0_perfmon_oclass;
                break;
@@ -120,8 +120,8 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;
-               device->oclass[NVDEV_ENGINE_COPY0  ] = &nvc0_copy0_oclass;
-               device->oclass[NVDEV_ENGINE_COPY1  ] = &nvc0_copy1_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &nvc0_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE1    ] = &nvc0_ce1_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;
                device->oclass[NVDEV_ENGINE_PERFMON] = &nvc0_perfmon_oclass;
                break;
@@ -153,7 +153,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;
-               device->oclass[NVDEV_ENGINE_COPY0  ] = &nvc0_copy0_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &nvc0_ce0_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;
                device->oclass[NVDEV_ENGINE_PERFMON] = &nvc0_perfmon_oclass;
                break;
@@ -185,8 +185,8 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;
-               device->oclass[NVDEV_ENGINE_COPY0  ] = &nvc0_copy0_oclass;
-               device->oclass[NVDEV_ENGINE_COPY1  ] = &nvc0_copy1_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &nvc0_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE1    ] = &nvc0_ce1_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;
                device->oclass[NVDEV_ENGINE_PERFMON] = &nvc0_perfmon_oclass;
                break;
@@ -218,7 +218,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;
-               device->oclass[NVDEV_ENGINE_COPY0  ] = &nvc0_copy0_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &nvc0_ce0_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;
                device->oclass[NVDEV_ENGINE_PERFMON] = &nvc0_perfmon_oclass;
                break;
@@ -250,7 +250,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;
-               device->oclass[NVDEV_ENGINE_COPY0  ] = &nvc0_copy0_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &nvc0_ce0_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;
                device->oclass[NVDEV_ENGINE_PERFMON] = &nvc0_perfmon_oclass;
                break;
@@ -282,8 +282,8 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;
-               device->oclass[NVDEV_ENGINE_COPY0  ] = &nvc0_copy0_oclass;
-               device->oclass[NVDEV_ENGINE_COPY1  ] = &nvc0_copy1_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &nvc0_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE1    ] = &nvc0_ce1_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;
                device->oclass[NVDEV_ENGINE_PERFMON] = &nvc0_perfmon_oclass;
                break;
@@ -315,7 +315,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;
-               device->oclass[NVDEV_ENGINE_COPY0  ] = &nvc0_copy0_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &nvc0_ce0_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nvd0_disp_oclass;
                device->oclass[NVDEV_ENGINE_PERFMON] = &nvc0_perfmon_oclass;
                break;
@@ -345,7 +345,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;
-               device->oclass[NVDEV_ENGINE_COPY0  ] = &nvc0_copy0_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &nvc0_ce0_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nvd0_disp_oclass;
                device->oclass[NVDEV_ENGINE_PERFMON] = &nvc0_perfmon_oclass;
                break;

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c
index 1460a1650d0e05060cd656450ec0ce54e1d489db..1f6d515fb641e8952a8cc57afcb5a9bed1529648 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c
@@ -48,7 +48,7 @@
 #include <engine/software.h>
 #include <engine/graph.h>
 #include <engine/disp.h>
-#include <engine/copy.h>
+#include <engine/ce.h>
 #include <engine/bsp.h>
 #include <engine/msvld.h>
 #include <engine/vp.h>
@@ -85,9 +85,9 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nve4_graph_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nve0_disp_oclass;
-               device->oclass[NVDEV_ENGINE_COPY0  ] = &nve0_copy0_oclass;
-               device->oclass[NVDEV_ENGINE_COPY1  ] = &nve0_copy1_oclass;
-               device->oclass[NVDEV_ENGINE_COPY2  ] = &nve0_copy2_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &nve0_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE1    ] = &nve0_ce1_oclass;
+               device->oclass[NVDEV_ENGINE_CE2    ] = &nve0_ce2_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nve0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nve0_vp_oclass;
                device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;
@@ -119,9 +119,9 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nve4_graph_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nve0_disp_oclass;
-               device->oclass[NVDEV_ENGINE_COPY0  ] = &nve0_copy0_oclass;
-               device->oclass[NVDEV_ENGINE_COPY1  ] = &nve0_copy1_oclass;
-               device->oclass[NVDEV_ENGINE_COPY2  ] = &nve0_copy2_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &nve0_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE1    ] = &nve0_ce1_oclass;
+               device->oclass[NVDEV_ENGINE_CE2    ] = &nve0_ce2_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nve0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nve0_vp_oclass;
                device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;
@@ -153,9 +153,9 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nve4_graph_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nve0_disp_oclass;
-               device->oclass[NVDEV_ENGINE_COPY0  ] = &nve0_copy0_oclass;
-               device->oclass[NVDEV_ENGINE_COPY1  ] = &nve0_copy1_oclass;
-               device->oclass[NVDEV_ENGINE_COPY2  ] = &nve0_copy2_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &nve0_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE1    ] = &nve0_ce1_oclass;
+               device->oclass[NVDEV_ENGINE_CE2    ] = &nve0_ce2_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nve0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nve0_vp_oclass;
                device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;
@@ -178,7 +178,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_FIFO   ] =  gk20a_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  gk20a_graph_oclass;
-               device->oclass[NVDEV_ENGINE_COPY2  ] = &nve0_copy2_oclass;
+               device->oclass[NVDEV_ENGINE_CE2    ] = &nve0_ce2_oclass;
                device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &gk20a_volt_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gk20a_pmu_oclass;
@@ -209,9 +209,9 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nvf0_graph_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nvf0_disp_oclass;
-               device->oclass[NVDEV_ENGINE_COPY0  ] = &nve0_copy0_oclass;
-               device->oclass[NVDEV_ENGINE_COPY1  ] = &nve0_copy1_oclass;
-               device->oclass[NVDEV_ENGINE_COPY2  ] = &nve0_copy2_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &nve0_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE1    ] = &nve0_ce1_oclass;
+               device->oclass[NVDEV_ENGINE_CE2    ] = &nve0_ce2_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nve0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nve0_vp_oclass;
                device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;
@@ -243,9 +243,9 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  gk110b_graph_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nvf0_disp_oclass;
-               device->oclass[NVDEV_ENGINE_COPY0  ] = &nve0_copy0_oclass;
-               device->oclass[NVDEV_ENGINE_COPY1  ] = &nve0_copy1_oclass;
-               device->oclass[NVDEV_ENGINE_COPY2  ] = &nve0_copy2_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &nve0_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE1    ] = &nve0_ce1_oclass;
+               device->oclass[NVDEV_ENGINE_CE2    ] = &nve0_ce2_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nve0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nve0_vp_oclass;
                device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;
@@ -277,9 +277,9 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nv108_graph_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nvf0_disp_oclass;
-               device->oclass[NVDEV_ENGINE_COPY0  ] = &nve0_copy0_oclass;
-               device->oclass[NVDEV_ENGINE_COPY1  ] = &nve0_copy1_oclass;
-               device->oclass[NVDEV_ENGINE_COPY2  ] = &nve0_copy2_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &nve0_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE1    ] = &nve0_ce1_oclass;
+               device->oclass[NVDEV_ENGINE_CE2    ] = &nve0_ce2_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nve0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nve0_vp_oclass;
                device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;
@@ -310,9 +310,9 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nv108_graph_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nvf0_disp_oclass;
-               device->oclass[NVDEV_ENGINE_COPY0  ] = &nve0_copy0_oclass;
-               device->oclass[NVDEV_ENGINE_COPY1  ] = &nve0_copy1_oclass;
-               device->oclass[NVDEV_ENGINE_COPY2  ] = &nve0_copy2_oclass;
+               device->oclass[NVDEV_ENGINE_CE0    ] = &nve0_ce0_oclass;
+               device->oclass[NVDEV_ENGINE_CE1    ] = &nve0_ce1_oclass;
+               device->oclass[NVDEV_ENGINE_CE2    ] = &nve0_ce2_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nve0_msvld_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nve0_vp_oclass;
                device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv84.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv84.c
index 3928439916635e7774d38a9b1b7ed310109b12f7..4a3638e1944e3bb1d744fb1f3bf92fa4bbda9116 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv84.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv84.c
@@ -64,7 +64,7 @@ nv84_fifo_context_attach(struct nouveau_object *parent,
        case NVDEV_ENGINE_MSVLD : addr = 0x0080; break;
        case NVDEV_ENGINE_CIPHER:
        case NVDEV_ENGINE_SEC   : addr = 0x00a0; break;
-       case NVDEV_ENGINE_COPY0 : addr = 0x00c0; break;
+       case NVDEV_ENGINE_CE0   : addr = 0x00c0; break;
        default:
                return -EINVAL;
        }
@@ -102,7 +102,7 @@ nv84_fifo_context_detach(struct nouveau_object *parent, bool suspend,
        case NVDEV_ENGINE_MSVLD : engn = 5; addr = 0x0080; break;
        case NVDEV_ENGINE_CIPHER:
        case NVDEV_ENGINE_SEC   : engn = 4; addr = 0x00a0; break;
-       case NVDEV_ENGINE_COPY0 : engn = 2; addr = 0x00c0; break;
+       case NVDEV_ENGINE_CE0   : engn = 2; addr = 0x00c0; break;
        default:
                return -EINVAL;
        }
@@ -147,7 +147,7 @@ nv84_fifo_object_attach(struct nouveau_object *parent,
        case NVDEV_ENGINE_MPEG  :
        case NVDEV_ENGINE_PPP   : context |= 0x00200000; break;
        case NVDEV_ENGINE_ME    :
-       case NVDEV_ENGINE_COPY0 : context |= 0x00300000; break;
+       case NVDEV_ENGINE_CE0   : context |= 0x00300000; break;
        case NVDEV_ENGINE_VP    : context |= 0x00400000; break;
        case NVDEV_ENGINE_CIPHER:
        case NVDEV_ENGINE_SEC   :
@@ -196,7 +196,7 @@ nv84_fifo_chan_ctor_dma(struct nouveau_object *parent,
                                          (1ULL << NVDEV_ENGINE_BSP) |
                                          (1ULL << NVDEV_ENGINE_MSVLD) |
                                          (1ULL << NVDEV_ENGINE_PPP) |
-                                         (1ULL << NVDEV_ENGINE_COPY0) |
+                                         (1ULL << NVDEV_ENGINE_CE0) |
                                          (1ULL << NVDEV_ENGINE_VIC), &chan);
        *pobject = nv_object(chan);
        if (ret)
@@ -271,7 +271,7 @@ nv84_fifo_chan_ctor_ind(struct nouveau_object *parent,
                                          (1ULL << NVDEV_ENGINE_BSP) |
                                          (1ULL << NVDEV_ENGINE_MSVLD) |
                                          (1ULL << NVDEV_ENGINE_PPP) |
-                                         (1ULL << NVDEV_ENGINE_COPY0) |
+                                         (1ULL << NVDEV_ENGINE_CE0) |
                                          (1ULL << NVDEV_ENGINE_VIC), &chan);
        *pobject = nv_object(chan);
        if (ret)

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nvc0.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nvc0.c
index 2af40b208860d9c975ee2b07fe92ad688af4fdaa..1511e387fd5d0623f4c584edf0fcfd5719bfa7cb 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nvc0.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nvc0.c
@@ -122,8 +122,8 @@ nvc0_fifo_context_attach(struct nouveau_object *parent,
        switch (nv_engidx(object->engine)) {
        case NVDEV_ENGINE_SW   : return 0;
        case NVDEV_ENGINE_GR   : addr = 0x0210; break;
-       case NVDEV_ENGINE_COPY0: addr = 0x0230; break;
-       case NVDEV_ENGINE_COPY1: addr = 0x0240; break;
+       case NVDEV_ENGINE_CE0  : addr = 0x0230; break;
+       case NVDEV_ENGINE_CE1  : addr = 0x0240; break;
        case NVDEV_ENGINE_MSVLD: addr = 0x0270; break;
        case NVDEV_ENGINE_VP   : addr = 0x0250; break;
        case NVDEV_ENGINE_PPP  : addr = 0x0260; break;
@@ -159,8 +159,8 @@ nvc0_fifo_context_detach(struct nouveau_object *parent, bool suspend,
        switch (nv_engidx(object->engine)) {
        case NVDEV_ENGINE_SW   : return 0;
        case NVDEV_ENGINE_GR   : addr = 0x0210; break;
-       case NVDEV_ENGINE_COPY0: addr = 0x0230; break;
-       case NVDEV_ENGINE_COPY1: addr = 0x0240; break;
+       case NVDEV_ENGINE_CE0  : addr = 0x0230; break;
+       case NVDEV_ENGINE_CE1  : addr = 0x0240; break;
        case NVDEV_ENGINE_MSVLD: addr = 0x0270; break;
        case NVDEV_ENGINE_VP   : addr = 0x0250; break;
        case NVDEV_ENGINE_PPP  : addr = 0x0260; break;
@@ -212,8 +212,8 @@ nvc0_fifo_chan_ctor(struct nouveau_object *parent,
                                          args->v0.pushbuf,
                                          (1ULL << NVDEV_ENGINE_SW) |
                                          (1ULL << NVDEV_ENGINE_GR) |
-                                         (1ULL << NVDEV_ENGINE_COPY0) |
-                                         (1ULL << NVDEV_ENGINE_COPY1) |
+                                         (1ULL << NVDEV_ENGINE_CE0) |
+                                         (1ULL << NVDEV_ENGINE_CE1) |
                                          (1ULL << NVDEV_ENGINE_MSVLD) |
                                          (1ULL << NVDEV_ENGINE_VP) |
                                          (1ULL << NVDEV_ENGINE_PPP), &chan);
@@ -385,8 +385,8 @@ nvc0_fifo_engidx(struct nvc0_fifo_priv *priv, u32 engn)
        case NVDEV_ENGINE_MSVLD: engn = 1; break;
        case NVDEV_ENGINE_PPP  : engn = 2; break;
        case NVDEV_ENGINE_VP   : engn = 3; break;
-       case NVDEV_ENGINE_COPY0: engn = 4; break;
-       case NVDEV_ENGINE_COPY1: engn = 5; break;
+       case NVDEV_ENGINE_CE0  : engn = 4; break;
+       case NVDEV_ENGINE_CE1  : engn = 5; break;
        default:
                return -1;
        }
@@ -402,8 +402,8 @@ nvc0_fifo_engine(struct nvc0_fifo_priv *priv, u32 engn)
        case 1: engn = NVDEV_ENGINE_MSVLD; break;
        case 2: engn = NVDEV_ENGINE_PPP; break;
        case 3: engn = NVDEV_ENGINE_VP; break;
-       case 4: engn = NVDEV_ENGINE_COPY0; break;
-       case 5: engn = NVDEV_ENGINE_COPY1; break;
+       case 4: engn = NVDEV_ENGINE_CE0; break;
+       case 5: engn = NVDEV_ENGINE_CE1; break;
        default:
                return NULL;
        }
@@ -552,8 +552,8 @@ nvc0_fifo_fault_engine[] = {
        { 0x11, "PPPP", NULL, NVDEV_ENGINE_PPP },
        { 0x13, "PCOUNTER" },
        { 0x14, "PVP", NULL, NVDEV_ENGINE_VP },
-       { 0x15, "PCOPY0", NULL, NVDEV_ENGINE_COPY0 },
-       { 0x16, "PCOPY1", NULL, NVDEV_ENGINE_COPY1 },
+       { 0x15, "PCE0", NULL, NVDEV_ENGINE_CE0 },
+       { 0x16, "PCE1", NULL, NVDEV_ENGINE_CE1 },
        { 0x17, "PDAEMON" },
        {}
 };

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nve0.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nve0.c
index b415b309f4b875822cfa0c4701910bc646128bce..324008e8fa9b8a3ed13d7d3abb9130c56154bcdd 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nve0.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nve0.c
@@ -47,12 +47,12 @@ static const struct {
        u64 mask;
 } fifo_engine[] = {
        _(NVDEV_ENGINE_GR      , (1ULL << NVDEV_ENGINE_SW) |
-                                (1ULL << NVDEV_ENGINE_COPY2)),
+                                (1ULL << NVDEV_ENGINE_CE2)),
        _(NVDEV_ENGINE_VP      , 0),
        _(NVDEV_ENGINE_PPP     , 0),
        _(NVDEV_ENGINE_MSVLD   , 0),
-       _(NVDEV_ENGINE_COPY0   , 0),
-       _(NVDEV_ENGINE_COPY1   , 0),
+       _(NVDEV_ENGINE_CE0     , 0),
+       _(NVDEV_ENGINE_CE1     , 0),
        _(NVDEV_ENGINE_VENC    , 0),
 };
 #undef _
@@ -143,9 +143,9 @@ nve0_fifo_context_attach(struct nouveau_object *parent,
        switch (nv_engidx(object->engine)) {
        case NVDEV_ENGINE_SW   :
                return 0;
-       case NVDEV_ENGINE_COPY0:
-       case NVDEV_ENGINE_COPY1:
-       case NVDEV_ENGINE_COPY2:
+       case NVDEV_ENGINE_CE0:
+       case NVDEV_ENGINE_CE1:
+       case NVDEV_ENGINE_CE2:
                nv_engctx(ectx)->addr = nv_gpuobj(base)->addr >> 12;
                return 0;
        case NVDEV_ENGINE_GR   : addr = 0x0210; break;
@@ -183,9 +183,9 @@ nve0_fifo_context_detach(struct nouveau_object *parent, bool suspend,
 
        switch (nv_engidx(object->engine)) {
        case NVDEV_ENGINE_SW   : return 0;
-       case NVDEV_ENGINE_COPY0:
-       case NVDEV_ENGINE_COPY1:
-       case NVDEV_ENGINE_COPY2: addr = 0x0000; break;
+       case NVDEV_ENGINE_CE0  :
+       case NVDEV_ENGINE_CE1  :
+       case NVDEV_ENGINE_CE2  : addr = 0x0000; break;
        case NVDEV_ENGINE_GR   : addr = 0x0210; break;
        case NVDEV_ENGINE_MSVLD: addr = 0x0270; break;
        case NVDEV_ENGINE_VP   : addr = 0x0250; break;
@@ -415,12 +415,12 @@ nve0_fifo_engidx(struct nve0_fifo_priv *priv, u32 engn)
 {
        switch (engn) {
        case NVDEV_ENGINE_GR   :
-       case NVDEV_ENGINE_COPY2: engn = 0; break;
+       case NVDEV_ENGINE_CE2  : engn = 0; break;
        case NVDEV_ENGINE_MSVLD: engn = 1; break;
        case NVDEV_ENGINE_PPP  : engn = 2; break;
        case NVDEV_ENGINE_VP   : engn = 3; break;
-       case NVDEV_ENGINE_COPY0: engn = 4; break;
-       case NVDEV_ENGINE_COPY1: engn = 5; break;
+       case NVDEV_ENGINE_CE0  : engn = 4; break;
+       case NVDEV_ENGINE_CE1  : engn = 5; break;
        case NVDEV_ENGINE_VENC : engn = 6; break;
        default:
                return -1;
@@ -623,11 +623,11 @@ nve0_fifo_fault_engine[] = {
        { 0x11, "MSPPP", NULL, NVDEV_ENGINE_PPP },
        { 0x13, "PERF" },
        { 0x14, "MSPDEC", NULL, NVDEV_ENGINE_VP },
-       { 0x15, "CE0", NULL, NVDEV_ENGINE_COPY0 },
-       { 0x16, "CE1", NULL, NVDEV_ENGINE_COPY1 },
+       { 0x15, "CE0", NULL, NVDEV_ENGINE_CE0 },
+       { 0x16, "CE1", NULL, NVDEV_ENGINE_CE1 },
        { 0x17, "PMU" },
        { 0x19, "MSENC", NULL, NVDEV_ENGINE_VENC },
-       { 0x1b, "CE2", NULL, NVDEV_ENGINE_COPY2 },
+       { 0x1b, "CE2", NULL, NVDEV_ENGINE_CE2 },
        {}
 };
 
@@ -678,7 +678,7 @@ nve0_fifo_fault_hubclient[] = {
        { 0x15, "SCC_NB" },
        { 0x16, "SEC" },
        { 0x17, "SSYNC" },
-       { 0x18, "GR_COPY" },
+       { 0x18, "GR_CE" },
        { 0x19, "CE2" },
        { 0x1a, "XV" },
        { 0x1b, "MMU_NB" },

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.c b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.c
index 4ba43d6a1ec8189dae09b6aa6455a5fb6e580229..04c04efcc8c4fddea7033c29859f135d87a85220 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.c
@@ -33,9 +33,9 @@ gm107_devinit_disable(struct nouveau_devinit *devinit)
        u64 disable = 0ULL;
 
        if (r021c00 & 0x00000001)
-               disable |= (1ULL << NVDEV_ENGINE_COPY0);
+               disable |= (1ULL << NVDEV_ENGINE_CE0);
        if (r021c00 & 0x00000004)
-               disable |= (1ULL << NVDEV_ENGINE_COPY2);
+               disable |= (1ULL << NVDEV_ENGINE_CE2);
        if (r021c04 & 0x00000001)
                disable |= (1ULL << NVDEV_ENGINE_DISP);
 

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nva3.c b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nva3.c
index f662a261cc655264fabfb13d73f3328770449030..b116f8040bbc727961ba3cf2d782f4a298649e4c 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nva3.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nva3.c
@@ -76,7 +76,7 @@ nva3_devinit_disable(struct nouveau_devinit *devinit)
        if (!(r00154c & 0x00000020))
                disable |= (1ULL << NVDEV_ENGINE_MSVLD);
        if (!(r00154c & 0x00000200))
-               disable |= (1ULL << NVDEV_ENGINE_COPY0);
+               disable |= (1ULL << NVDEV_ENGINE_CE0);
 
        return disable;
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nvaf.c b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nvaf.c
index 6f8ef894e4efa8c9c8ed5d52b76f9c8fefbe3827..140c300c70389ac5fcf722d9a8e22eb55cbe43b2 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nvaf.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nvaf.c
@@ -44,7 +44,7 @@ nvaf_devinit_disable(struct nouveau_devinit *devinit)
        if (!(r00154c & 0x00000040))
                disable |= (1ULL << NVDEV_ENGINE_VIC);
        if (!(r00154c & 0x00000200))
-               disable |= (1ULL << NVDEV_ENGINE_COPY0);
+               disable |= (1ULL << NVDEV_ENGINE_CE0);
 
        return disable;
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nvc0.c b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nvc0.c
index ac699a366f608ac2a8eca35e5f6624948ceecc23..c7b2311f497eee64ac1ba46da6b6a084253c2b36 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nvc0.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nvc0.c
@@ -79,9 +79,9 @@ nvc0_devinit_disable(struct nouveau_devinit *devinit)
        if (r022500 & 0x00000008)
                disable |= (1ULL << NVDEV_ENGINE_VENC);
        if (r022500 & 0x00000100)
-               disable |= (1ULL << NVDEV_ENGINE_COPY0);
+               disable |= (1ULL << NVDEV_ENGINE_CE0);
        if (r022500 & 0x00000200)
-               disable |= (1ULL << NVDEV_ENGINE_COPY1);
+               disable |= (1ULL << NVDEV_ENGINE_CE1);
 
        return disable;
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.c
index 31c90dbea579880d0419ae0f292312b206234ed4..be129c3297a3c661b8bddeb32a328eefb57f68df 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.c
@@ -127,7 +127,7 @@ static const struct nouveau_enum vm_engine[] = {
        { 0x0000000a, "PCRYPT", NULL, NVDEV_ENGINE_CIPHER },
        { 0x0000000b, "PCOUNTER", NULL },
        { 0x0000000c, "SEMAPHORE_BG", NULL },
-       { 0x0000000d, "PCOPY", NULL, NVDEV_ENGINE_COPY0 },
+       { 0x0000000d, "PCE0", NULL, NVDEV_ENGINE_CE0 },
        { 0x0000000e, "PDAEMON", NULL },
        {}
 };

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv98.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv98.c
index 17ea7e74ed2867eff0c9449cdeee1eac03c94c14..60b250f34cd2869c219c107148bad6cdbf3c8b81 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv98.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv98.c
@@ -38,7 +38,7 @@ nv98_mc_intr[] = {
        { 0x00100000, NVDEV_SUBDEV_TIMER },
        { 0x00200000, NVDEV_SUBDEV_GPIO },      /* PMGR->GPIO */
        { 0x00200000, NVDEV_SUBDEV_I2C },       /* PMGR->I2C/AUX */
-       { 0x00400000, NVDEV_ENGINE_COPY0 },     /* NVA3-     */
+       { 0x00400000, NVDEV_ENGINE_CE0 },       /* NVA3-     */
        { 0x10000000, NVDEV_SUBDEV_BUS },
        { 0x80000000, NVDEV_ENGINE_SW },
        { 0x0042d101, NVDEV_SUBDEV_FB },

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nvc0.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nvc0.c
index 1e352152cadd006431448c3acbf705067ea58027..5217a5a404479cbe8f405716fd9d8692f049a64a 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nvc0.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nvc0.c
@@ -28,9 +28,9 @@ const struct nouveau_mc_intr
 nvc0_mc_intr[] = {
        { 0x04000000, NVDEV_ENGINE_DISP },  /* DISP first, so pageflip timestamps work. */
        { 0x00000001, NVDEV_ENGINE_PPP },
-       { 0x00000020, NVDEV_ENGINE_COPY0 },
-       { 0x00000040, NVDEV_ENGINE_COPY1 },
-       { 0x00000080, NVDEV_ENGINE_COPY2 },
+       { 0x00000020, NVDEV_ENGINE_CE0 },
+       { 0x00000040, NVDEV_ENGINE_CE1 },
+       { 0x00000080, NVDEV_ENGINE_CE2 },
        { 0x00000100, NVDEV_ENGINE_FIFO },
        { 0x00001000, NVDEV_ENGINE_GR },
        { 0x00002000, NVDEV_SUBDEV_FB },

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv50.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv50.c
index 9a8cbfb0718e4a44fb7fdbf390bed36355a78cde..701b9c4ec869bb91895af57ce558db386ab7ce9f 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv50.c
@@ -180,7 +180,7 @@ nv50_vm_flush(struct nouveau_vm *vm)
                case NVDEV_ENGINE_MSVLD : vme = 0x09; break;
                case NVDEV_ENGINE_CIPHER:
                case NVDEV_ENGINE_SEC   : vme = 0x0a; break;
-               case NVDEV_ENGINE_COPY0 : vme = 0x0d; break;
+               case NVDEV_ENGINE_CE0   : vme = 0x0d; break;
                default:
                        continue;
                }