MPC8313ERDB_66 \
MPC8323ERDB \
MPC832XEMDS \
+ MPC832XEMDS_ATM \
MPC8349EMDS \
MPC8349ITX \
MPC8349ITXGP \
MPC8360EMDS \
+ MPC8360EMDS_ATM \
sbc8349 \
TQM834x \
"
MPC832XEMDS_config \
MPC832XEMDS_HOST_33_config \
MPC832XEMDS_HOST_66_config \
-MPC832XEMDS_SLAVE_config: unconfig
+MPC832XEMDS_SLAVE_config \
+MPC832XEMDS_ATM_config: unconfig
@mkdir -p $(obj)include
@echo "" >$(obj)include/config.h ; \
if [ "$(findstring _HOST_,$@)" ] ; then \
if [ "$(findstring _33_,$@)" ] ; then \
echo -n "...33M ..." ; \
echo "#define PCI_33M" >>$(obj)include/config.h ; \
+ echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
fi ; \
if [ "$(findstring _66_,$@)" ] ; then \
echo -n "...66M..." ; \
echo "#define PCI_66M" >>$(obj)include/config.h ; \
- fi ;
+ echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
+ fi ; \
+ if [ "$(findstring _ATM_,$@)" ] ; then \
+ echo -n "...ATM..." ; \
+ echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
+ echo "#define CONFIG_PQ_MDS_PIB_ATM 1" >>$(obj)include/config.h ; \
+ fi ;
@$(MKCONFIG) -a MPC832XEMDS ppc mpc83xx mpc832xemds freescale
MPC8349EMDS_config: unconfig
MPC8360EMDS_config \
MPC8360EMDS_HOST_33_config \
MPC8360EMDS_HOST_66_config \
-MPC8360EMDS_SLAVE_config: unconfig
+MPC8360EMDS_SLAVE_config \
+MPC8360EMDS_ATM_config: unconfig
@mkdir -p $(obj)include
@echo "" >$(obj)include/config.h ; \
if [ "$(findstring _HOST_,$@)" ] ; then \
if [ "$(findstring _33_,$@)" ] ; then \
echo -n "...33M ..." ; \
echo "#define PCI_33M" >>$(obj)include/config.h ; \
+ echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
fi ; \
if [ "$(findstring _66_,$@)" ] ; then \
echo -n "...66M..." ; \
echo "#define PCI_66M" >>$(obj)include/config.h ; \
+ echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
+ fi ; \
+ if [ "$(findstring _ATM_,$@)" ] ; then \
+ echo -n "...ATM..." ; \
+ echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
+ echo "#define CONFIG_PQ_MDS_PIB_ATM 1" >>$(obj)include/config.h ; \
fi ;
@$(MKCONFIG) -a MPC8360EMDS ppc mpc83xx mpc8360emds freescale
#include <common.h>
#include <command.h>
#include <i2c.h>
+#include <asm/io.h>
/*
* There are 2 versions of production Sequoia & Rainier platforms.
* All Sequoias & Rainiers select from two possible EEPROMs in Boot
* Config F. One for 33MHz PCI, one for 66MHz PCI. The following
* values are for the 33MHz PCI configuration. Byte 5 (0 base) is
- * the only value affected for a 66MHz PCI and simply needs a +0x10.
+ * the only value affected for a 33MHz PCI and simply needs a | 0x08.
*/
#define NAND_COMPATIBLE 0x01
"CPU: 416 PLB: 166 OPB: 83 EBC: 55",
"CPU: 500 PLB: 166 OPB: 83 EBC: 55",
"CPU: 533 PLB: 133 OPB: 66 EBC: 66",
+ "CPU: 667 PLB: 133 OPB: 66 EBC: 66",
"CPU: 667 PLB: 166 OPB: 83 EBC: 55",
NULL
};
0x87, 0x78, 0x82, 0x52, 0x09, 0x57, 0xa0, 0x30, 0x40,
0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
},
+ {
+ (NOR_COMPATIBLE),
+ 0x87, 0x78, 0xa2, 0x56, 0x09, 0x57, 0xa0, 0x30, 0x40,
+ 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+ },
{
(NAND_COMPATIBLE | NOR_COMPATIBLE),
0x87, 0x78, 0xa2, 0x52, 0x09, 0xd7, 0xa0, 0x30, 0x40,
}
/* check CPLD register +5 for PCI 66MHz flag */
- if (in8(CFG_BCSR_BASE + 5) & 0x01)
- buf[5] += 0x10;
+ if ((in_8((void *)(CFG_BCSR_BASE + 5)) & CFG_BCSR5_PCI66EN) == 0)
+ /*
+ * PLB-to-PCI divisor = 3 for 33MHz sync PCI
+ * instead of 2 for 66MHz systems
+ */
+ buf[5] |= 0x08;
if (i2c_write(I2C_EEPROM_ADDR, 0, 1, buf, 16) != 0)
printf("Error writing to EEPROM at address 0x%x\n", I2C_EEPROM_ADDR);
/*
- * (C) Copyright 2006
+ * (C) Copyright 2006-2007
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* (C) Copyright 2006
#include <common.h>
#include <asm/processor.h>
+#include <asm/io.h>
#include <ppc440.h>
DECLARE_GLOBAL_DATA_PTR;
printf("Board: Rainier - AMCC PPC440GRx Evaluation Board");
#endif
- rev = in8(CFG_BCSR_BASE + 0);
- val = in8(CFG_BCSR_BASE + 5) & 0x01;
+ rev = in_8((void *)(CFG_BCSR_BASE + 0));
+ val = in_8((void *)(CFG_BCSR_BASE + 5)) & CFG_BCSR5_PCI66EN;
printf(", Rev. %X, PCI=%d MHz", rev, val ? 66 : 33);
if (s != NULL) {
/*
+ * (C) Copyright 2006-2007
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
#include <common.h>
#include <ppc4xx.h>
#include <asm/processor.h>
+#include <asm/io.h>
#include <spd_sdram.h>
DECLARE_GLOBAL_DATA_PTR;
printf("Board: Yellowstone - AMCC PPC440GR Evaluation Board");
#endif
- rev = *(u8 *)(CFG_CPLD + 0);
- val = *(u8 *)(CFG_CPLD + 5) & 0x01;
+ rev = in_8((void *)(CFG_BCSR_BASE + 0));
+ val = in_8((void *)(CFG_BCSR_BASE + 5)) & CFG_BCSR5_PCI66EN;
printf(", Rev. %X, PCI=%d MHz", rev, val ? 66 : 33);
if (s != NULL) {
printf("QOC3 ATM card on PMC0\n");
#elif defined(CONFIG_MPC832XEMDS)
- val = 0;
- i2c_write(0x26, 0x7, 1, &val, 1);
- val = 0xf7;
- i2c_write(0x26, 0x3, 1, &val, 1);
-
- val = 0;
- i2c_write(0x21, 0x6, 1, &val, 1);
- i2c_write(0x21, 0x7, 1, &val, 1);
-
- val = 0xdf;
- i2c_write(0x21, 0x2, 1, &val, 1);
- val = 0xef;
- i2c_write(0x21, 0x3, 1, &val, 1);
+ val8 = 0;
+ i2c_write(0x26, 0x7, 1, &val8, 1);
+ val8 = 0xf7;
+ i2c_write(0x26, 0x3, 1, &val8, 1);
+
+ val8 = 0;
+ i2c_write(0x21, 0x6, 1, &val8, 1);
+ i2c_write(0x21, 0x7, 1, &val8, 1);
+
+ val8 = 0xdf;
+ i2c_write(0x21, 0x2, 1, &val8, 1);
+ val8 = 0xef;
+ i2c_write(0x21, 0x3, 1, &val8, 1);
eieio();
"\t'arg' can be the address of an initrd image\n"
#if defined(CONFIG_OF_FLAT_TREE) || defined(CONFIG_OF_LIBFDT)
"\tWhen booting a Linux kernel which requires a flat device-tree\n"
- "\ta third argument is required which is the address of the of the\n"
+ "\ta third argument is required which is the address of the\n"
"\tdevice-tree blob. To boot that kernel without an initrd image,\n"
"\tuse a '-' for the second argument. If you do not pass a third\n"
"\ta bd_info struct will be passed instead\n"
U_BOOT_CMD(
dtt, 1, 1, do_dtt,
- "dtt - Digital Thermometer and Themostat\n",
+ "dtt - Digital Thermometer and Thermostat\n",
" - Read temperature from digital thermometer and thermostat.\n"
);
struct isp116x isp116x_dev;
struct isp116x_platform_data isp116x_board;
-int got_rhsc = 0; /* root hub status change */
+static int got_rhsc; /* root hub status change */
struct usb_device *devgone; /* device which was disconnected */
-int rh_devnum = 0; /* address of Root Hub endpoint */
+static int rh_devnum; /* address of Root Hub endpoint */
/* ------------------------------------------------------------------------- */
done += PTD_GET_LEN(&ptd[i]);
cc = PTD_GET_CC(&ptd[i]);
- if (cc == TD_DATAUNDERRUN) { /* underrun is no error... */
- DBG("allowed data underrun");
- cc = TD_CC_NOERROR;
- }
- if (cc != TD_CC_NOERROR && ret == TD_CC_NOERROR)
+
+ /* Data underrun means basically that we had more buffer space than
+ * the function had data. It is perfectly normal but upper levels have
+ * to know how much we actually transferred.
+ */
+ if (cc == TD_NOTACCESSED ||
+ (cc != TD_CC_NOERROR && (ret == TD_CC_NOERROR || ret == TD_DATAUNDERRUN)))
ret = cc;
}
return ret;
}
-#define PTD_NUM 64 /* it should be enougth... */
-struct ptd ptd[PTD_NUM];
+/* With one PTD we can transfer almost 1K in one go;
+ * HC does the splitting into endpoint digestible transactions
+ */
+struct ptd ptd[1];
+
static inline int max_transfer_len(struct usb_device *dev, unsigned long pipe)
{
- return min(PTD_NUM * usb_maxpacket(dev, pipe), PTD_NUM * 16);
+ unsigned mpck = usb_maxpacket(dev, pipe);
+
+ /* One PTD can transfer 1023 bytes but try to always
+ * transfer multiples of endpoint buffer size
+ */
+ return 1023 / mpck * mpck;
}
/* Do an USB transfer
int max = usb_maxpacket(dev, pipe);
int dir_out = usb_pipeout(pipe);
int speed_low = usb_pipeslow(pipe);
- int i, done, stat, timeout, cc;
- int retries = 10;
+ int i, done = 0, stat, timeout, cc;
+
+ /* 500 frames or 0.5s timeout when function is busy and NAKs transactions for a while */
+ int retries = 500;
DBG("------------------------------------------------");
dump_msg(dev, pipe, buffer, len, "SUBMIT");
DBG("------------------------------------------------");
+ if (len >= 1024) {
+ ERR("Too big job");
+ dev->status = USB_ST_CRC_ERR;
+ return -1;
+ }
+
if (isp116x->disabled) {
ERR("EPIPE");
dev->status = USB_ST_CRC_ERR;
isp116x_write_reg32(isp116x, HCINTSTAT, 0xff);
/* Prepare the PTD data */
- done = 0;
- i = 0;
- do {
- ptd[i].count = PTD_CC_MSK | PTD_ACTIVE_MSK |
- PTD_TOGGLE(usb_gettoggle(dev, epnum, dir_out));
- ptd[i].mps = PTD_MPS(max) | PTD_SPD(speed_low) | PTD_EP(epnum);
- ptd[i].len = PTD_LEN(max > len - done ? len - done : max) |
- PTD_DIR(dir);
- ptd[i].faddr = PTD_FA(usb_pipedevice(pipe));
-
- usb_dotoggle(dev, epnum, dir_out);
- done += PTD_GET_LEN(&ptd[i]);
- i++;
- if (i >= PTD_NUM) {
- ERR("****** Cannot pack buffer! ******");
- dev->status = USB_ST_BUF_ERR;
- return -1;
- }
- } while (done < len);
- ptd[i - 1].mps |= PTD_LAST_MSK;
+ ptd->count = PTD_CC_MSK | PTD_ACTIVE_MSK |
+ PTD_TOGGLE(usb_gettoggle(dev, epnum, dir_out));
+ ptd->mps = PTD_MPS(max) | PTD_SPD(speed_low) | PTD_EP(epnum) | PTD_LAST_MSK;
+ ptd->len = PTD_LEN(len) | PTD_DIR(dir);
+ ptd->faddr = PTD_FA(usb_pipedevice(pipe));
+retry_same:
/* Pack data into FIFO ram */
- pack_fifo(isp116x, dev, pipe, ptd, i, buffer, len);
+ pack_fifo(isp116x, dev, pipe, ptd, 1, buffer, len);
#ifdef EXTRA_DELAY
wait_ms(EXTRA_DELAY);
#endif
}
/* Unpack data from FIFO ram */
- cc = unpack_fifo(isp116x, dev, pipe, ptd, i, buffer, len);
+ cc = unpack_fifo(isp116x, dev, pipe, ptd, 1, buffer, len);
+
+ i = PTD_GET_COUNT(ptd);
+ done += i;
+ buffer += i;
+ len -= i;
- /* Mmm... sometime we get 0x0f as cc which is a non sense!
- * Just retry the transfer...
+ /* There was some kind of real problem; Prepare the PTD again
+ * and retry from the failed transaction on
*/
- if (cc == 0x0f && retries-- > 0) {
- usb_dotoggle(dev, epnum, dir_out);
- goto retry;
+ if (cc && cc != TD_NOTACCESSED && cc != TD_DATAUNDERRUN) {
+ if (retries >= 100) {
+ retries -= 100;
+ /* The chip will have toggled the toggle bit for the failed
+ * transaction too. We have to toggle it back.
+ */
+ usb_settoggle(dev, epnum, dir_out, !PTD_GET_TOGGLE(ptd));
+ goto retry;
+ }
+ }
+ /* "Normal" errors; TD_NOTACCESSED would mean in effect that the function have NAKed
+ * the transactions from the first on for the whole frame. It may be busy and we retry
+ * with the same PTD. PTD_ACTIVE (and not TD_NOTACCESSED) would mean that some of the
+ * PTD didn't make it because the function was busy or the frame ended before the PTD
+ * finished. We prepare the rest of the data and try again.
+ */
+ else if (cc == TD_NOTACCESSED || PTD_GET_ACTIVE(ptd) || (cc != TD_DATAUNDERRUN && PTD_GET_COUNT(ptd) < PTD_GET_LEN(ptd))) {
+ if (retries) {
+ --retries;
+ if (cc == TD_NOTACCESSED && PTD_GET_ACTIVE(ptd) && !PTD_GET_COUNT(ptd)) goto retry_same;
+ usb_settoggle(dev, epnum, dir_out, PTD_GET_TOGGLE(ptd));
+ goto retry;
+ }
}
- if (cc != TD_CC_NOERROR) {
+ if (cc != TD_CC_NOERROR && cc != TD_DATAUNDERRUN) {
DBG("****** completition code error %x ******", cc);
switch (cc) {
case TD_CC_BITSTUFFING:
}
return -cc;
}
+ else usb_settoggle(dev, epnum, dir_out, PTD_GET_TOGGLE(ptd));
dump_msg(dev, pipe, buffer, len, "SUBMIT(ret)");
DBG("");
+ got_rhsc = rh_devnum = 0;
+
/* Init device registers addr */
isp116x->addr_reg = (u16 *) ISP116X_HCD_ADDR;
isp116x->data_reg = (u16 *) ISP116X_HCD_DATA;
#define CFG_EBC_PB2AP 0x24814580
#define CFG_EBC_PB2CR (CFG_BCSR_BASE | 0x38000)
+#define CFG_BCSR5_PCI66EN 0x80
+
/*-----------------------------------------------------------------------
* NAND FLASH
*----------------------------------------------------------------------*/
#define CFG_EBC_PB2AP 0x04814500
#define CFG_EBC_PB2CR (CFG_CPLD | 0x18000)
+#define CFG_BCSR5_PCI66EN 0x80
+
/*-----------------------------------------------------------------------
* Cache Configuration
*/