]> git.kernelconcepts.de Git - karo-tx-linux.git/commitdiff
spi: pxa2xx: Add support for Intel Broxton
authorJarkko Nikula <jarkko.nikula@linux.intel.com>
Wed, 28 Oct 2015 13:13:42 +0000 (15:13 +0200)
committerMark Brown <broonie@kernel.org>
Fri, 30 Oct 2015 02:18:05 +0000 (11:18 +0900)
LPSS SPI in Intel Broxton is otherwise the same than in Intel Sunrisepoint
but it supports up to four chip selects per port and has different FIFO
thresholds. Patch adds support for two Broxton SoC variants.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-pxa2xx.c
include/linux/pxa2xx_ssp.h

index a5c2dce7d0a3fd2a9af08ee9a25013ec877303d3..f759c082f0f771652e3d1eaa6eaa790e330fd509 100644 (file)
@@ -116,6 +116,16 @@ static const struct lpss_config lpss_platforms[] = {
                .tx_threshold_lo = 32,
                .tx_threshold_hi = 56,
        },
+       {       /* LPSS_BXT_SSP */
+               .offset = 0x200,
+               .reg_general = -1,
+               .reg_ssp = 0x20,
+               .reg_cs_ctrl = 0x24,
+               .reg_capabilities = 0xfc,
+               .rx_threshold = 1,
+               .tx_threshold_lo = 16,
+               .tx_threshold_hi = 48,
+       },
 };
 
 static inline const struct lpss_config
@@ -130,6 +140,7 @@ static bool is_lpss_ssp(const struct driver_data *drv_data)
        case LPSS_LPT_SSP:
        case LPSS_BYT_SSP:
        case LPSS_SPT_SSP:
+       case LPSS_BXT_SSP:
                return true;
        default:
                return false;
@@ -1152,6 +1163,7 @@ static int setup(struct spi_device *spi)
        case LPSS_LPT_SSP:
        case LPSS_BYT_SSP:
        case LPSS_SPT_SSP:
+       case LPSS_BXT_SSP:
                config = lpss_get_config(drv_data);
                tx_thres = config->tx_threshold_lo;
                tx_hi_thres = config->tx_threshold_hi;
@@ -1313,6 +1325,14 @@ static const struct pci_device_id pxa2xx_spi_pci_compound_match[] = {
        /* SPT-H */
        { PCI_VDEVICE(INTEL, 0xa129), LPSS_SPT_SSP },
        { PCI_VDEVICE(INTEL, 0xa12a), LPSS_SPT_SSP },
+       /* BXT */
+       { PCI_VDEVICE(INTEL, 0x0ac2), LPSS_BXT_SSP },
+       { PCI_VDEVICE(INTEL, 0x0ac4), LPSS_BXT_SSP },
+       { PCI_VDEVICE(INTEL, 0x0ac6), LPSS_BXT_SSP },
+       /* APL */
+       { PCI_VDEVICE(INTEL, 0x5ac2), LPSS_BXT_SSP },
+       { PCI_VDEVICE(INTEL, 0x5ac4), LPSS_BXT_SSP },
+       { PCI_VDEVICE(INTEL, 0x5ac6), LPSS_BXT_SSP },
        { },
 };
 
index 92273776bce6ba9845ab2584644718cbabcb0dd6..c2f2574ff61ceebbe4729df6d577722b391d0600 100644 (file)
@@ -198,6 +198,7 @@ enum pxa_ssp_type {
        LPSS_LPT_SSP, /* Keep LPSS types sorted with lpss_platforms[] */
        LPSS_BYT_SSP,
        LPSS_SPT_SSP,
+       LPSS_BXT_SSP,
 };
 
 struct ssp_device {