Merge branch 'soc/sched_clock' into next/soc

From Stephen Boyd:
* soc/sched_clock:
  ARM: versatile: Switch to sched_clock_register()
  ARM: orion: Switch to sched_clock_register()
  ARM: OMAP: Switch to sched_clock_register()
  ARM: iop: Switch to sched_clock_register()
  ARM: u300: Switch to sched_clock_register()
  ARM: sa1100: Switch to sched_clock_register()
  ARM: pxa: Switch to sched_clock_register()
  ARM: OMAP2+: Switch to sched_clock_register()
  ARM: OMAP1: Switch to sched_clock_register()
  ARM: msm: Switch to sched_clock_register()
  ARM: mmp: Switch to sched_clock_register()
  ARM: IXP4xx: Switch to sched_clock_register()
  ARM: integrator: Switch to sched_clock_register()
  ARM: imx: Switch to sched_clock_register()
  ARM: davinci: Switch to sched_clock_register()
  ARM: clps711x: Switch to sched_clock_register()
  ARM: timer-sp: Switch to sched_clock_register()

Signed-off-by: Kevin Hilman <khilman@linaro.org>

diff --combined arch/arm/common/timer-sp.c
index ce922d0ea7aa85daa59c408ac5cd79beab5459a6,e26a18536c6b3fb51b4f56e607d3fd1da4d5e1b2..53c6a26b633d678f6d63f530931157aaefc68f84
--- 1/arch/arm/common/timer-sp.c
--- 2/arch/arm/common/timer-sp.c
+++ b/arch/arm/common/timer-sp.c
@@@ -66,7 -66,7 +66,7 @@@ static long __init sp804_get_clock_rate
  
  static void __iomem *sched_clock_base;
  
- static u32 sp804_read(void)
+ static u64 notrace sp804_read(void)
  {
        return ~readl_relaxed(sched_clock_base + TIMER_VALUE);
  }
@@@ -104,7 -104,7 +104,7 @@@ void __init __sp804_clocksource_and_sch
  
        if (use_sched_clock) {
                sched_clock_base = base;
-               setup_sched_clock(sp804_read, 32, rate);
+               sched_clock_register(sp804_read, 32, rate);
        }
  }
  
@@@ -175,7 -175,7 +175,7 @@@ static struct clock_event_device sp804_
  
  static struct irqaction sp804_timer_irq = {
        .name           = "timer",
 -      .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
 +      .flags          = IRQF_TIMER | IRQF_IRQPOLL,
        .handler        = sp804_timer_interrupt,
        .dev_id         = &sp804_clockevent,
  };

diff --combined arch/arm/mach-ixp4xx/common.c
index 9edaf4734fa84956d27539b2411e581aa1ef76a5,124631e6679760e7a949e496b61efc842031722d..bc9d8ec2918efded94977dfeda9993c644421486
--- 1/arch/arm/mach-ixp4xx/common.c
--- 2/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@@ -81,44 -81,6 +81,44 @@@ void __init ixp4xx_map_io(void
        iotable_init(ixp4xx_io_desc, ARRAY_SIZE(ixp4xx_io_desc));
  }
  
 +/*
 + * GPIO-functions
 + */
 +/*
 + * The following converted to the real HW bits the gpio_line_config
 + */
 +/* GPIO pin types */
 +#define IXP4XX_GPIO_OUT               0x1
 +#define IXP4XX_GPIO_IN                0x2
 +
 +/* GPIO signal types */
 +#define IXP4XX_GPIO_LOW                       0
 +#define IXP4XX_GPIO_HIGH              1
 +
 +/* GPIO Clocks */
 +#define IXP4XX_GPIO_CLK_0             14
 +#define IXP4XX_GPIO_CLK_1             15
 +
 +static void gpio_line_config(u8 line, u32 direction)
 +{
 +      if (direction == IXP4XX_GPIO_IN)
 +              *IXP4XX_GPIO_GPOER |= (1 << line);
 +      else
 +              *IXP4XX_GPIO_GPOER &= ~(1 << line);
 +}
 +
 +static void gpio_line_get(u8 line, int *value)
 +{
 +      *value = (*IXP4XX_GPIO_GPINR >> line) & 0x1;
 +}
 +
 +static void gpio_line_set(u8 line, int value)
 +{
 +      if (value == IXP4XX_GPIO_HIGH)
 +          *IXP4XX_GPIO_GPOUTR |= (1 << line);
 +      else if (value == IXP4XX_GPIO_LOW)
 +          *IXP4XX_GPIO_GPOUTR &= ~(1 << line);
 +}
  
  /*************************************************************************
   * IXP4xx chipset IRQ handling
@@@ -155,6 -117,17 +155,6 @@@ static int ixp4xx_gpio_to_irq(struct gp
        return -EINVAL;
  }
  
 -int irq_to_gpio(unsigned int irq)
 -{
 -      int gpio = (irq < 32) ? irq2gpio[irq] : -EINVAL;
 -
 -      if (gpio == -1)
 -              return -EINVAL;
 -
 -      return gpio;
 -}
 -EXPORT_SYMBOL(irq_to_gpio);
 -
  static int ixp4xx_set_irq_type(struct irq_data *d, unsigned int type)
  {
        int line = irq2gpio[d->irq];
@@@ -475,7 -448,7 +475,7 @@@ void __init ixp4xx_sys_init(void
  /*
   * sched_clock()
   */
- static u32 notrace ixp4xx_read_sched_clock(void)
+ static u64 notrace ixp4xx_read_sched_clock(void)
  {
        return *IXP4XX_OSTS;
  }
@@@ -493,7 -466,7 +493,7 @@@ unsigned long ixp4xx_timer_freq = IXP4X
  EXPORT_SYMBOL(ixp4xx_timer_freq);
  static void __init ixp4xx_clocksource_init(void)
  {
-       setup_sched_clock(ixp4xx_read_sched_clock, 32, ixp4xx_timer_freq);
+       sched_clock_register(ixp4xx_read_sched_clock, 32, ixp4xx_timer_freq);
  
        clocksource_mmio_init(NULL, "OSTS", ixp4xx_timer_freq, 200, 32,
                        ixp4xx_clocksource_read);

diff --combined arch/arm/mach-u300/timer.c
index 9a5f9fb352ce1c7ca97baa3e4269ef54770e2faa,d23a1f06517197296e6475a24ec1073d4964cd7f..9724e4e7cc93ffa6232833bbb0c1f6ebdc1fbdf2
--- 1/arch/arm/mach-u300/timer.c
--- 2/arch/arm/mach-u300/timer.c
+++ b/arch/arm/mach-u300/timer.c
@@@ -341,7 -341,7 +341,7 @@@ static struct irqaction u300_timer_irq 
   * stamp. (Inspired by OMAP implementation.)
   */
  
- static u32 notrace u300_read_sched_clock(void)
+ static u64 notrace u300_read_sched_clock(void)
  {
        return readl(u300_timer_base + U300_TIMER_APP_GPT2CC);
  }
@@@ -358,7 -358,8 +358,7 @@@ static struct delay_timer u300_delay_ti
   */
  static void __init u300_timer_init_of(struct device_node *np)
  {
 -      struct resource irq_res;
 -      int irq;
 +      unsigned int irq;
        struct clk *clk;
        unsigned long rate;
  
@@@ -367,11 -368,11 +367,11 @@@
                panic("could not ioremap system timer\n");
  
        /* Get the IRQ for the GP1 timer */
 -      irq = of_irq_to_resource(np, 2, &irq_res);
 -      if (irq <= 0)
 +      irq = irq_of_parse_and_map(np, 2);
 +      if (!irq)
                panic("no IRQ for system timer\n");
  
 -      pr_info("U300 GP1 timer @ base: %p, IRQ: %d\n", u300_timer_base, irq);
 +      pr_info("U300 GP1 timer @ base: %p, IRQ: %u\n", u300_timer_base, irq);
  
        /* Clock the interrupt controller */
        clk = of_clk_get(np, 0);
@@@ -379,7 -380,7 +379,7 @@@
        clk_prepare_enable(clk);
        rate = clk_get_rate(clk);
  
-       setup_sched_clock(u300_read_sched_clock, 32, rate);
+       sched_clock_register(u300_read_sched_clock, 32, rate);
  
        u300_delay_timer.read_current_timer = &u300_read_current_timer;
        u300_delay_timer.freq = rate;