interface is currently active. For example you
can do the following
- => setenv ethact FEC ETHERNET
- => ping 192.168.0.1 # traffic sent on FEC ETHERNET
- => setenv ethact SCC ETHERNET
- => ping 10.0.0.1 # traffic sent on SCC ETHERNET
+ => setenv ethact FEC
+ => ping 192.168.0.1 # traffic sent on FEC
+ => setenv ethact SCC
+ => ping 10.0.0.1 # traffic sent on SCC
ethrotate - When set to "no" U-Boot does not go through all
available network interfaces.
};
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
-int at91rm9200_miiphy_read(char *devname, unsigned char addr,
+int at91rm9200_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short * value)
{
at91rm9200_EmacEnableMDIO (p_mac);
return 0;
}
-int at91rm9200_miiphy_write(char *devname, unsigned char addr,
+int at91rm9200_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
at91rm9200_EmacEnableMDIO (p_mac);
/*
* prototypes...
*/
-extern int npe_miiphy_read (char *devname, unsigned char addr,
+extern int npe_miiphy_read (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
-extern int npe_miiphy_write (char *devname, unsigned char addr,
+extern int npe_miiphy_write (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
#endif /* ifndef NPE_H */
}
-int npe_miiphy_read (char *devname, unsigned char addr,
+int npe_miiphy_read (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
u16 val;
} /* phy_read */
-int npe_miiphy_write (char *devname, unsigned char addr,
+int npe_miiphy_write (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
ixEthAccMiiWriteRtn(addr, reg, value);
void __mii_init(void);
uint mii_send(uint mii_cmd);
int mii_discover_phy(struct eth_device *dev);
-int mcffec_miiphy_read(char *devname, unsigned char addr,
+int mcffec_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
-int mcffec_miiphy_write(char *devname, unsigned char addr,
+int mcffec_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
#endif
#define MAX_WAIT 1000
#if defined(CONFIG_CMD_MII)
-int au1x00_miiphy_read(char *devname, unsigned char addr,
+int au1x00_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short * value)
{
volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL);
return 0;
}
-int au1x00_miiphy_write(char *devname, unsigned char addr,
+int au1x00_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL);
u8 head[16]; /* MAC header(6 + 6 + 2) + 2(aligned) */
} NBUF;
-int fec8220_miiphy_read (char *devname, u8 phyAddr, u8 regAddr, u16 * retVal);
-int fec8220_miiphy_write (char *devname, u8 phyAddr, u8 regAddr, u16 data);
+int fec8220_miiphy_read (const char *devname, u8 phyAddr, u8 regAddr, u16 *retVal);
+int fec8220_miiphy_write (const char *devname, u8 phyAddr, u8 regAddr, u16 data);
/********************************************************************/
#ifdef DEBUG
dev->send = mpc8220_fec_send;
dev->recv = mpc8220_fec_recv;
- sprintf (dev->name, "FEC ETHERNET");
+ sprintf (dev->name, "FEC");
eth_register (dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
/* MII-interface related functions */
/********************************************************************/
-int fec8220_miiphy_read (char *devname, u8 phyAddr, u8 regAddr, u16 * retVal)
+int fec8220_miiphy_read (const char *devname, u8 phyAddr, u8 regAddr, u16 *retVal)
{
ethernet_regs *eth = (ethernet_regs *) MMAP_FEC1;
u32 reg; /* convenient holder for the PHY register */
}
/********************************************************************/
-int fec8220_miiphy_write (char *devname, u8 phyAddr, u8 regAddr, u16 data)
+int fec8220_miiphy_write(const char *devname, u8 phyAddr, u8 regAddr, u16 data)
{
ethernet_regs *eth = (ethernet_regs *) MMAP_FEC1;
u32 reg; /* convenient holder for the PHY register */
dev = (struct eth_device*) malloc(sizeof *dev);
memset(dev, 0, sizeof *dev);
- sprintf(dev->name, "FCC%d ETHERNET",
+ sprintf(dev->name, "FCC%d",
ether_fcc_info[i].ether_index + 1);
dev->priv = ðer_fcc_info[i];
dev->init = fec_init;
dev = (struct eth_device *) malloc(sizeof *dev);
memset(dev, 0, sizeof *dev);
- sprintf(dev->name, "SCC ETHERNET");
+ sprintf(dev->name, "SCC");
dev->init = sec_init;
dev->halt = sec_halt;
dev->send = sec_send;
dev = (struct eth_device*) malloc(sizeof *dev);
memset(dev, 0, sizeof *dev);
- sprintf(dev->name, "FCC%d ETHERNET",
+ sprintf(dev->name, "FCC%d",
ether_fcc_info[i].ether_index + 1);
dev->priv = ðer_fcc_info[i];
dev->init = fec_init;
static int mii_discover_phy(struct eth_device *dev);
#endif
-int fec8xx_miiphy_read(char *devname, unsigned char addr,
+int fec8xx_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
-int fec8xx_miiphy_write(char *devname, unsigned char addr,
+int fec8xx_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
static struct ether_fcc_info_s
/* for FEC1 make sure that the name of the interface is the same
as the old one for compatibility reasons */
if (i == 0) {
- sprintf (dev->name, "FEC ETHERNET");
+ sprintf (dev->name, "FEC");
} else {
- sprintf (dev->name, "FEC%d ETHERNET",
+ sprintf (dev->name, "FEC%d",
ether_fcc_info[i].ether_index + 1);
}
* Otherwise they hang in mii_send() !!! Sorry!
*****************************************************************************/
-int fec8xx_miiphy_read(char *devname, unsigned char addr,
+int fec8xx_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
short rdreg; /* register working value */
return 0;
}
-int fec8xx_miiphy_write(char *devname, unsigned char addr,
+int fec8xx_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
short rdreg; /* register working value */
dev = (struct eth_device*) malloc(sizeof *dev);
memset(dev, 0, sizeof *dev);
- sprintf(dev->name, "SCC ETHERNET");
+ sprintf(dev->name, "SCC");
dev->iobase = 0;
dev->priv = 0;
dev->init = scc_init;
return 0;
}
-int emac4xx_miiphy_read (char *devname, unsigned char addr, unsigned char reg,
+int emac4xx_miiphy_read (const char *devname, unsigned char addr, unsigned char reg,
unsigned short *value)
{
unsigned long sta_reg;
/* write a phy reg and return the value with a rc */
/***********************************************************/
-int emac4xx_miiphy_write (char *devname, unsigned char addr, unsigned char reg,
+int emac4xx_miiphy_write (const char *devname, unsigned char addr, unsigned char reg,
unsigned short value)
{
return emac_miiphy_command(addr, reg, EMAC_STACR_WRITE, value);
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
-
-#
-# esd AR405 boards
-#
-
-#TEXT_BASE = 0xFFFE0000
-#TEXT_BASE = 0xFFFD0000
-TEXT_BASE = 0xFFFC0000
+TEXT_BASE = 0xFFFA0000
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
-
-#
-# esd ADCIOP boards
-#
-
-TEXT_BASE = 0xFFFE0000
-#TEXT_BASE = 0xFFFD0000
+TEXT_BASE = 0xFFFC0000
sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
ifndef TEXT_BASE
-TEXT_BASE = 0xFFFA0000
+TEXT_BASE = 0xFFF90000
endif
PLATFORM_CPPFLAGS += -DCONFIG_440=1
/* MII PHY access routines are common for all i/f, use gal_ent0 */
#define GT6426x_MII_DEVNAME "gal_enet0"
-int gt6426x_miiphy_read(char *devname, unsigned char phy,
+int gt6426x_miiphy_read(const char *devname, unsigned char phy,
unsigned char reg, unsigned short *val);
static inline unsigned short
MII utilities - write: write to an MII register via SMI
***************************************************************************/
int
-gt6426x_miiphy_write(char *devname, unsigned char phy,
+gt6426x_miiphy_write(const char *devname, unsigned char phy,
unsigned char reg, unsigned short data)
{
unsigned int temp= (reg<<21) | (phy<<16) | data;
MII utilities - read: read from an MII register via SMI
***************************************************************************/
int
-gt6426x_miiphy_read(char *devname, unsigned char phy,
+gt6426x_miiphy_read(const char *devname, unsigned char phy,
unsigned char reg, unsigned short *val)
{
unsigned int temp= (reg<<21) | (phy<<16) | 1<<26;
#endif
#if defined(CONFIG_MII) && defined(CONFIG_ETHER_ON_FCC)
/* reset PHY */
- miiphy_reset("FCC1 ETHERNET", 0x0);
+ miiphy_reset("FCC1", 0x0);
/* change PHY address to 0x02 */
bb_miiphy_write(NULL, 0, PHY_MIPSCR, 0xf028);
iop->pdat |= 0x00080000;
for (i=0; i<100; i++) {
udelay(20000);
- if (bb_miiphy_read("FCC1 ETHERNET", CONFIG_SYS_PHY_ADDR,2,&val ) == 0) {
+ if (bb_miiphy_read("FCC1", CONFIG_SYS_PHY_ADDR,2,&val ) == 0) {
break;
}
}
#define TOUT_LOOP 50000
/*
- * Since, except during initialization, ethact is always HDLC ETHERNET
+ * Since, except during initialization, ethact is always HDLC
* while we're in the driver, just use serial_printf() everywhere for
* output. This avoids possible conflicts when netconsole is being
* used.
seth = dev;
#endif
- sprintf(dev->name, "HDLC ETHERNET");
+ sprintf(dev->name, "HDLC");
dev->init = keymile_hdlc_enet_init;
dev->halt = keymile_hdlc_enet_halt;
dev->send = keymile_hdlc_enet_send;
char keymile_slot; /* our slot number in the backplane */
/*
- * Since, except during initialization, ethact is always HDLC ETHERNET
+ * Since, except during initialization, ethact is always HDLC
* while we're in the driver, just use serial_printf() everywhere for
* output. This avoids possible conflicts when netconsole is being
* used.
{
unsigned short mode_control;
- miiphy_read("FEC ETHERNET", CONFIG_PHY_ADDR, 0x15, &mode_control);
- miiphy_write("FEC ETHERNET", CONFIG_PHY_ADDR, 0x15,
+ miiphy_read("FEC", CONFIG_PHY_ADDR, 0x15, &mode_control);
+ miiphy_write("FEC", CONFIG_PHY_ADDR, 0x15,
mode_control & 0xfffe);
return;
}
int mv64460_eth_xmit (struct eth_device *, volatile void *packet, int length);
-int mv_miiphy_read(char *devname, unsigned char phy_addr,
+int mv_miiphy_read(const char *devname, unsigned char phy_addr,
unsigned char phy_reg, unsigned short *value);
-int mv_miiphy_write(char *devname, unsigned char phy_addr,
+int mv_miiphy_write(const char *devname, unsigned char phy_addr,
unsigned char phy_reg, unsigned short value);
int phy_setup_aneg (char *devname, unsigned char addr);
return true;
}
-int mv_miiphy_read(char *devname, unsigned char phy_addr,
+int mv_miiphy_read(const char *devname, unsigned char phy_addr,
unsigned char phy_reg, unsigned short *value)
{
unsigned int reg_value;
return true;
}
-int mv_miiphy_write(char *devname, unsigned char phy_addr,
+int mv_miiphy_write(const char *devname, unsigned char phy_addr,
unsigned char phy_reg, unsigned short value)
{
unsigned int reg_value;
#endif
#if defined(CONFIG_MII) && defined(CONFIG_ETHER_ON_FCC)
/* reset PHY */
- miiphy_reset("FCC1 ETHERNET", 0x0);
+ miiphy_reset("FCC1", 0x0);
/* change PHY address to 0x02 */
bb_miiphy_write(NULL, 0, PHY_MIPSCR, 0xf028);
# MA 02111-1307 USA
#
-TEXT_BASE = 0xFFFC0000
+TEXT_BASE = 0xFFFA0000
#endif
#if defined(CONFIG_MII) && defined(CONFIG_ETHER_ON_FCC)
/* reset PHY */
- miiphy_reset("FCC1 ETHERNET", 0x0);
+ miiphy_reset("FCC1", 0x0);
/* change PHY address to 0x02 */
bb_miiphy_write(NULL, 0, PHY_MIPSCR, 0xf028);
#endif
#if defined(CONFIG_MII) && defined(CONFIG_ETHER_ON_FCC)
/* reset PHY */
- miiphy_reset("FCC1 ETHERNET", 0x0);
+ miiphy_reset("FCC1", 0x0);
/* change PHY address to 0x02 */
bb_miiphy_write(NULL, 0, PHY_MIPSCR, 0xf028);
mii_init();
for (phyno = 0; phyno < 32; ++phyno) {
- miiphy_read("FEC ETHERNET", phyno, PHY_PHYIDR1, &v);
+ miiphy_read("FEC", phyno, PHY_PHYIDR1, &v);
if (v == 0xFFFF)
continue;
- miiphy_write("FEC ETHERNET", phyno, PHY_BMCR, PHY_BMCR_POWD);
+ miiphy_write("FEC", phyno, PHY_BMCR, PHY_BMCR_POWD);
udelay(10000);
- miiphy_write("FEC ETHERNET", phyno, PHY_BMCR, PHY_BMCR_RESET | PHY_BMCR_AUTON);
+ miiphy_write("FEC", phyno, PHY_BMCR, PHY_BMCR_RESET | PHY_BMCR_AUTON);
udelay(10000);
}
}
return 0;
for (i = 0; i < 2; i++) {
- ret = miiphy_read("FEC ETHERNET", phy[i], PHY_BMCR, ®);
+ ret = miiphy_read("FEC", phy[i], PHY_BMCR, ®);
if (ret) {
printf("Cannot read BMCR on PHY %d\n", phy[i]);
return 0;
}
/* Auto-negotiation off, hard set full duplex, 100Mbps */
- ret = miiphy_write("FEC ETHERNET", phy[i],
+ ret = miiphy_write("FEC", phy[i],
PHY_BMCR, (reg | PHY_BMCR_100MB |
PHY_BMCR_DPLX) & ~PHY_BMCR_AUTON);
if (ret) {
unsigned char addr, reg;
unsigned short data;
int rcode = 0;
- char *devname;
+ const char *devname;
if (argc < 2)
return cmd_usage(cmdtp);
struct mii_dev {
struct list_head link;
- char *name;
- int (*read) (char *devname, unsigned char addr,
+ const char *name;
+ int (*read) (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
- int (*write) (char *devname, unsigned char addr,
+ int (*write) (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
};
static struct list_head mii_devs;
static struct mii_dev *current_mii;
+/*
+ * Lookup the mii_dev struct by the registered device name.
+ */
+static struct mii_dev *miiphy_get_dev_by_name(const char *devname, int quiet)
+{
+ struct list_head *entry;
+ struct mii_dev *dev;
+
+ if (!devname) {
+ printf("NULL device name!\n");
+ return NULL;
+ }
+
+ list_for_each(entry, &mii_devs) {
+ dev = list_entry(entry, struct mii_dev, link);
+ if (strcmp(dev->name, devname) == 0)
+ return dev;
+ }
+
+ if (!quiet)
+ printf("No such device: %s\n", devname);
+ return NULL;
+}
+
/*****************************************************************************
*
* Initialize global data. Need to be called before any other miiphy routine.
*/
-void miiphy_init ()
+void miiphy_init(void)
{
INIT_LIST_HEAD (&mii_devs);
current_mii = NULL;
*
* Register read and write MII access routines for the device <name>.
*/
-void miiphy_register (char *name,
- int (*read) (char *devname, unsigned char addr,
+void miiphy_register(const char *name,
+ int (*read) (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value),
- int (*write) (char *devname, unsigned char addr,
+ int (*write) (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value))
{
- struct list_head *entry;
struct mii_dev *new_dev;
- struct mii_dev *miidev;
unsigned int name_len;
+ char *new_name;
/* check if we have unique name */
- list_for_each (entry, &mii_devs) {
- miidev = list_entry (entry, struct mii_dev, link);
- if (strcmp (miidev->name, name) == 0) {
- printf ("miiphy_register: non unique device name "
- "'%s'\n", name);
- return;
- }
+ new_dev = miiphy_get_dev_by_name(name, 1);
+ if (new_dev) {
+ printf("miiphy_register: non unique device name '%s'\n", name);
+ return;
}
/* allocate memory */
INIT_LIST_HEAD (&new_dev->link);
new_dev->read = read;
new_dev->write = write;
- new_dev->name = (char *)(new_dev + 1);
- strncpy (new_dev->name, name, name_len);
- new_dev->name[name_len] = '\0';
+ new_dev->name = new_name = (char *)(new_dev + 1);
+ strncpy (new_name, name, name_len);
+ new_name[name_len] = '\0';
debug ("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
new_dev->name, new_dev->read, new_dev->write);
current_mii = new_dev;
}
-int miiphy_set_current_dev (char *devname)
+int miiphy_set_current_dev(const char *devname)
{
- struct list_head *entry;
struct mii_dev *dev;
- list_for_each (entry, &mii_devs) {
- dev = list_entry (entry, struct mii_dev, link);
-
- if (strcmp (devname, dev->name) == 0) {
- current_mii = dev;
- return 0;
- }
+ dev = miiphy_get_dev_by_name(devname, 0);
+ if (dev) {
+ current_mii = dev;
+ return 0;
}
- printf ("No such device: %s\n", devname);
return 1;
}
-char *miiphy_get_current_dev ()
+const char *miiphy_get_current_dev(void)
{
if (current_mii)
return current_mii->name;
return NULL;
}
+static struct mii_dev *miiphy_get_active_dev(const char *devname)
+{
+ /* If the current mii is the one we want, return it */
+ if (current_mii)
+ if (strcmp(current_mii->name, devname) == 0)
+ return current_mii;
+
+ /* Otherwise, set the active one to the one we want */
+ if (miiphy_set_current_dev(devname))
+ return NULL;
+ else
+ return current_mii;
+}
+
/*****************************************************************************
*
* Read to variable <value> from the PHY attached to device <devname>,
* Returns:
* 0 on success
*/
-int miiphy_read (char *devname, unsigned char addr, unsigned char reg,
+int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
unsigned short *value)
{
- struct list_head *entry;
struct mii_dev *dev;
- int found_dev = 0;
- int read_ret = 0;
-
- if (!devname) {
- printf ("NULL device name!\n");
- return 1;
- }
-
- list_for_each (entry, &mii_devs) {
- dev = list_entry (entry, struct mii_dev, link);
-
- if (strcmp (devname, dev->name) == 0) {
- found_dev = 1;
- read_ret = dev->read (devname, addr, reg, value);
- break;
- }
- }
- if (found_dev == 0)
- printf ("No such device: %s\n", devname);
+ dev = miiphy_get_active_dev(devname);
+ if (dev)
+ return dev->read(devname, addr, reg, value);
- return ((found_dev) ? read_ret : 1);
+ return 1;
}
/*****************************************************************************
* Returns:
* 0 on success
*/
-int miiphy_write (char *devname, unsigned char addr, unsigned char reg,
+int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
unsigned short value)
{
- struct list_head *entry;
struct mii_dev *dev;
- int found_dev = 0;
- int write_ret = 0;
-
- if (!devname) {
- printf ("NULL device name!\n");
- return 1;
- }
-
- list_for_each (entry, &mii_devs) {
- dev = list_entry (entry, struct mii_dev, link);
-
- if (strcmp (devname, dev->name) == 0) {
- found_dev = 1;
- write_ret = dev->write (devname, addr, reg, value);
- break;
- }
- }
- if (found_dev == 0)
- printf ("No such device: %s\n", devname);
+ dev = miiphy_get_active_dev(devname);
+ if (dev)
+ return dev->write(devname, addr, reg, value);
- return ((found_dev) ? write_ret : 1);
+ return 1;
}
/*****************************************************************************
* Returns:
* 0 on success
*/
-int miiphy_info (char *devname, unsigned char addr, unsigned int *oui,
+int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
unsigned char *model, unsigned char *rev)
{
unsigned int reg = 0;
* Returns:
* 0 on success
*/
-int miiphy_reset (char *devname, unsigned char addr)
+int miiphy_reset(const char *devname, unsigned char addr)
{
unsigned short reg;
int timeout = 500;
*
* Determine the ethernet speed (10/100/1000). Return 10 on error.
*/
-int miiphy_speed (char *devname, unsigned char addr)
+int miiphy_speed(const char *devname, unsigned char addr)
{
u16 bmcr, anlpar;
*
* Determine full/half duplex. Return half on error.
*/
-int miiphy_duplex (char *devname, unsigned char addr)
+int miiphy_duplex(const char *devname, unsigned char addr)
{
u16 bmcr, anlpar;
* Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
* 1000BASE-T, or on error.
*/
-int miiphy_is_1000base_x (char *devname, unsigned char addr)
+int miiphy_is_1000base_x(const char *devname, unsigned char addr)
{
#if defined(CONFIG_PHY_GIGE)
u16 exsr;
*
* Determine link status
*/
-int miiphy_link (char *devname, unsigned char addr)
+int miiphy_link(const char *devname, unsigned char addr)
{
unsigned short reg;
tftp 10000 u-boot.bin
=> run load
- Using FSL UEC0 device
+ Using UEC0 device
TFTP from server 192.168.1.1; our IP address is 192.168.205.4
Filename '/tftpboot/kmeter1/u-boot.bin'.
Load address: 0x200000
addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off panic=1
=> run nfsargs addip
=> tftp 900000 /path/to/tftp/location/kernel.itb
-Using FEC ETHERNET device
+Using FEC device
TFTP from server 192.168.1.1; our IP address is 192.168.160.5
Filename '/path/to/tftp/location/kernel.itb'.
Load address: 0x900000
[on the target system]
=> tftp 900000 /path/to/tftp/location/kernel_fdt.itb
-Using FEC ETHERNET device
+Using FEC device
TFTP from server 192.168.1.1; our IP address is 192.168.160.5
Filename '/path/to/tftp/location/kernel_fdt.itb'.
Load address: 0x900000
static void emac_err (struct eth_device *dev, unsigned long isr);
extern int phy_setup_aneg (char *devname, unsigned char addr);
-extern int emac4xx_miiphy_read (char *devname, unsigned char addr,
+extern int emac4xx_miiphy_read (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
-extern int emac4xx_miiphy_write (char *devname, unsigned char addr,
+extern int emac4xx_miiphy_write (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
int board_emac_count(void);
/* MDIO access to phy */
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) && !defined(BITBANGMII)
-static int altera_tse_miiphy_write(char *devname, unsigned char addr,
+static int altera_tse_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
struct eth_device *dev;
return 0;
}
-static int altera_tse_miiphy_read(char *devname, unsigned char addr,
+static int altera_tse_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
struct eth_device *dev;
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
-at91_emac_t *get_emacbase_by_name(char *devname)
+at91_emac_t *get_emacbase_by_name(const char *devname)
{
struct eth_device *netdev;
return (at91_emac_t *) netdev->iobase;
}
-int at91emac_mii_read(char *devname, unsigned char addr,
+int at91emac_mii_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
at91_emac_t *emac;
}
-int at91emac_mii_write(char *devname, unsigned char addr,
+int at91emac_mii_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
at91_emac_t *emac;
return 0;
}
-static int bfin_miiphy_read(char *devname, uchar addr, uchar reg, ushort *val)
+static int bfin_miiphy_read(const char *devname, uchar addr, uchar reg, ushort *val)
{
if (bfin_miiphy_wait())
return 1;
return 0;
}
-static int bfin_miiphy_write(char *devname, uchar addr, uchar reg, ushort val)
+static int bfin_miiphy_write(const char *devname, uchar addr, uchar reg, ushort val)
{
if (bfin_miiphy_wait())
return 1;
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
-static int davinci_mii_phy_read(char *devname, unsigned char addr, unsigned char reg, unsigned short *value)
+static int davinci_mii_phy_read(const char *devname, unsigned char addr, unsigned char reg, unsigned short *value)
{
return(davinci_eth_phy_read(addr, reg, value) ? 0 : 1);
}
-static int davinci_mii_phy_write(char *devname, unsigned char addr, unsigned char reg, unsigned short value)
+static int davinci_mii_phy_write(const char *devname, unsigned char addr, unsigned char reg, unsigned short value)
{
return(davinci_eth_phy_write(addr, reg, value) ? 0 : 1);
}
}
#if defined(CONFIG_MII)
-static int dw_mii_read(char *devname, u8 addr, u8 reg, u16 *val)
+static int dw_mii_read(const char *devname, u8 addr, u8 reg, u16 *val)
{
struct eth_device *dev;
return 0;
}
-static int dw_mii_write(char *devname, u8 addr, u8 reg, u16 val)
+static int dw_mii_write(const char *devname, u8 addr, u8 reg, u16 val)
{
struct eth_device *dev;
/* Check if given phyaddr is valid, i.e. there is a PHY connected.
* Do this by checking model value field from ID2 register.
*/
-static struct eth_device* verify_phyaddr (char *devname, unsigned char addr)
+static struct eth_device* verify_phyaddr (const char *devname,
+ unsigned char addr)
{
struct eth_device *dev;
unsigned short value;
return dev;
}
-static int eepro100_miiphy_read (char *devname, unsigned char addr,
+static int eepro100_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
struct eth_device *dev;
return 0;
}
-static int eepro100_miiphy_write (char *devname, unsigned char addr,
+static int eepro100_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
struct eth_device *dev;
#define GET_REGS(eth_dev) (GET_PRIV(eth_dev)->regs)
/* ep93xx_miiphy ops forward declarations */
-static int ep93xx_miiphy_read(char * const dev, unsigned char const addr,
+static int ep93xx_miiphy_read(const char * const dev, unsigned char const addr,
unsigned char const reg, unsigned short * const value);
-static int ep93xx_miiphy_write(char * const dev, unsigned char const addr,
+static int ep93xx_miiphy_write(const char * const dev, unsigned char const addr,
unsigned char const reg, unsigned short const value);
#if defined(EP93XX_MAC_DEBUG)
/**
* Read a 16-bit value from an MII register.
*/
-static int ep93xx_miiphy_read(char * const dev, unsigned char const addr,
+static int ep93xx_miiphy_read(const char * const dev, unsigned char const addr,
unsigned char const reg, unsigned short * const value)
{
struct mac_regs *mac = (struct mac_regs *)MAC_BASE;
/**
* Write a 16-bit value to an MII register.
*/
-static int ep93xx_miiphy_write(char * const dev, unsigned char const addr,
+static int ep93xx_miiphy_write(const char * const dev, unsigned char const addr,
unsigned char const reg, unsigned short const value)
{
struct mac_regs *mac = (struct mac_regs *)MAC_BASE;
/*
* MII-interface related functions
*/
-static int fec_miiphy_read(char *dev, uint8_t phyAddr, uint8_t regAddr,
+static int fec_miiphy_read(const char *dev, uint8_t phyAddr, uint8_t regAddr,
uint16_t *retVal)
{
struct eth_device *edev = eth_get_dev_by_name(dev);
debug("fec_init: mii_speed %#lx\n",
fec->eth->mii_speed);
}
-static int fec_miiphy_write(char *dev, uint8_t phyAddr, uint8_t regAddr,
+static int fec_miiphy_write(const char *dev, uint8_t phyAddr, uint8_t regAddr,
uint16_t data)
{
struct eth_device *edev = eth_get_dev_by_name(dev);
writel(0x05ee0024, &fec->eth->r_cntrl); /* FIXME 0x05ee0004 */
fec_mii_setspeed(fec);
- sprintf(edev->name, "FEC_MXC");
+ sprintf(edev->name, "FEC");
miiphy_register(edev->name, fec_miiphy_read, fec_miiphy_write);
#if defined(CONFIG_CMD_MII)
-int macb_miiphy_read(char *devname, u8 phy_adr, u8 reg, u16 *value)
+int macb_miiphy_read(const char *devname, u8 phy_adr, u8 reg, u16 *value)
{
struct eth_device *dev = eth_get_dev_by_name(devname);
struct macb_device *macb = to_macb(dev);
return 0;
}
-int macb_miiphy_write(char *devname, u8 phy_adr, u8 reg, u16 value)
+int macb_miiphy_write(const char *devname, u8 phy_adr, u8 reg, u16 value)
{
struct eth_device *dev = eth_get_dev_by_name(devname);
struct macb_device *macb = to_macb(dev);
* Otherwise they hang in mii_send() !!! Sorry!
*/
-int mcffec_miiphy_read(char *devname, unsigned char addr, unsigned char reg,
+int mcffec_miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
unsigned short *value)
{
short rdreg; /* register working value */
return 0;
}
-int mcffec_miiphy_write(char *devname, unsigned char addr, unsigned char reg,
+int mcffec_miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
unsigned short value)
{
short rdreg; /* register working value */
#error "CONFIG_MII has to be defined!"
#endif
-int fec512x_miiphy_read(char *devname, u8 phyAddr, u8 regAddr, u16 * retVal);
-int fec512x_miiphy_write(char *devname, u8 phyAddr, u8 regAddr, u16 data);
+int fec512x_miiphy_read(const char *devname, u8 phyAddr, u8 regAddr, u16 * retVal);
+int fec512x_miiphy_write(const char *devname, u8 phyAddr, u8 regAddr, u16 data);
int mpc512x_fec_init_phy(struct eth_device *dev, bd_t * bis);
static uchar rx_buff[FEC_BUFFER_SIZE];
dev->send = mpc512x_fec_send;
dev->recv = mpc512x_fec_recv;
- sprintf (dev->name, "FEC ETHERNET");
+ sprintf (dev->name, "FEC");
eth_register (dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
/* MII-interface related functions */
/********************************************************************/
-int fec512x_miiphy_read (char *devname, u8 phyAddr, u8 regAddr, u16 * retVal)
+int fec512x_miiphy_read(const char *devname, u8 phyAddr, u8 regAddr, u16 *retVal)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile fec512x_t *eth = &im->fec;
}
/********************************************************************/
-int fec512x_miiphy_write (char *devname, u8 phyAddr, u8 regAddr, u16 data)
+int fec512x_miiphy_write(const char *devname, u8 phyAddr, u8 regAddr, u16 data)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile fec512x_t *eth = &im->fec;
uint8 head[16]; /* MAC header(6 + 6 + 2) + 2(aligned) */
} NBUF;
-int fec5xxx_miiphy_read(char *devname, uint8 phyAddr, uint8 regAddr, uint16 * retVal);
-int fec5xxx_miiphy_write(char *devname, uint8 phyAddr, uint8 regAddr, uint16 data);
+int fec5xxx_miiphy_read(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 *retVal);
+int fec5xxx_miiphy_write(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 data);
static int mpc5xxx_fec_init_phy(struct eth_device *dev, bd_t * bis);
/* MII-interface related functions */
/********************************************************************/
-int fec5xxx_miiphy_read(char *devname, uint8 phyAddr, uint8 regAddr, uint16 * retVal)
+int fec5xxx_miiphy_read(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 * retVal)
{
ethernet_regs *eth = (ethernet_regs *)MPC5XXX_FEC;
uint32 reg; /* convenient holder for the PHY register */
}
/********************************************************************/
-int fec5xxx_miiphy_write(char *devname, uint8 phyAddr, uint8 regAddr, uint16 data)
+int fec5xxx_miiphy_write(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 data)
{
ethernet_regs *eth = (ethernet_regs *)MPC5XXX_FEC;
uint32 reg; /* convenient holder for the PHY register */
*
* Returns 16bit phy register value, or 0xffff on error
*/
-static int smi_reg_read(char *devname, u8 phy_adr, u8 reg_ofs, u16 * data)
+static int smi_reg_read(const char *devname, u8 phy_adr, u8 reg_ofs, u16 * data)
{
struct eth_device *dev = eth_get_dev_by_name(devname);
struct mvgbe_device *dmvgbe = to_mvgbe(dev);
* Returns 0 if write succeed, -EINVAL on bad parameters
* -ETIME on timeout
*/
-static int smi_reg_write(char *devname, u8 phy_adr, u8 reg_ofs, u16 data)
+static int smi_reg_write(const char *devname, u8 phy_adr, u8 reg_ofs, u16 data)
{
struct eth_device *dev = eth_get_dev_by_name(devname);
struct mvgbe_device *dmvgbe = to_mvgbe(dev);
/**
* Read a 16-bit value from an MII register.
*/
-extern int ns7520_miiphy_read(char *devname, unsigned char const addr,
+extern int ns7520_miiphy_read(const char *devname, unsigned char const addr,
unsigned char const reg, unsigned short *const value)
{
int ret = MII_STATUS_FAILURE;
/**
* Write a 16-bit value to an MII register.
*/
-extern int ns7520_miiphy_write(char *devname, unsigned char const addr,
+extern int ns7520_miiphy_write(const char *devname, unsigned char const addr,
unsigned char const reg, unsigned short const value)
{
int ret = MII_STATUS_FAILURE;
}
}
-static inline struct bb_miiphy_bus *bb_miiphy_getbus(char *devname)
+static inline struct bb_miiphy_bus *bb_miiphy_getbus(const char *devname)
{
#ifdef CONFIG_BITBANGMII_MULTI
int i;
* Returns:
* 0 on success
*/
-int bb_miiphy_read(char *devname, unsigned char addr,
+int bb_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
short rdreg; /* register working value */
* Returns:
* 0 on success
*/
-int bb_miiphy_write (char *devname, unsigned char addr,
+int bb_miiphy_write (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
struct bb_miiphy_bus *bus;
static void adjust_link(struct eth_device *dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) \
&& !defined(BITBANGMII)
-static int tsec_miiphy_write(char *devname, unsigned char addr,
+static int tsec_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
-static int tsec_miiphy_read(char *devname, unsigned char addr,
+static int tsec_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
#endif
#ifdef CONFIG_MCAST_TFTP
* Returns:
* 0 on success
*/
-static int tsec_miiphy_read(char *devname, unsigned char addr,
+static int tsec_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
unsigned short ret;
* Returns:
* 0 on success
*/
-static int tsec_miiphy_write(char *devname, unsigned char addr,
+static int tsec_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
struct tsec_private *priv = privlist[0];
* Returns:
* The index where the device is located, -1 on error
*/
-static int uec_miiphy_find_dev_by_name(char *devname)
+static int uec_miiphy_find_dev_by_name(const char *devname)
{
int i;
* Returns:
* 0 on success
*/
-static int uec_miiphy_read(char *devname, unsigned char addr,
+static int uec_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
int devindex = 0;
* Returns:
* 0 on success
*/
-static int uec_miiphy_write(char *devname, unsigned char addr,
+static int uec_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
int devindex = 0;
uec->uec_info = uec_info;
uec->dev = dev;
- sprintf(dev->name, "FSL UEC%d", uec_info->uf_info.ucc_num);
+ sprintf(dev->name, "UEC%d", uec_info->uf_info.ucc_num);
dev->iobase = 0;
dev->priv = (void *)uec;
dev->init = uec_init;
* {name, speed, duplex},
*
* #define CONFIG_SYS_FIXED_PHY_PORTS \
- * CONFIG_SYS_FIXED_PHY_PORT("FSL UEC0",SPEED_100,DUPLEX_FULL) \
- * CONFIG_SYS_FIXED_PHY_PORT("FSL UEC2",SPEED_100,DUPLEX_HALF)
+ * CONFIG_SYS_FIXED_PHY_PORT("UEC0",SPEED_100,DUPLEX_FULL) \
+ * CONFIG_SYS_FIXED_PHY_PORT("UEC2",SPEED_100,DUPLEX_HALF)
*/
#ifndef CONFIG_FIXED_PHY
* Example board header file to define bitbang ethernet ports:
*
* #define CONFIG_SYS_BITBANG_PHY_PORT(name) name,
- * #define CONFIG_SYS_BITBANG_PHY_PORTS CONFIG_SYS_BITBANG_PHY_PORT("FSL UEC0")
+ * #define CONFIG_SYS_BITBANG_PHY_PORTS CONFIG_SYS_BITBANG_PHY_PORT("UEC0")
*/
#ifndef CONFIG_SYS_BITBANG_PHY_PORTS
#define CONFIG_SYS_BITBANG_PHY_PORTS /* default is an empty array */
* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
-#define CONFIG_SYS_FLASH_BASE 0xFFFC0000
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */
+#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE
+#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
/*
#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_ADDR 0xFFFB0000 /* Address of Environment Sector*/
+#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_SECT_SIZE 0x10000 /* see README - env sector total size */
#define CONFIG_ENV_SIZE 0x04000 /* Size of Environment */
-#define CONFIG_ENV_ADDR_REDUND 0xFFFA0000
+#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR - CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
/*
* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
-#define CONFIG_SYS_FLASH_BASE 0xFFFE0000
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_MONITOR_LEN (128 * 1024) /* Reserve 128 kB for Monitor */
+#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE
+#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
/*
* QE UEC ethernet configuration
*/
#define CONFIG_UEC_ETH
-#define CONFIG_ETHPRIME "FSL UEC0"
+#define CONFIG_ETHPRIME "UEC0"
#define CONFIG_UEC_ETH1 /* ETH3 */
* QE UEC ethernet configuration
*/
#define CONFIG_UEC_ETH
-#define CONFIG_ETHPRIME "FSL UEC0"
+#define CONFIG_ETHPRIME "UEC0"
#define CONFIG_UEC_ETH1 /* ETH3 */
* QE UEC ethernet configuration
*/
#define CONFIG_UEC_ETH
-#define CONFIG_ETHPRIME "FSL UEC0"
+#define CONFIG_ETHPRIME "UEC0"
#define CONFIG_PHY_MODE_NEED_CHANGE
#define CONFIG_UEC_ETH1 /* GETH1 */
* QE UEC ethernet configuration
*/
#define CONFIG_UEC_ETH
-#define CONFIG_ETHPRIME "FSL UEC0"
+#define CONFIG_ETHPRIME "UEC0"
#define CONFIG_UEC_ETH1 /* GETH1 */
*/
#define CONFIG_UEC_ETH
#ifndef CONFIG_TSEC_ENET
-#define CONFIG_ETHPRIME "FSL UEC0"
+#define CONFIG_ETHPRIME "UEC0"
#endif
#define CONFIG_PHY_MODE_NEED_CHANGE
#define CONFIG_eTSEC_MDIO_BUS
#define CONFIG_MIIM_ADDRESS (CONFIG_SYS_CCSRBAR + 0x82120)
#define CONFIG_UEC_ETH
-#define CONFIG_ETHPRIME "FSL UEC0"
+#define CONFIG_ETHPRIME "UEC0"
#define CONFIG_PHY_MODE_NEED_CHANGE
#define CONFIG_UEC_ETH1 /* GETH1 */
#undef CONFIG_SCC1_ENET
#define CONFIG_FEC_ENET
-/* #define CONFIG_ETHPRIME "FEC ETHERNET" */
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1
* Base addresses -- Note these are effective addresses where the
* actual resources get mapped (not physical addresses)
*----------------------------------------------------------------------*/
-#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Monitor */
+#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1)
#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserve 256 kB for malloc() */
#define CONFIG_PRAM 0 /* use pram variable to overwrite */
#define CONFIG_SYS_BOOT_BASE_ADDR 0xf0000000
#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */
#define CONFIG_SYS_FLASH_BASE 0xfc000000 /* start of FLASH */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
#define CONFIG_SYS_NAND_ADDR 0xd0000000 /* NAND Flash */
#define CONFIG_SYS_OCM_BASE 0xe0010000 /* ocm */
#define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_OCM_BASE
"fdt_addr_r=800000\0" \
"fpga=fpga loadb 0 ${fpga_addr}\0" \
"load=tftp 200000 /tftpboot/pmc440/u-boot.bin\0" \
- "update=protect off fffa0000 ffffffff;era fffa0000 ffffffff;" \
- "cp.b 200000 fffa0000 60000\0" \
+ "update=protect off fff90000 ffffffff;era fff90000 ffffffff;" \
+ "cp.b 200000 fff90000 70000\0" \
""
#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
#undef CONFIG_BOOTARGS
#define CONFIG_EXTRA_ENV_SETTINGS \
- "ethprime=FEC ETHERNET\0" \
- "ethact=FEC ETHERNET\0" \
+ "ethprime=FEC\0" \
+ "ethact=FEC\0" \
"netdev=eth0\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw " \
"nfsroot=${serverip}:${rootpath}\0" \
#define CONFIG_MII_INIT 1
#define CONFIG_NET_RETRY_COUNT 3
-#define CONFIG_ETHPRIME "FEC ETHERNET"
+#define CONFIG_ETHPRIME "FEC"
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1
#define CONFIG_SCC1_ENET
#define CONFIG_FEC_ENET
-#define CONFIG_ETHPRIME "SCC ETHERNET"
+#define CONFIG_ETHPRIME "SCC"
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1
#define CONFIG_SCC1_ENET
#define CONFIG_FEC_ENET
-#define CONFIG_ETHPRIME "SCC ETHERNET"
+#define CONFIG_ETHPRIME "SCC"
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1
#define CONFIG_SCC1_ENET
#define CONFIG_FEC_ENET
-#define CONFIG_ETHPRIME "SCC ETHERNET"
+#define CONFIG_ETHPRIME "SCC"
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1
#define CONFIG_SCC1_ENET
#define CONFIG_FEC_ENET
-#define CONFIG_ETHPRIME "SCC ETHERNET"
+#define CONFIG_ETHPRIME "SCC"
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1
#define CONFIG_NET_MULTI
#define CONFIG_SCC1_ENET
#define CONFIG_FEC_ENET
-#define CONFIG_ETHPRIME "SCC ETHERNET"
+#define CONFIG_ETHPRIME "SCC"
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1
#define CONFIG_NET_MULTI
#define CONFIG_SCC1_ENET
#define CONFIG_FEC_ENET
-#define CONFIG_ETHPRIME "SCC ETHERNET"
+#define CONFIG_ETHPRIME "SCC"
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1
#define CONFIG_SCC1_ENET
#define CONFIG_FEC_ENET
-#define CONFIG_ETHPRIME "SCC ETHERNET"
+#define CONFIG_ETHPRIME "SCC"
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1
switching to another netwok (if the
tried network is unreachable) */
-#define CONFIG_ETHPRIME "SCC ETHERNET"
+#define CONFIG_ETHPRIME "SCC"
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1
"load=tftp 200000 ${u-boot}\0" \
"update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) " FFFFFFFF;" \
"era " xstr(CONFIG_SYS_MONITOR_BASE) " FFFFFFFF;" \
- "cp.b ${fileaddr} " xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize};" \
- "setenv filesize;saveenv\0" \
+ "cp.b ${fileaddr} " xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize}" \
"upd=run load update\0" \
#define CONFIG_AMCC_DEF_ENV_NAND_UPD \
"u-boot-nand=" xstr(CONFIG_HOSTNAME) "/u-boot-nand.bin\0" \
"nload=tftp 200000 ${u-boot-nand}\0" \
- "nupdate=nand erase 0 100000;nand write 200000 0 100000;" \
- "setenv filesize;saveenv\0" \
+ "nupdate=nand erase 0 100000;nand write 200000 0 100000" \
"nupd=run nload nupdate\0"
#endif /* __AMCC_COMMON_H */
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#define CONFIG_ENV_IN_OWN_SECT 1
#define CONFIG_AUTO_COMPLETE 1
-#define CONFIG_EXTRA_ENV_SETTINGS "ethprime=FCC3 ETHERNET"
+#define CONFIG_EXTRA_ENV_SETTINGS "ethprime=FCC3"
#if defined(CONFIG_CMD_KGDB)
#undef CONFIG_KGDB_ON_SMC /* define if kgdb on SMC */
"net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw " \
"nfsroot=$(serverip):$(rootpath)\0" \
- "ethact=FEC ETHERNET\0" \
+ "ethact=FEC\0 " \
"update=prot off ff800000 ff81ffff; era ff800000 ff81ffff; " \
"cp.b 200000 ff800000 $(filesize);" \
"prot on ff800000 ff81ffff\0" \
#define CONFIG_HOSTNAME katmai
#include "amcc-common.h"
-/*
- * For booting 256K-paged Linux we should have 16MB of memory
- * for Linux initial memory map
- */
-#undef CONFIG_SYS_BOOTMAPSZ
-#define CONFIG_SYS_BOOTMAPSZ (16 << 20)
-
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#undef CONFIG_SHOW_BOOT_PROGRESS
#define CONFIG_EXTRA_ENV_SETTINGS \
CONFIG_AMCC_DEF_ENV \
CONFIG_AMCC_DEF_ENV_POWERPC \
- CONFIG_AMCC_DEF_ENV_PPC_OLD \
CONFIG_AMCC_DEF_ENV_NOR_UPD \
- "kernel_addr=fff10000\0" \
- "ramdisk_addr=fff20000\0" \
- "kozio=bootm ffc60000\0" \
+ "kernel_addr=ff000000\0" \
+ "fdt_addr=ff1e0000\0" \
+ "ramdisk_addr=ff200000\0" \
"pciconfighost=1\0" \
"pcie_mode=RP:RP:RP\0" \
""
#ifdef CONFIG_IO_MUXING
#define CONFIG_KM_DEF_ENV_IOMUX \
- "nc=setenv ethact HDLC ETHERNET \0" \
- "nce=setenv ethact SCC ETHERNET \0" \
+ "nc=setenv ethact HDLC \0" \
+ "nce=setenv ethact SCC \0" \
"stderr=serial,nc \0" \
"stdin=serial,nc \0" \
"stdout=serial,nc \0" \
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#define CONFIG_SCC3_ENET
-#define CONFIG_ETHPRIME "SCC ETHERNET"
+#define CONFIG_ETHPRIME "SCC"
#define CONFIG_HAS_ETH0
/* pass open firmware flat tree */
* QE UEC ethernet configuration
*/
#define CONFIG_UEC_ETH
-#define CONFIG_ETHPRIME "FSL UEC0"
+#define CONFIG_ETHPRIME "UEC0"
#define CONFIG_UEC_ETH1 /* GETH1 */
#define UEC_VERBOSE_DEBUG 1
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE 0xFFE00000
-#define CONFIG_SYS_MONITOR_BASE 0xFFFC0000 /* placed last 256k */
-#define CONFIG_SYS_MONITOR_LEN (224 * 1024) /* Reserve 224 KiB for Monitor */
+
+#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of U-Boot */
+#define CONFIG_SYS_MONITOR_LEN (0xFFFFFFFF - CONFIG_SYS_MONITOR_BASE + 1)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 KiB for malloc() */
/*
"nfsargs=setenv bootargs root=/dev/nfs rw " \
"nfsroot=$(serverip):$(rootpath) wdt=off\0" \
"hostname=v38b\0" \
- "ethact=FEC ETHERNET\0" \
+ "ethact=FEC\0" \
"rootpath=/opt/eldk-3.1.1/ppc_6xx\0" \
"update=prot off ff000000 ff03ffff; era ff000000 ff03ffff; " \
"cp.b 200000 ff000000 $(filesize);" \
#include <net.h>
-int miiphy_read (char *devname, unsigned char addr, unsigned char reg,
+int miiphy_read (const char *devname, unsigned char addr, unsigned char reg,
unsigned short *value);
-int miiphy_write (char *devname, unsigned char addr, unsigned char reg,
+int miiphy_write (const char *devname, unsigned char addr, unsigned char reg,
unsigned short value);
-int miiphy_info (char *devname, unsigned char addr, unsigned int *oui,
+int miiphy_info (const char *devname, unsigned char addr, unsigned int *oui,
unsigned char *model, unsigned char *rev);
-int miiphy_reset (char *devname, unsigned char addr);
-int miiphy_speed (char *devname, unsigned char addr);
-int miiphy_duplex (char *devname, unsigned char addr);
-int miiphy_is_1000base_x (char *devname, unsigned char addr);
+int miiphy_reset (const char *devname, unsigned char addr);
+int miiphy_speed (const char *devname, unsigned char addr);
+int miiphy_duplex (const char *devname, unsigned char addr);
+int miiphy_is_1000base_x (const char *devname, unsigned char addr);
#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
-int miiphy_link (char *devname, unsigned char addr);
+int miiphy_link (const char *devname, unsigned char addr);
#endif
void miiphy_init (void);
-void miiphy_register (char *devname,
- int (*read) (char *devname, unsigned char addr,
+void miiphy_register (const char *devname,
+ int (*read) (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value),
- int (*write) (char *devname, unsigned char addr,
+ int (*write) (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value));
-int miiphy_set_current_dev (char *devname);
-char *miiphy_get_current_dev (void);
+int miiphy_set_current_dev (const char *devname);
+const char *miiphy_get_current_dev (void);
void miiphy_listdev (void);
extern int bb_miiphy_buses_num;
void bb_miiphy_init (void);
-int bb_miiphy_read (char *devname, unsigned char addr,
+int bb_miiphy_read (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
-int bb_miiphy_write (char *devname, unsigned char addr,
+int bb_miiphy_write (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
#endif
extern void eth_set_current(void); /* set nterface to ethcur var */
#endif
extern struct eth_device *eth_get_dev(void); /* get the current device MAC */
-extern struct eth_device *eth_get_dev_by_name(char *devname); /* get device */
+extern struct eth_device *eth_get_dev_by_name(const char *devname);
extern struct eth_device *eth_get_dev_by_index(int index); /* get dev @ index */
extern int eth_get_dev_index (void); /* get the device index */
extern void eth_parse_enetaddr(const char *addr, uchar *enetaddr);
return eth_current;
}
-struct eth_device *eth_get_dev_by_name(char *devname)
+struct eth_device *eth_get_dev_by_name(const char *devname)
{
struct eth_device *dev, *target_dev;
projects / karo-tx-uboot.git / commitdiff