]> git.kernelconcepts.de Git - karo-tx-linux.git/commitdiff
ARM: KVM: Move GP registers into the CPU context structure
authorMarc Zyngier <marc.zyngier@arm.com>
Sun, 3 Jan 2016 11:26:01 +0000 (11:26 +0000)
committerMarc Zyngier <marc.zyngier@arm.com>
Mon, 29 Feb 2016 18:34:12 +0000 (18:34 +0000)
Continuing our rework of the CPU context, we now move the GP
registers into the CPU context structure.

Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
arch/arm/include/asm/kvm_emulate.h
arch/arm/include/asm/kvm_host.h
arch/arm/kernel/asm-offsets.c
arch/arm/kvm/emulate.c
arch/arm/kvm/guest.c
arch/arm/kvm/interrupts_head.S
arch/arm/kvm/reset.c

index 32bb52a489d0c7b3b930522580acec23afecc58d..f710616ccadcbd32032099c0bff1e5316543d97b 100644 (file)
@@ -68,12 +68,12 @@ static inline bool vcpu_mode_is_32bit(struct kvm_vcpu *vcpu)
 
 static inline unsigned long *vcpu_pc(struct kvm_vcpu *vcpu)
 {
-       return &vcpu->arch.regs.usr_regs.ARM_pc;
+       return &vcpu->arch.ctxt.gp_regs.usr_regs.ARM_pc;
 }
 
 static inline unsigned long *vcpu_cpsr(struct kvm_vcpu *vcpu)
 {
-       return &vcpu->arch.regs.usr_regs.ARM_cpsr;
+       return &vcpu->arch.ctxt.gp_regs.usr_regs.ARM_cpsr;
 }
 
 static inline void vcpu_set_thumb(struct kvm_vcpu *vcpu)
@@ -83,13 +83,13 @@ static inline void vcpu_set_thumb(struct kvm_vcpu *vcpu)
 
 static inline bool mode_has_spsr(struct kvm_vcpu *vcpu)
 {
-       unsigned long cpsr_mode = vcpu->arch.regs.usr_regs.ARM_cpsr & MODE_MASK;
+       unsigned long cpsr_mode = vcpu->arch.ctxt.gp_regs.usr_regs.ARM_cpsr & MODE_MASK;
        return (cpsr_mode > USR_MODE && cpsr_mode < SYSTEM_MODE);
 }
 
 static inline bool vcpu_mode_priv(struct kvm_vcpu *vcpu)
 {
-       unsigned long cpsr_mode = vcpu->arch.regs.usr_regs.ARM_cpsr & MODE_MASK;
+       unsigned long cpsr_mode = vcpu->arch.ctxt.gp_regs.usr_regs.ARM_cpsr & MODE_MASK;
        return cpsr_mode > USR_MODE;;
 }
 
index 4203701cc7f4671526b744eaad481a8089f0c7a5..02932ba8a653ba9c9428a2a1399432aa95e807b5 100644 (file)
@@ -89,6 +89,7 @@ struct kvm_vcpu_fault_info {
 };
 
 struct kvm_cpu_context {
+       struct kvm_regs gp_regs;
        struct vfp_hard_struct vfp;
        u32 cp15[NR_CP15_REGS];
 };
@@ -98,8 +99,6 @@ typedef struct kvm_cpu_context kvm_cpu_context_t;
 struct kvm_vcpu_arch {
        struct kvm_cpu_context ctxt;
 
-       struct kvm_regs regs;
-
        int target; /* Processor target */
        DECLARE_BITMAP(features, KVM_VCPU_MAX_FEATURES);
 
index 43f8b01072c1503d5815187fad78f87e9d3a36b6..2f3e0b064066aa9e5d8b9f4e176938c555502517 100644 (file)
@@ -176,15 +176,15 @@ int main(void)
   DEFINE(VCPU_HOST_CTXT,       offsetof(struct kvm_vcpu, arch.host_cpu_context));
   DEFINE(CPU_CTXT_VFP,         offsetof(struct kvm_cpu_context, vfp));
   DEFINE(CPU_CTXT_CP15,                offsetof(struct kvm_cpu_context, cp15));
-  DEFINE(VCPU_REGS,            offsetof(struct kvm_vcpu, arch.regs));
-  DEFINE(VCPU_USR_REGS,                offsetof(struct kvm_vcpu, arch.regs.usr_regs));
-  DEFINE(VCPU_SVC_REGS,                offsetof(struct kvm_vcpu, arch.regs.svc_regs));
-  DEFINE(VCPU_ABT_REGS,                offsetof(struct kvm_vcpu, arch.regs.abt_regs));
-  DEFINE(VCPU_UND_REGS,                offsetof(struct kvm_vcpu, arch.regs.und_regs));
-  DEFINE(VCPU_IRQ_REGS,                offsetof(struct kvm_vcpu, arch.regs.irq_regs));
-  DEFINE(VCPU_FIQ_REGS,                offsetof(struct kvm_vcpu, arch.regs.fiq_regs));
-  DEFINE(VCPU_PC,              offsetof(struct kvm_vcpu, arch.regs.usr_regs.ARM_pc));
-  DEFINE(VCPU_CPSR,            offsetof(struct kvm_vcpu, arch.regs.usr_regs.ARM_cpsr));
+  DEFINE(CPU_CTXT_GP_REGS,     offsetof(struct kvm_cpu_context, gp_regs));
+  DEFINE(GP_REGS_USR,          offsetof(struct kvm_regs, usr_regs));
+  DEFINE(GP_REGS_SVC,          offsetof(struct kvm_regs, svc_regs));
+  DEFINE(GP_REGS_ABT,          offsetof(struct kvm_regs, abt_regs));
+  DEFINE(GP_REGS_UND,          offsetof(struct kvm_regs, und_regs));
+  DEFINE(GP_REGS_IRQ,          offsetof(struct kvm_regs, irq_regs));
+  DEFINE(GP_REGS_FIQ,          offsetof(struct kvm_regs, fiq_regs));
+  DEFINE(GP_REGS_PC,           offsetof(struct kvm_regs, usr_regs.ARM_pc));
+  DEFINE(GP_REGS_CPSR,         offsetof(struct kvm_regs, usr_regs.ARM_cpsr));
   DEFINE(VCPU_HCR,             offsetof(struct kvm_vcpu, arch.hcr));
   DEFINE(VCPU_IRQ_LINES,       offsetof(struct kvm_vcpu, arch.irq_lines));
   DEFINE(VCPU_HSR,             offsetof(struct kvm_vcpu, arch.fault.hsr));
index ee161b1c66dae07e9e66451ca880b40e059853d6..a494def3f19569d4eef5bb6658f2e62d54eb1b9c 100644 (file)
@@ -112,7 +112,7 @@ static const unsigned long vcpu_reg_offsets[VCPU_NR_MODES][15] = {
  */
 unsigned long *vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num)
 {
-       unsigned long *reg_array = (unsigned long *)&vcpu->arch.regs;
+       unsigned long *reg_array = (unsigned long *)&vcpu->arch.ctxt.gp_regs;
        unsigned long mode = *vcpu_cpsr(vcpu) & MODE_MASK;
 
        switch (mode) {
@@ -147,15 +147,15 @@ unsigned long *vcpu_spsr(struct kvm_vcpu *vcpu)
        unsigned long mode = *vcpu_cpsr(vcpu) & MODE_MASK;
        switch (mode) {
        case SVC_MODE:
-               return &vcpu->arch.regs.KVM_ARM_SVC_spsr;
+               return &vcpu->arch.ctxt.gp_regs.KVM_ARM_SVC_spsr;
        case ABT_MODE:
-               return &vcpu->arch.regs.KVM_ARM_ABT_spsr;
+               return &vcpu->arch.ctxt.gp_regs.KVM_ARM_ABT_spsr;
        case UND_MODE:
-               return &vcpu->arch.regs.KVM_ARM_UND_spsr;
+               return &vcpu->arch.ctxt.gp_regs.KVM_ARM_UND_spsr;
        case IRQ_MODE:
-               return &vcpu->arch.regs.KVM_ARM_IRQ_spsr;
+               return &vcpu->arch.ctxt.gp_regs.KVM_ARM_IRQ_spsr;
        case FIQ_MODE:
-               return &vcpu->arch.regs.KVM_ARM_FIQ_spsr;
+               return &vcpu->arch.ctxt.gp_regs.KVM_ARM_FIQ_spsr;
        default:
                BUG();
        }
index 5fa69d7bae58a06ef19f7ca72fd04cf6603d6963..86e26fbd5ba348991136dbb02506b088df139934 100644 (file)
@@ -55,7 +55,7 @@ static u64 core_reg_offset_from_id(u64 id)
 static int get_core_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
 {
        u32 __user *uaddr = (u32 __user *)(long)reg->addr;
-       struct kvm_regs *regs = &vcpu->arch.regs;
+       struct kvm_regs *regs = &vcpu->arch.ctxt.gp_regs;
        u64 off;
 
        if (KVM_REG_SIZE(reg->id) != 4)
@@ -72,7 +72,7 @@ static int get_core_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
 static int set_core_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
 {
        u32 __user *uaddr = (u32 __user *)(long)reg->addr;
-       struct kvm_regs *regs = &vcpu->arch.regs;
+       struct kvm_regs *regs = &vcpu->arch.ctxt.gp_regs;
        u64 off, val;
 
        if (KVM_REG_SIZE(reg->id) != 4)
index b9d95315887748c0c296a50034b7e038771186b4..e0943cb80ab38f98f79d73d2b7bb85ae490e0e95 100644 (file)
@@ -1,6 +1,17 @@
 #include <linux/irqchip/arm-gic.h>
 #include <asm/assembler.h>
 
+/* Compat macro, until we get rid of this file entierely */
+#define VCPU_GP_REGS           (VCPU_GUEST_CTXT + CPU_CTXT_GP_REGS)
+#define VCPU_USR_REGS          (VCPU_GP_REGS + GP_REGS_USR)
+#define VCPU_SVC_REGS          (VCPU_GP_REGS + GP_REGS_SVC)
+#define VCPU_ABT_REGS          (VCPU_GP_REGS + GP_REGS_ABT)
+#define VCPU_UND_REGS          (VCPU_GP_REGS + GP_REGS_UND)
+#define VCPU_IRQ_REGS          (VCPU_GP_REGS + GP_REGS_IRQ)
+#define VCPU_FIQ_REGS          (VCPU_GP_REGS + GP_REGS_FIQ)
+#define VCPU_PC                        (VCPU_GP_REGS + GP_REGS_PC)
+#define VCPU_CPSR              (VCPU_GP_REGS + GP_REGS_CPSR)
+
 #define VCPU_USR_REG(_reg_nr)  (VCPU_USR_REGS + (_reg_nr * 4))
 #define VCPU_USR_SP            (VCPU_USR_REG(13))
 #define VCPU_USR_LR            (VCPU_USR_REG(14))
index eeb85858d6bbe6dff02ac453ea2f19a889cd8810..0048b5a62a509b4762ca5810d5a0e0b49db654de 100644 (file)
@@ -71,7 +71,7 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
        }
 
        /* Reset core registers */
-       memcpy(&vcpu->arch.regs, reset_regs, sizeof(vcpu->arch.regs));
+       memcpy(&vcpu->arch.ctxt.gp_regs, reset_regs, sizeof(vcpu->arch.ctxt.gp_regs));
 
        /* Reset CP15 registers */
        kvm_reset_coprocs(vcpu);