arm64: cpufeature: Define helpers for sys_reg id

Define helper macros to extract op0, op1, CRn, CRm & op2
for a given sys_reg id. While at it remove the explicit
masking only used for Op0.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index e156e7793a653ff0f7399be447fd1219938272fc..36ae882e2dcc8350fbf82c944b43ce8ee668876d 100644 (file)
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -32,8 +32,27 @@
  *     [11-8]  : CRm
  *     [7-5]   : Op2
  */
+#define Op0_shift      19
+#define Op0_mask       0x3
+#define Op1_shift      16
+#define Op1_mask       0x7
+#define CRn_shift      12
+#define CRn_mask       0xf
+#define CRm_shift      8
+#define CRm_mask       0xf
+#define Op2_shift      5
+#define Op2_mask       0x7
+
 #define sys_reg(op0, op1, crn, crm, op2) \
-       ((((op0)&3)<<19)|((op1)<<16)|((crn)<<12)|((crm)<<8)|((op2)<<5))
+       (((op0) << Op0_shift) | ((op1) << Op1_shift) | \
+        ((crn) << CRn_shift) | ((crm) << CRm_shift) | \
+        ((op2) << Op2_shift))
+
+#define sys_reg_Op0(id)        (((id) >> Op0_shift) & Op0_mask)
+#define sys_reg_Op1(id)        (((id) >> Op1_shift) & Op1_mask)
+#define sys_reg_CRn(id)        (((id) >> CRn_shift) & CRn_mask)
+#define sys_reg_CRm(id)        (((id) >> CRm_shift) & CRm_mask)
+#define sys_reg_Op2(id)        (((id) >> Op2_shift) & Op2_mask)
 
 #ifndef CONFIG_BROKEN_GAS_INST