Need to enable MMDC clocks to maintain the correct usecount, else
PLL2 can get disabled incorrectly thus hanging the system.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
clk_prepare_enable(clks[clks_init_on[i]]);
+ /*
+ * Make sure the MMDC clk is enabled to maintain the correct usecount
+ * and enabling/disabling of parent PLLs.
+ */
+ ret = clk_prepare_enable(clks[IMX6SL_CLK_MMDC_ROOT]);
+ if (ret)
+ pr_warn("%s: failed to enable MMDC clock %d\n",
+ __func__, ret);
+
if (IS_ENABLED(CONFIG_USB_MXS_PHY)) {
clk_prepare_enable(clks[IMX6SL_CLK_USBPHY1_GATE]);
clk_prepare_enable(clks[IMX6SL_CLK_USBPHY2_GATE]);