sh-pfc: r8a7790: Rename DU1_DOTCLKIN to DU_DOTCLKIN1

Name the DU clock input 1 consistently with clock inputs 0 and 2.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
index 763c031e818acb2d5f7cc425c3d63179493b491b..da3aaeb51f0f7a9c5e8f167bd0df6fbac20e5105 100644 (file)
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
@@ -237,7 +237,7 @@ enum {
        FN_GLO_SS_C, FN_PWM1, FN_SCIFA2_TXD_C,
        FN_STP_ISSYNC_1_B, FN_TS_SCK1_C, FN_GLO_RFON_C,
        FN_PCMOE_N, FN_PWM2, FN_PWMFSW0, FN_SCIFA2_RXD_C,
-       FN_PCMWE_N, FN_IECLK_C, FN_DU1_DOTCLKIN,
+       FN_PCMWE_N, FN_IECLK_C, FN_DU_DOTCLKIN1,
        FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, FN_VI0_CLK,
        FN_ATACS00_N, FN_AVB_RXD1,
        FN_VI0_DATA0_VI0_B0, FN_ATACS10_N, FN_AVB_RXD2,
@@ -609,7 +609,7 @@ enum {
        GLO_SS_C_MARK, PWM1_MARK, SCIFA2_TXD_C_MARK,
        STP_ISSYNC_1_B_MARK, TS_SCK1_C_MARK, GLO_RFON_C_MARK,
        PCMOE_N_MARK, PWM2_MARK, PWMFSW0_MARK, SCIFA2_RXD_C_MARK,
-       PCMWE_N_MARK, IECLK_C_MARK, DU1_DOTCLKIN_MARK,
+       PCMWE_N_MARK, IECLK_C_MARK, DU_DOTCLKIN1_MARK,
        AUDIO_CLKC_MARK, AUDIO_CLKOUT_C_MARK, VI0_CLK_MARK,
        ATACS00_N_MARK, AVB_RXD1_MARK,
        VI0_DATA0_VI0_B0_MARK, ATACS10_N_MARK, AVB_RXD2_MARK,
@@ -1214,7 +1214,7 @@ static const u16 pinmux_data[] = {
        PINMUX_IPSR_MODSEL_DATA(IP7_24_22, SCIFA2_RXD_C, SEL_SCIFA2_2),
        PINMUX_IPSR_DATA(IP7_24_22, PCMWE_N),
        PINMUX_IPSR_MODSEL_DATA(IP7_24_22, IECLK_C, SEL_IEB_2),
-       PINMUX_IPSR_DATA(IP7_26_25, DU1_DOTCLKIN),
+       PINMUX_IPSR_DATA(IP7_26_25, DU_DOTCLKIN1),
        PINMUX_IPSR_DATA(IP7_26_25, AUDIO_CLKC),
        PINMUX_IPSR_DATA(IP7_26_25, AUDIO_CLKOUT_C),
        PINMUX_IPSR_MODSEL_DATA(IP7_28_27, VI0_CLK, SEL_VI0_0),
@@ -3819,7 +3819,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
                /* IP7_28_27 [2] */
                FN_VI0_CLK, FN_ATACS00_N, FN_AVB_RXD1, 0,
                /* IP7_26_25 [2] */
-               FN_DU1_DOTCLKIN, FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, 0,
+               FN_DU_DOTCLKIN1, FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, 0,
                /* IP7_24_22 [3] */
                FN_PWM2, FN_PWMFSW0, FN_SCIFA2_RXD_C, FN_PCMWE_N, FN_IECLK_C,
                0, 0, 0,