S: Maintained
BLACKFIN ARCHITECTURE
-P: Aubrey Li
-M: aubrey.li@analog.com
-P: Bernd Schmidt
-M: bernd.schmidt@analog.com
-P: Bryan Wu
-M: bryan.wu@analog.com
-P: Grace Pan
-M: grace.pan@analog.com
-P: Michael Hennerich
-M: michael.hennerich@analog.com
-P: Mike Frysinger
-M: michael.frysinger@analog.com
-P: Jane Lv
-M: jane.lv@analog.com
-P: Jerry Zeng
-M: jerry.zeng@analog.com
-P: Jie Zhang
-M: jie.zhang@analog.com
-P: Robin Getz
-M: robin.getz@analog.com
-P: Roy Huang
-M: roy.huang@analog.com
-P: Sonic Zhang
-M: sonic.zhang@analog.com
-P: Yi Li
-M: yi.li@analog.com
-L: uclinux-dist-devel@blackfin.uclinux.org
-W: http://blackfin.uclinux.org
-S: Supported
+P: Aubrey Li
+M: aubrey.li@analog.com
+P: Bernd Schmidt
+M: bernd.schmidt@analog.com
+P: Bryan Wu
+M: bryan.wu@analog.com
+P: Grace Pan
+M: grace.pan@analog.com
+P: Marc Hoffman
+M: marc.hoffman@analog.com
+P: Michael Hennerich
+M: michael.hennerich@analog.com
+P: Mike Frysinger
+M: michael.frysinger@analog.com
+P: Jerry Zeng
+M: jerry.zeng@analog.com
+P: Jie Zhang
+M: jie.zhang@analog.com
+P: Robin Getz
+M: robin.getz@analog.com
+P: Roy Huang
+M: roy.huang@analog.com
+P: Sonic Zhang
+M: sonic.zhang@analog.com
+P: Vivi Li
+M: vivi.li@analog.com
+P: Yi Li
+M: yi.li@analog.com
+L: uclinux-dist-devel@blackfin.uclinux.org (subscribers-only)
+W: http://blackfin.uclinux.org
+S: Supported
+
+BLACKFIN RTC DRIVER
+P: Mike Frysinger
+M: michael.frysinger@analog.com
+M: vapier.adi@gmail.com
+L: uclinux-dist-devel@blackfin.uclinux.org (subscribers-only)
+W: http://blackfin.uclinux.org
+S: Supported
BLACKFIN SERIAL DRIVER
-P: Aubrey Li
-M: aubrey.li@analog.com
-L: uclinux-dist-devel@blackfin.uclinux.org
-W: http://blackfin.uclinux.org
-S: Supported
+P: Aubrey Li
+M: aubrey.li@analog.com
+L: uclinux-dist-devel@blackfin.uclinux.org (subscribers-only)
+W: http://blackfin.uclinux.org
+S: Supported
BAYCOM/HDLCDRV DRIVERS FOR AX.25
P: Thomas Sailer
.modalias = "ltv350qv",
.max_speed_hz = 16000000,
.chip_select = 1,
+ .mode = SPI_MODE_3,
},
};
up_read(&mm->mmap_sem);
if (user_mode(regs)) {
- if (exception_trace)
+ if (exception_trace && printk_ratelimit())
printk("%s%s[%d]: segfault at %08lx pc %08lx "
"sp %08lx ecr %lu\n",
is_init(tsk) ? KERN_EMERG : KERN_INFO,
default 0x08 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 2)
default 0x10 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 3)
-comment "Console UART Setup"
-
-choice
- prompt "Baud Rate"
- default BAUD_57600
-config BAUD_9600
- bool "9600"
-config BAUD_19200
- bool "19200"
-config BAUD_38400
- bool "38400"
-config BAUD_57600
- bool "57600"
-config BAUD_115200
- bool "115200"
-endchoice
-
-choice
- prompt "Parity"
- default BAUD_NO_PARITY
-config BAUD_NO_PARITY
- bool "No Parity"
-config BAUD_PARITY
- bool "Parity"
-endchoice
-
-choice
- prompt "Stop Bits"
- default BAUD_1_STOPBIT
-config BAUD_1_STOPBIT
- bool "1"
-config BAUD_2_STOPBIT
- bool "2"
-endchoice
-
endmenu
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.19.3
+# Linux kernel version: 2.6.21.3
#
# CONFIG_MMU is not set
# CONFIG_FPU is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
CONFIG_BLACKFIN=y
+CONFIG_ZONE_DMA=y
CONFIG_BFIN=y
CONFIG_SEMAPHORE_SLEEPERS=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
+# CONFIG_GENERIC_TIME is not set
CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_UCLINUX=y
CONFIG_FORCE_MAX_ZONEORDER=14
CONFIG_IRQCHIP_DEMUX_GPIO=y
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
CONFIG_LOCALVERSION_AUTO=y
CONFIG_SYSVIPC=y
# CONFIG_IPC_NS is not set
+CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_UTS_NS is not set
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
+CONFIG_SYSFS_DEPRECATED=y
# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
-CONFIG_EPOLL=y
CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3
-# CONFIG_LIMIT_PAGECACHE is not set
CONFIG_BUDDY=y
# CONFIG_NP2 is not set
CONFIG_SLAB=y
# Block layer
#
CONFIG_BLOCK=y
+# CONFIG_LBD is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
#
# IO Schedulers
# CONFIG_BF532 is not set
CONFIG_BF533=y
# CONFIG_BF534 is not set
-# CONFIG_BF535 is not set
# CONFIG_BF536 is not set
# CONFIG_BF537 is not set
# CONFIG_BF561 is not set
# CONFIG_BFIN537_BLUETECHNIX_CM is not set
# CONFIG_BFIN561_BLUETECHNIX_CM is not set
# CONFIG_BFIN561_EZKIT is not set
+# CONFIG_BFIN561_TEPLA is not set
# CONFIG_PNAV10 is not set
# CONFIG_GENERIC_BOARD is not set
CONFIG_MEM_MT48LC16M16A2TG_75=y
#
# Board customizations
#
+# CONFIG_CMDLINE_BOOL is not set
#
# Board Setup
CONFIG_MEM_ADD_WIDTH=9
CONFIG_BOOT_LOAD=0x1000
-#
-# Console UART Setup
-#
-# CONFIG_BAUD_9600 is not set
-# CONFIG_BAUD_19200 is not set
-# CONFIG_BAUD_38400 is not set
-CONFIG_BAUD_57600=y
-# CONFIG_BAUD_115200 is not set
-CONFIG_BAUD_NO_PARITY=y
-# CONFIG_BAUD_PARITY is not set
-CONFIG_BAUD_1_STOPBIT=y
-# CONFIG_BAUD_2_STOPBIT is not set
-
#
# Blackfin Kernel Optimizations
#
#
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
CONFIG_MEMCPY_L1=y
CONFIG_SYS_BFIN_SPINLOCK_L1=y
# CONFIG_IP_CHECKSUM_L1 is not set
+CONFIG_CACHELINE_ALIGNED_L1=y
# CONFIG_SYSCALL_TAB_L1 is not set
# CONFIG_CPLB_SWITCH_TAB_L1 is not set
CONFIG_RAMKERNEL=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
CONFIG_LARGE_ALLOCS=y
CONFIG_BFIN_DMA_5XX=y
# CONFIG_DMA_UNCACHED_2M is not set
# Power management options
#
CONFIG_PM=y
-CONFIG_PM_LEGACY=y
+# CONFIG_PM_LEGACY is not set
# CONFIG_PM_DEBUG is not set
# CONFIG_PM_SYSFS_DEPRECATED is not set
CONFIG_PM_WAKEUP_GPIO_BY_SIC_IWR=y
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
+CONFIG_IRDA=m
+
+#
+# IrDA protocols
+#
+CONFIG_IRLAN=m
+CONFIG_IRCOMM=m
+# CONFIG_IRDA_ULTRA is not set
+
+#
+# IrDA options
+#
+CONFIG_IRDA_CACHE_LAST_LSAP=y
+# CONFIG_IRDA_FAST_RR is not set
+# CONFIG_IRDA_DEBUG is not set
+
+#
+# Infrared-port device drivers
+#
+
+#
+# SIR device drivers
+#
+CONFIG_IRTTY_SIR=m
+
+#
+# Dongle support
+#
+# CONFIG_DONGLE is not set
+
+#
+# Old SIR device drivers
+#
+# CONFIG_IRPORT_SIR is not set
+
+#
+# Old Serial dongle support
+#
+
+#
+# FIR device drivers
+#
# CONFIG_BT is not set
# CONFIG_IEEE80211 is not set
# User Modules And Translation Layers
#
CONFIG_MTD_CHAR=m
+CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
#
# Self-contained MTD device drivers
#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
#
# Plug and Play support
#
+# CONFIG_PNPACPI is not set
#
# Block devices
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
-# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
#
# Misc devices
#
-# CONFIG_TIFM_CORE is not set
#
# ATA/ATAPI/MFM/RLL support
#
# Input device support
#
-# CONFIG_INPUT is not set
+CONFIG_INPUT=m
+# CONFIG_INPUT_FF_MEMLESS is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+CONFIG_INPUT_EVDEV=m
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
#
# Hardware I/O ports
#
# CONFIG_AD9960 is not set
# CONFIG_SPI_ADC_BF533 is not set
-# CONFIG_BF533_PFLAGS is not set
+# CONFIG_BF5xx_PFLAGS is not set
# CONFIG_BF5xx_PPIFCD is not set
# CONFIG_BF5xx_TIMERS is not set
# CONFIG_BF5xx_PPI is not set
-# CONFIG_BFIN_SPORT is not set
+CONFIG_BFIN_SPORT=y
# CONFIG_BFIN_TIMER_LATENCY is not set
+# CONFIG_AD5304 is not set
+# CONFIG_BF5xx_FBDMA is not set
# CONFIG_VT is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Watchdog Cards
#
-# CONFIG_WATCHDOG is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_BFIN_WDT=y
CONFIG_HW_RANDOM=y
# CONFIG_GEN_RTC is not set
CONFIG_BLACKFIN_DPMC=y
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
-
-#
-# Ftape, the floppy tape device driver
-#
# CONFIG_RAW_DRIVER is not set
#
#
# SPI support
#
-# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_BFIN=y
+# CONFIG_SPI_BITBANG is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_AT25 is not set
#
# Dallas's 1-wire bus
# CONFIG_HWMON_VID is not set
# CONFIG_SENSORS_ABITUGURU is not set
# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_LM70 is not set
+# CONFIG_SENSORS_PC87427 is not set
# CONFIG_SENSORS_VT1211 is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
#
# Multimedia devices
#
#
# Graphics support
#
-CONFIG_FIRMWARE_EDID=y
-# CONFIG_FB is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+# CONFIG_FB is not set
#
# Sound
#
# CONFIG_SOUND is not set
+#
+# HID Devices
+#
+CONFIG_HID=m
+# CONFIG_HID_DEBUG is not set
+
#
# USB support
#
#
# MMC/SD Card support
#
+# CONFIG_SPI_MMC is not set
# CONFIG_MMC is not set
#
#
# CONFIG_RTC_DRV_DS1553 is not set
# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_TEST is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
# CONFIG_RTC_DRV_V3020 is not set
CONFIG_RTC_DRV_BFIN=y
# DMA Devices
#
+#
+# Auxiliary Display support
+#
+
+#
+# Virtualization
+#
+
#
# PBX support
#
#
# File systems
#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-# CONFIG_EXT2_FS_POSIX_ACL is not set
-# CONFIG_EXT2_FS_SECURITY is not set
+# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_EXT4DEV_FS is not set
-CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-# CONFIG_INOTIFY is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
# CONFIG_DNOTIFY is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
-# CONFIG_JFFS_FS is not set
CONFIG_JFFS2_FS=m
CONFIG_JFFS2_FS_DEBUG=0
CONFIG_JFFS2_FS_WRITEBUFFER=y
CONFIG_SUNRPC=m
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
-# CONFIG_SMB_FS is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
#
# Native Language Support
#
-# CONFIG_NLS is not set
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Distributed Lock Manager
+#
+# CONFIG_DLM is not set
#
# Profiling support
CONFIG_ENABLE_MUST_CHECK=y
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_KERNEL is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_UNWIND_INFO is not set
-# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_SERIAL_EARLY_INIT is not set
CONFIG_DEBUG_HUNT_FOR_ZERO=y
# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
-# CONFIG_BOOTPARAM is not set
-# CONFIG_NO_KERNEL_MSG is not set
CONFIG_CPLB_INFO=y
-# CONFIG_NO_ACCESS_CHECK is not set
+CONFIG_ACCESS_CHECK=y
#
# Security options
# CONFIG_KEYS is not set
CONFIG_SECURITY=y
# CONFIG_SECURITY_NETWORK is not set
-CONFIG_SECURITY_CAPABILITIES=y
+CONFIG_SECURITY_CAPABILITIES=m
#
# Cryptographic options
#
# Library routines
#
-# CONFIG_CRC_CCITT is not set
+CONFIG_BITREVERSE=y
+CONFIG_CRC_CCITT=m
# CONFIG_CRC16 is not set
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=m
CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.20.4
+# Linux kernel version: 2.6.21.3
#
# CONFIG_MMU is not set
# CONFIG_FPU is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
CONFIG_BLACKFIN=y
+CONFIG_ZONE_DMA=y
CONFIG_BFIN=y
CONFIG_SEMAPHORE_SLEEPERS=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_LOCALVERSION_AUTO=y
CONFIG_SYSVIPC=y
# CONFIG_IPC_NS is not set
+CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_IKCONFIG is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
-CONFIG_EPOLL=y
CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3
-# CONFIG_LIMIT_PAGECACHE is not set
CONFIG_BUDDY=y
# CONFIG_NP2 is not set
CONFIG_SLAB=y
# CONFIG_BFIN537_BLUETECHNIX_CM is not set
# CONFIG_BFIN561_BLUETECHNIX_CM is not set
# CONFIG_BFIN561_EZKIT is not set
+# CONFIG_BFIN561_TEPLA is not set
# CONFIG_PNAV10 is not set
# CONFIG_GENERIC_BOARD is not set
CONFIG_MEM_MT48LC64M4A2FB_7E=y
CONFIG_BFIN_IDLE_LED_PORT=0xFFC00700
CONFIG_BFIN_IDLE_LED_DPORT=0xFFC00730
-#
-# Console UART Setup
-#
-# CONFIG_BAUD_9600 is not set
-# CONFIG_BAUD_19200 is not set
-# CONFIG_BAUD_38400 is not set
-CONFIG_BAUD_57600=y
-# CONFIG_BAUD_115200 is not set
-CONFIG_BAUD_NO_PARITY=y
-# CONFIG_BAUD_PARITY is not set
-CONFIG_BAUD_1_STOPBIT=y
-# CONFIG_BAUD_2_STOPBIT is not set
-
#
# Blackfin Kernel Optimizations
#
CONFIG_MEMCPY_L1=y
CONFIG_SYS_BFIN_SPINLOCK_L1=y
# CONFIG_IP_CHECKSUM_L1 is not set
+CONFIG_CACHELINE_ALIGNED_L1=y
# CONFIG_SYSCALL_TAB_L1 is not set
# CONFIG_CPLB_SWITCH_TAB_L1 is not set
CONFIG_RAMKERNEL=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
CONFIG_LARGE_ALLOCS=y
CONFIG_BFIN_DMA_5XX=y
# CONFIG_DMA_UNCACHED_2M is not set
# Power management options
#
CONFIG_PM=y
-CONFIG_PM_LEGACY=y
+# CONFIG_PM_LEGACY is not set
# CONFIG_PM_DEBUG is not set
# CONFIG_PM_SYSFS_DEPRECATED is not set
CONFIG_PM_WAKEUP_GPIO_BY_SIC_IWR=y
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
#
# Plug and Play support
#
+# CONFIG_PNPACPI is not set
#
# Block devices
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
-# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
#
# Misc devices
#
-# CONFIG_TIFM_CORE is not set
#
# ATA/ATAPI/MFM/RLL support
#
# CONFIG_AD9960 is not set
# CONFIG_SPI_ADC_BF533 is not set
-# CONFIG_BF533_PFLAGS is not set
+# CONFIG_BF5xx_PFLAGS is not set
# CONFIG_BF5xx_PPIFCD is not set
# CONFIG_BF5xx_TIMERS is not set
# CONFIG_BF5xx_PPI is not set
CONFIG_TWI_LCD=m
CONFIG_TWI_LCD_SLAVE_ADDR=34
# CONFIG_AD5304 is not set
+# CONFIG_BF5xx_TEA5764 is not set
+# CONFIG_BF5xx_FBDMA is not set
# CONFIG_VT is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Watchdog Cards
#
-# CONFIG_WATCHDOG is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_BFIN_WDT=y
CONFIG_HW_RANDOM=y
# CONFIG_GEN_RTC is not set
CONFIG_BLACKFIN_DPMC=y
#
# SPI Master Controller Drivers
#
+CONFIG_SPI_BFIN=y
# CONFIG_SPI_BITBANG is not set
#
# SPI Protocol Masters
#
-CONFIG_SPI_BFIN=y
+# CONFIG_SPI_AT25 is not set
#
# Dallas's 1-wire bus
# CONFIG_SENSORS_ADM1021 is not set
# CONFIG_SENSORS_ADM1025 is not set
# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
# CONFIG_SENSORS_ADM1031 is not set
# CONFIG_SENSORS_ADM9240 is not set
# CONFIG_SENSORS_ASB100 is not set
# CONFIG_SENSORS_W83627EHF is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
#
# Multimedia devices
#
#
# Graphics support
#
-CONFIG_FIRMWARE_EDID=y
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
CONFIG_FB=m
+CONFIG_FIRMWARE_EDID=y
+# CONFIG_FB_DDC is not set
CONFIG_FB_CFB_FILLRECT=m
CONFIG_FB_CFB_COPYAREA=m
CONFIG_FB_CFB_IMAGEBLIT=m
+# CONFIG_FB_SVGALIB is not set
# CONFIG_FB_MACMODES is not set
# CONFIG_FB_BACKLIGHT is not set
# CONFIG_FB_MODE_HELPERS is not set
# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
CONFIG_FB_BFIN_7171=m
CONFIG_FB_BFIN_7393=m
CONFIG_NTSC=y
# Logo configuration
#
# CONFIG_LOGO is not set
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Sound
# CONFIG_SND_SERIAL_U16550 is not set
# CONFIG_SND_MPU401 is not set
+#
+# ALSA Blackfin devices
+#
+# CONFIG_SND_BLACKFIN_AD1836 is not set
+# CONFIG_SND_BLACKFIN_AD1981B is not set
+# CONFIG_SND_BFIN_AD73311 is not set
+
+#
+# SoC audio support
+#
+# CONFIG_SND_SOC is not set
+
#
# Open Sound System
#
# HID Devices
#
CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
#
# USB support
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_PCF8563 is not set
-# CONFIG_RTC_DRV_PCF8583 is not set
# CONFIG_RTC_DRV_RS5C348 is not set
# CONFIG_RTC_DRV_RS5C372 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# DMA Devices
#
+#
+# Auxiliary Display support
+#
+
#
# Virtualization
#
#
# File systems
#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-# CONFIG_EXT2_FS_POSIX_ACL is not set
-# CONFIG_EXT2_FS_SECURITY is not set
+# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_EXT4DEV_FS is not set
-CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
+# CONFIG_DNOTIFY is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
# CONFIG_KEYS is not set
CONFIG_SECURITY=y
# CONFIG_SECURITY_NETWORK is not set
-CONFIG_SECURITY_CAPABILITIES=y
+CONFIG_SECURITY_CAPABILITIES=m
#
# Cryptographic options
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=m
CONFIG_PLIST=y
-CONFIG_IOMAP_COPY=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.20.4
+# Linux kernel version: 2.6.21.3
#
# CONFIG_MMU is not set
# CONFIG_FPU is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
CONFIG_BLACKFIN=y
+CONFIG_ZONE_DMA=y
CONFIG_BFIN=y
CONFIG_SEMAPHORE_SLEEPERS=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_LOCALVERSION_AUTO=y
CONFIG_SYSVIPC=y
# CONFIG_IPC_NS is not set
+CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_IKCONFIG is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
-CONFIG_EPOLL=y
CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3
-# CONFIG_LIMIT_PAGECACHE is not set
CONFIG_BUDDY=y
# CONFIG_NP2 is not set
CONFIG_SLAB=y
# CONFIG_BFIN537_BLUETECHNIX_CM is not set
# CONFIG_BFIN561_BLUETECHNIX_CM is not set
# CONFIG_BFIN561_EZKIT is not set
+# CONFIG_BFIN561_TEPLA is not set
# CONFIG_PNAV10 is not set
# CONFIG_GENERIC_BOARD is not set
CONFIG_MEM_MT48LC32M8A2_75=y
CONFIG_MEM_ADD_WIDTH=10
CONFIG_BOOT_LOAD=0x1000
-#
-# Console UART Setup
-#
-# CONFIG_BAUD_9600 is not set
-# CONFIG_BAUD_19200 is not set
-# CONFIG_BAUD_38400 is not set
-CONFIG_BAUD_57600=y
-# CONFIG_BAUD_115200 is not set
-CONFIG_BAUD_NO_PARITY=y
-# CONFIG_BAUD_PARITY is not set
-CONFIG_BAUD_1_STOPBIT=y
-# CONFIG_BAUD_2_STOPBIT is not set
-
#
# Blackfin Kernel Optimizations
#
CONFIG_MEMCPY_L1=y
CONFIG_SYS_BFIN_SPINLOCK_L1=y
# CONFIG_IP_CHECKSUM_L1 is not set
+CONFIG_CACHELINE_ALIGNED_L1=y
# CONFIG_SYSCALL_TAB_L1 is not set
# CONFIG_CPLB_SWITCH_TAB_L1 is not set
CONFIG_RAMKERNEL=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
CONFIG_LARGE_ALLOCS=y
CONFIG_BFIN_DMA_5XX=y
# CONFIG_DMA_UNCACHED_2M is not set
# Power management options
#
CONFIG_PM=y
-CONFIG_PM_LEGACY=y
+# CONFIG_PM_LEGACY is not set
# CONFIG_PM_DEBUG is not set
# CONFIG_PM_SYSFS_DEPRECATED is not set
CONFIG_PM_WAKEUP_GPIO_BY_SIC_IWR=y
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
#
# Plug and Play support
#
+# CONFIG_PNPACPI is not set
#
# Block devices
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
-# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
#
# Misc devices
#
-# CONFIG_TIFM_CORE is not set
#
# ATA/ATAPI/MFM/RLL support
#
# CONFIG_AD9960 is not set
# CONFIG_SPI_ADC_BF533 is not set
-# CONFIG_BF533_PFLAGS is not set
+# CONFIG_BF5xx_PFLAGS is not set
# CONFIG_BF5xx_PPIFCD is not set
# CONFIG_BF5xx_TIMERS is not set
# CONFIG_BF5xx_PPI is not set
CONFIG_TWI_LCD=m
CONFIG_TWI_LCD_SLAVE_ADDR=34
# CONFIG_AD5304 is not set
+# CONFIG_BF5xx_TEA5764 is not set
+# CONFIG_BF5xx_FBDMA is not set
# CONFIG_VT is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Watchdog Cards
#
-# CONFIG_WATCHDOG is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_BFIN_WDT=y
CONFIG_HW_RANDOM=y
# CONFIG_GEN_RTC is not set
CONFIG_BLACKFIN_DPMC=y
#
# SPI Master Controller Drivers
#
+CONFIG_SPI_BFIN=y
# CONFIG_SPI_BITBANG is not set
#
# SPI Protocol Masters
#
-CONFIG_SPI_BFIN=y
+# CONFIG_SPI_AT25 is not set
#
# Dallas's 1-wire bus
# CONFIG_SENSORS_ADM1021 is not set
# CONFIG_SENSORS_ADM1025 is not set
# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
# CONFIG_SENSORS_ADM1031 is not set
# CONFIG_SENSORS_ADM9240 is not set
# CONFIG_SENSORS_ASB100 is not set
# CONFIG_SENSORS_W83627EHF is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
#
# Multimedia devices
#
#
# Graphics support
#
-CONFIG_FIRMWARE_EDID=y
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_BACKLIGHT_CLASS_DEVICE=m
+CONFIG_LCD_CLASS_DEVICE=m
CONFIG_FB=m
+CONFIG_FIRMWARE_EDID=y
+# CONFIG_FB_DDC is not set
CONFIG_FB_CFB_FILLRECT=m
CONFIG_FB_CFB_COPYAREA=m
CONFIG_FB_CFB_IMAGEBLIT=m
+# CONFIG_FB_SVGALIB is not set
# CONFIG_FB_MACMODES is not set
# CONFIG_FB_BACKLIGHT is not set
# CONFIG_FB_MODE_HELPERS is not set
# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
CONFIG_FB_BFIN_7171=m
CONFIG_FB_BFIN_7393=m
CONFIG_NTSC=y
# Logo configuration
#
# CONFIG_LOGO is not set
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=m
-CONFIG_BACKLIGHT_DEVICE=y
-CONFIG_LCD_CLASS_DEVICE=m
-CONFIG_LCD_DEVICE=y
#
# Sound
# CONFIG_SND_SERIAL_U16550 is not set
# CONFIG_SND_MPU401 is not set
+#
+# ALSA Blackfin devices
+#
+# CONFIG_SND_BLACKFIN_AD1836 is not set
+# CONFIG_SND_BLACKFIN_AD1981B is not set
+# CONFIG_SND_BFIN_AD73311 is not set
+
+#
+# SoC audio support
+#
+# CONFIG_SND_SOC is not set
+
#
# Open Sound System
#
# HID Devices
#
CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
#
# USB support
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_PCF8563 is not set
-# CONFIG_RTC_DRV_PCF8583 is not set
# CONFIG_RTC_DRV_RS5C348 is not set
# CONFIG_RTC_DRV_RS5C372 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# DMA Devices
#
+#
+# Auxiliary Display support
+#
+
#
# Virtualization
#
#
# File systems
#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-# CONFIG_EXT2_FS_POSIX_ACL is not set
-# CONFIG_EXT2_FS_SECURITY is not set
+# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_EXT4DEV_FS is not set
-CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
+# CONFIG_DNOTIFY is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
# CONFIG_KEYS is not set
CONFIG_SECURITY=y
# CONFIG_SECURITY_NETWORK is not set
-CONFIG_SECURITY_CAPABILITIES=y
+CONFIG_SECURITY_CAPABILITIES=m
#
# Cryptographic options
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=m
CONFIG_PLIST=y
-CONFIG_IOMAP_COPY=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.19.3
+# Linux kernel version: 2.6.21.3
#
# CONFIG_MMU is not set
# CONFIG_FPU is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
CONFIG_BLACKFIN=y
+CONFIG_ZONE_DMA=y
CONFIG_BFIN=y
CONFIG_SEMAPHORE_SLEEPERS=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
+# CONFIG_GENERIC_TIME is not set
CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_UCLINUX=y
CONFIG_FORCE_MAX_ZONEORDER=14
CONFIG_IRQCHIP_DEMUX_GPIO=y
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
CONFIG_LOCALVERSION_AUTO=y
CONFIG_SYSVIPC=y
# CONFIG_IPC_NS is not set
+CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_UTS_NS is not set
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
+CONFIG_SYSFS_DEPRECATED=y
# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
CONFIG_EMBEDDED=y
-# CONFIG_UID16 is not set
+CONFIG_UID16=y
CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
-CONFIG_EPOLL=y
CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3
-# CONFIG_LIMIT_PAGECACHE is not set
CONFIG_BUDDY=y
# CONFIG_NP2 is not set
CONFIG_SLAB=y
# Block layer
#
CONFIG_BLOCK=y
+# CONFIG_LBD is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
#
# IO Schedulers
# CONFIG_BF532 is not set
# CONFIG_BF533 is not set
# CONFIG_BF534 is not set
-# CONFIG_BF535 is not set
# CONFIG_BF536 is not set
# CONFIG_BF537 is not set
CONFIG_BF561=y
# CONFIG_BFIN537_BLUETECHNIX_CM is not set
# CONFIG_BFIN561_BLUETECHNIX_CM is not set
CONFIG_BFIN561_EZKIT=y
+# CONFIG_BFIN561_TEPLA is not set
# CONFIG_PNAV10 is not set
# CONFIG_GENERIC_BOARD is not set
CONFIG_MEM_MT48LC16M16A2TG_75=y
#
# Board customizations
#
+# CONFIG_CMDLINE_BOOL is not set
#
# Board Setup
CONFIG_MEM_ADD_WIDTH=9
CONFIG_BOOT_LOAD=0x1000
-#
-# Console UART Setup
-#
-# CONFIG_BAUD_9600 is not set
-# CONFIG_BAUD_19200 is not set
-# CONFIG_BAUD_38400 is not set
-CONFIG_BAUD_57600=y
-# CONFIG_BAUD_115200 is not set
-CONFIG_BAUD_NO_PARITY=y
-# CONFIG_BAUD_PARITY is not set
-CONFIG_BAUD_1_STOPBIT=y
-# CONFIG_BAUD_2_STOPBIT is not set
-
#
# Blackfin Kernel Optimizations
#
#
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
CONFIG_MEMCPY_L1=y
CONFIG_SYS_BFIN_SPINLOCK_L1=y
# CONFIG_IP_CHECKSUM_L1 is not set
+CONFIG_CACHELINE_ALIGNED_L1=y
# CONFIG_SYSCALL_TAB_L1 is not set
# CONFIG_CPLB_SWITCH_TAB_L1 is not set
CONFIG_RAMKERNEL=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
CONFIG_LARGE_ALLOCS=y
CONFIG_BFIN_DMA_5XX=y
# CONFIG_DMA_UNCACHED_2M is not set
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
+CONFIG_IRDA=m
+
+#
+# IrDA protocols
+#
+CONFIG_IRLAN=m
+CONFIG_IRCOMM=m
+# CONFIG_IRDA_ULTRA is not set
+
+#
+# IrDA options
+#
+CONFIG_IRDA_CACHE_LAST_LSAP=y
+# CONFIG_IRDA_FAST_RR is not set
+# CONFIG_IRDA_DEBUG is not set
+
+#
+# Infrared-port device drivers
+#
+
+#
+# SIR device drivers
+#
+CONFIG_IRTTY_SIR=m
+
+#
+# Dongle support
+#
+# CONFIG_DONGLE is not set
+
+#
+# Old SIR device drivers
+#
+# CONFIG_IRPORT_SIR is not set
+
+#
+# Old Serial dongle support
+#
+
+#
+# FIR device drivers
+#
# CONFIG_BT is not set
# CONFIG_IEEE80211 is not set
# User Modules And Translation Layers
#
CONFIG_MTD_CHAR=m
+CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
#
# Self-contained MTD device drivers
#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
#
# Plug and Play support
#
+# CONFIG_PNPACPI is not set
#
# Block devices
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
-# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
#
# Misc devices
#
-# CONFIG_TIFM_CORE is not set
#
# ATA/ATAPI/MFM/RLL support
#
# Input device support
#
-# CONFIG_INPUT is not set
+CONFIG_INPUT=m
+# CONFIG_INPUT_FF_MEMLESS is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+CONFIG_INPUT_EVDEV=m
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
#
# Hardware I/O ports
#
# CONFIG_AD9960 is not set
# CONFIG_SPI_ADC_BF533 is not set
-# CONFIG_BF533_PFLAGS is not set
+# CONFIG_BF5xx_PFLAGS is not set
# CONFIG_BF5xx_PPIFCD is not set
# CONFIG_BF5xx_TIMERS is not set
# CONFIG_BF5xx_PPI is not set
# CONFIG_BFIN_SPORT is not set
# CONFIG_BFIN_TIMER_LATENCY is not set
+# CONFIG_AD5304 is not set
+# CONFIG_BF5xx_FBDMA is not set
# CONFIG_VT is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Watchdog Cards
#
-# CONFIG_WATCHDOG is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_BFIN_WDT=y
CONFIG_HW_RANDOM=y
# CONFIG_GEN_RTC is not set
# CONFIG_BLACKFIN_DPMC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
-
-#
-# Ftape, the floppy tape device driver
-#
# CONFIG_RAW_DRIVER is not set
#
#
# SPI support
#
-# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_BFIN=y
+# CONFIG_SPI_BITBANG is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_AT25 is not set
#
# Dallas's 1-wire bus
# CONFIG_HWMON_VID is not set
# CONFIG_SENSORS_ABITUGURU is not set
# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_LM70 is not set
+# CONFIG_SENSORS_PC87427 is not set
# CONFIG_SENSORS_VT1211 is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
#
# Multimedia devices
#
#
# Graphics support
#
-CONFIG_FIRMWARE_EDID=y
-# CONFIG_FB is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+# CONFIG_FB is not set
#
# Sound
#
# CONFIG_SOUND is not set
+#
+# HID Devices
+#
+CONFIG_HID=m
+# CONFIG_HID_DEBUG is not set
+
#
# USB support
#
#
# MMC/SD Card support
#
+# CONFIG_SPI_MMC is not set
# CONFIG_MMC is not set
#
# DMA Devices
#
+#
+# Auxiliary Display support
+#
+
+#
+# Virtualization
+#
+
#
# PBX support
#
#
# File systems
#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-# CONFIG_EXT2_FS_POSIX_ACL is not set
-# CONFIG_EXT2_FS_SECURITY is not set
+# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_EXT4DEV_FS is not set
-CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
+# CONFIG_DNOTIFY is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
-# CONFIG_JFFS_FS is not set
CONFIG_JFFS2_FS=m
CONFIG_JFFS2_FS_DEBUG=0
CONFIG_JFFS2_FS_WRITEBUFFER=y
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set
+#
+# Distributed Lock Manager
+#
+# CONFIG_DLM is not set
+
#
# Profiling support
#
CONFIG_ENABLE_MUST_CHECK=y
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_KERNEL is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_UNWIND_INFO is not set
-# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_SERIAL_EARLY_INIT is not set
CONFIG_DEBUG_HUNT_FOR_ZERO=y
# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
# CONFIG_DUAL_CORE_TEST_MODULE is not set
-# CONFIG_BOOTPARAM is not set
-# CONFIG_NO_KERNEL_MSG is not set
CONFIG_CPLB_INFO=y
-# CONFIG_NO_ACCESS_CHECK is not set
+CONFIG_ACCESS_CHECK=y
#
# Security options
# CONFIG_KEYS is not set
CONFIG_SECURITY=y
# CONFIG_SECURITY_NETWORK is not set
-CONFIG_SECURITY_CAPABILITIES=y
+CONFIG_SECURITY_CAPABILITIES=m
#
# Cryptographic options
#
# Library routines
#
-# CONFIG_CRC_CCITT is not set
+CONFIG_BITREVERSE=y
+CONFIG_CRC_CCITT=m
# CONFIG_CRC16 is not set
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=m
CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.19.3
+# Linux kernel version: 2.6.21.3
#
# CONFIG_MMU is not set
# CONFIG_FPU is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
CONFIG_BLACKFIN=y
+CONFIG_ZONE_DMA=y
CONFIG_BFIN=y
CONFIG_SEMAPHORE_SLEEPERS=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
+# CONFIG_GENERIC_TIME is not set
CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_UCLINUX=y
CONFIG_FORCE_MAX_ZONEORDER=14
CONFIG_IRQCHIP_DEMUX_GPIO=y
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
CONFIG_LOCALVERSION_AUTO=y
CONFIG_SYSVIPC=y
# CONFIG_IPC_NS is not set
+CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_UTS_NS is not set
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
+CONFIG_SYSFS_DEPRECATED=y
# CONFIG_RELAY is not set
-CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
CONFIG_EMBEDDED=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
-CONFIG_EPOLL=y
CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=9
-# CONFIG_LIMIT_PAGECACHE is not set
CONFIG_BUDDY=y
# CONFIG_NP2 is not set
CONFIG_SLAB=y
# Block layer
#
CONFIG_BLOCK=y
+# CONFIG_LBD is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
#
# IO Schedulers
# CONFIG_BF532 is not set
# CONFIG_BF533 is not set
# CONFIG_BF534 is not set
-# CONFIG_BF535 is not set
# CONFIG_BF536 is not set
CONFIG_BF537=y
# CONFIG_BF561 is not set
# CONFIG_BFIN537_BLUETECHNIX_CM is not set
# CONFIG_BFIN561_BLUETECHNIX_CM is not set
# CONFIG_BFIN561_EZKIT is not set
+# CONFIG_BFIN561_TEPLA is not set
CONFIG_PNAV10=y
# CONFIG_GENERIC_BOARD is not set
CONFIG_MEM_MT48LC32M8A2_75=y
#
# Board customizations
#
+# CONFIG_CMDLINE_BOOL is not set
#
# Board Setup
CONFIG_MEM_ADD_WIDTH=10
CONFIG_BOOT_LOAD=0x1000
-#
-# Console UART Setup
-#
-# CONFIG_BAUD_9600 is not set
-# CONFIG_BAUD_19200 is not set
-# CONFIG_BAUD_38400 is not set
-# CONFIG_BAUD_57600 is not set
-CONFIG_BAUD_115200=y
-CONFIG_BAUD_NO_PARITY=y
-# CONFIG_BAUD_PARITY is not set
-CONFIG_BAUD_1_STOPBIT=y
-# CONFIG_BAUD_2_STOPBIT is not set
-
#
# Blackfin Kernel Optimizations
#
#
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
CONFIG_MEMCPY_L1=y
CONFIG_SYS_BFIN_SPINLOCK_L1=y
CONFIG_IP_CHECKSUM_L1=y
+CONFIG_CACHELINE_ALIGNED_L1=y
CONFIG_SYSCALL_TAB_L1=y
CONFIG_CPLB_SWITCH_TAB_L1=y
CONFIG_RAMKERNEL=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
CONFIG_LARGE_ALLOCS=y
CONFIG_BFIN_DMA_5XX=y
# CONFIG_DMA_UNCACHED_2M is not set
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
# User Modules And Translation Layers
#
CONFIG_MTD_CHAR=m
+CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
#
# Plug and Play support
#
+# CONFIG_PNPACPI is not set
#
# Block devices
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
-# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
#
# Misc devices
#
-# CONFIG_TIFM_CORE is not set
#
# ATA/ATAPI/MFM/RLL support
# CONFIG_TOUCHSCREEN_PENMOUNT is not set
# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_UCB1400 is not set
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=y
# CONFIG_BF53X_PFBUTTONS is not set
#
# CONFIG_AD9960 is not set
# CONFIG_SPI_ADC_BF533 is not set
-# CONFIG_BF533_PFLAGS is not set
+# CONFIG_BF5xx_PFLAGS is not set
# CONFIG_BF5xx_PPIFCD is not set
# CONFIG_BF5xx_TIMERS is not set
# CONFIG_BF5xx_PPI is not set
CONFIG_TWI_LCD=m
CONFIG_TWI_LCD_SLAVE_ADDR=34
# CONFIG_AD5304 is not set
+# CONFIG_BF5xx_TEA5764 is not set
+# CONFIG_BF5xx_FBDMA is not set
# CONFIG_VT is not set
# CONFIG_SERIAL_NONSTANDARD is not set
CONFIG_BLACKFIN_DPMC=y
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
-
-#
-# Ftape, the floppy tape device driver
-#
# CONFIG_RAW_DRIVER is not set
#
#
# I2C Hardware Bus support
#
-# CONFIG_I2C_BFIN_GPIO is not set
-CONFIG_I2C_BFIN_TWI=y
-CONFIG_TWICLK_KHZ=50
+# CONFIG_I2C_BLACKFIN_GPIO is not set
+CONFIG_I2C_BLACKFIN_TWI=y
+CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=50
# CONFIG_I2C_OCORES is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_STUB is not set
#
# SPI Master Controller Drivers
#
-# CONFIG_SPI_BITBANG is not set
CONFIG_SPI_BFIN=y
+# CONFIG_SPI_BITBANG is not set
#
# SPI Protocol Masters
#
+# CONFIG_SPI_AT25 is not set
#
# Dallas's 1-wire bus
# CONFIG_SENSORS_ADM1021 is not set
# CONFIG_SENSORS_ADM1025 is not set
# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
# CONFIG_SENSORS_ADM1031 is not set
# CONFIG_SENSORS_ADM9240 is not set
# CONFIG_SENSORS_ASB100 is not set
# CONFIG_SENSORS_LM92 is not set
# CONFIG_SENSORS_MAX1619 is not set
# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
# CONFIG_SENSORS_SMSC47M1 is not set
# CONFIG_SENSORS_SMSC47M192 is not set
# CONFIG_SENSORS_SMSC47B397 is not set
# CONFIG_SENSORS_W83781D is not set
# CONFIG_SENSORS_W83791D is not set
# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
# CONFIG_SENSORS_W83L785TS is not set
# CONFIG_SENSORS_W83627HF is not set
# CONFIG_SENSORS_W83627EHF is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
#
# Multimedia devices
#
#
# Graphics support
#
-CONFIG_FIRMWARE_EDID=y
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_LCD_CLASS_DEVICE=y
CONFIG_FB=y
+CONFIG_FIRMWARE_EDID=y
+# CONFIG_FB_DDC is not set
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_SVGALIB is not set
# CONFIG_FB_MACMODES is not set
# CONFIG_FB_BACKLIGHT is not set
# CONFIG_FB_MODE_HELPERS is not set
# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
# CONFIG_FB_BFIN_7171 is not set
# CONFIG_FB_BFIN_7393 is not set
CONFIG_FB_BF537_LQ035=y
# Logo configuration
#
# CONFIG_LOGO is not set
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_DEVICE=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_LCD_DEVICE=y
#
# Sound
CONFIG_SND_BLACKFIN_AD1981B=m
# CONFIG_SND_BFIN_AD73311 is not set
+#
+# SoC audio support
+#
+# CONFIG_SND_SOC is not set
+
#
# Open Sound System
#
CONFIG_SOUND_PRIME=y
-CONFIG_OSS_OBSOLETE_DRIVER=y
+# CONFIG_OBSOLETE_OSS is not set
# CONFIG_SOUND_MSNDCLAS is not set
# CONFIG_SOUND_MSNDPIN is not set
+#
+# HID Devices
+#
+# CONFIG_HID is not set
+
#
# USB support
#
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_PCF8563 is not set
-# CONFIG_RTC_DRV_PCF8583 is not set
# CONFIG_RTC_DRV_RS5C348 is not set
# CONFIG_RTC_DRV_RS5C372 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# DMA Devices
#
+#
+# Auxiliary Display support
+#
+
+#
+# Virtualization
+#
+
#
# PBX support
#
# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
-# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set
+#
+# Distributed Lock Manager
+#
+# CONFIG_DLM is not set
+
#
# Profiling support
#
CONFIG_ENABLE_MUST_CHECK=y
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_KERNEL is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_UNWIND_INFO is not set
-# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_SERIAL_EARLY_INIT is not set
# CONFIG_DEBUG_HUNT_FOR_ZERO is not set
# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
-# CONFIG_BOOTPARAM is not set
-# CONFIG_NO_KERNEL_MSG is not set
# CONFIG_CPLB_INFO is not set
-# CONFIG_NO_ACCESS_CHECK is not set
+# CONFIG_ACCESS_CHECK is not set
#
# Security options
#
# Library routines
#
+CONFIG_BITREVERSE=y
CONFIG_CRC_CCITT=m
# CONFIG_CRC16 is not set
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.20.4
-#
-# CONFIG_MMU is not set
-# CONFIG_FPU is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
-CONFIG_BLACKFIN=y
-CONFIG_BFIN=y
-CONFIG_SEMAPHORE_SLEEPERS=y
-CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_HWEIGHT=y
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_GENERIC_IRQ_PROBE=y
-# CONFIG_GENERIC_TIME is not set
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_FORCE_MAX_ZONEORDER=14
-CONFIG_IRQCHIP_DEMUX_GPIO=y
-CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_BROKEN_ON_SMP=y
-CONFIG_INIT_ENV_ARG_LIMIT=32
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_LOCALVERSION_AUTO=y
-CONFIG_SYSVIPC=y
-# CONFIG_IPC_NS is not set
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-# CONFIG_TASKSTATS is not set
-# CONFIG_UTS_NS is not set
-# CONFIG_AUDIT is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_SYSFS_DEPRECATED=y
-# CONFIG_RELAY is not set
-CONFIG_INITRAMFS_SOURCE=""
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_SYSCTL=y
-CONFIG_EMBEDDED=y
-CONFIG_UID16=y
-CONFIG_SYSCTL_SYSCALL=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_HOTPLUG=y
-CONFIG_PRINTK=y
-CONFIG_BUG=y
-CONFIG_ELF_CORE=y
-CONFIG_BASE_FULL=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3
-# CONFIG_LIMIT_PAGECACHE is not set
-CONFIG_BUDDY=y
-# CONFIG_NP2 is not set
-CONFIG_SLAB=y
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_RT_MUTEXES=y
-CONFIG_TINY_SHMEM=y
-CONFIG_BASE_SMALL=0
-# CONFIG_SLOB is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-# CONFIG_MODVERSIONS is not set
-# CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
-
-#
-# Block layer
-#
-CONFIG_BLOCK=y
-# CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-# CONFIG_IOSCHED_DEADLINE is not set
-CONFIG_IOSCHED_CFQ=y
-CONFIG_DEFAULT_AS=y
-# CONFIG_DEFAULT_DEADLINE is not set
-# CONFIG_DEFAULT_CFQ is not set
-# CONFIG_DEFAULT_NOOP is not set
-CONFIG_DEFAULT_IOSCHED="anticipatory"
-# CONFIG_PREEMPT_NONE is not set
-CONFIG_PREEMPT_VOLUNTARY=y
-# CONFIG_PREEMPT is not set
-
-#
-# Blackfin Processor Options
-#
-
-#
-# Processor and Board Settings
-#
-# CONFIG_BF531 is not set
-# CONFIG_BF532 is not set
-# CONFIG_BF533 is not set
-# CONFIG_BF534 is not set
-# CONFIG_BF536 is not set
-CONFIG_BF537=y
-# CONFIG_BF561 is not set
-CONFIG_BF_REV_0_2=y
-# CONFIG_BF_REV_0_3 is not set
-# CONFIG_BF_REV_0_4 is not set
-# CONFIG_BF_REV_0_5 is not set
-CONFIG_BFIN_SINGLE_CORE=y
-# CONFIG_BFIN533_EZKIT is not set
-# CONFIG_BFIN533_STAMP is not set
-CONFIG_BFIN537_STAMP=y
-# CONFIG_BFIN533_BLUETECHNIX_CM is not set
-# CONFIG_BFIN537_BLUETECHNIX_CM is not set
-# CONFIG_BFIN561_BLUETECHNIX_CM is not set
-# CONFIG_BFIN561_EZKIT is not set
-# CONFIG_PNAV10 is not set
-# CONFIG_GENERIC_BOARD is not set
-CONFIG_MEM_MT48LC32M8A2_75=y
-CONFIG_IRQ_PLL_WAKEUP=7
-
-#
-# BF537 Specific Configuration
-#
-
-#
-# PORT F/G Selection
-#
-CONFIG_BF537_PORT_F=y
-# CONFIG_BF537_PORT_G is not set
-# CONFIG_BF537_PORT_H is not set
-
-#
-# Interrupt Priority Assignment
-#
-
-#
-# Priority
-#
-CONFIG_IRQ_DMA_ERROR=7
-CONFIG_IRQ_ERROR=7
-CONFIG_IRQ_RTC=8
-CONFIG_IRQ_PPI=8
-CONFIG_IRQ_SPORT0_RX=9
-CONFIG_IRQ_SPORT0_TX=9
-CONFIG_IRQ_SPORT1_RX=9
-CONFIG_IRQ_SPORT1_TX=9
-CONFIG_IRQ_TWI=10
-CONFIG_IRQ_SPI=10
-CONFIG_IRQ_UART0_RX=10
-CONFIG_IRQ_UART0_TX=10
-CONFIG_IRQ_UART1_RX=10
-CONFIG_IRQ_UART1_TX=10
-CONFIG_IRQ_CAN_RX=11
-CONFIG_IRQ_CAN_TX=11
-CONFIG_IRQ_MAC_RX=11
-CONFIG_IRQ_MAC_TX=11
-CONFIG_IRQ_TMR0=12
-CONFIG_IRQ_TMR1=12
-CONFIG_IRQ_TMR2=12
-CONFIG_IRQ_TMR3=12
-CONFIG_IRQ_TMR4=12
-CONFIG_IRQ_TMR5=12
-CONFIG_IRQ_TMR6=12
-CONFIG_IRQ_TMR7=12
-CONFIG_IRQ_PROG_INTA=12
-CONFIG_IRQ_PORTG_INTB=12
-CONFIG_IRQ_MEM_DMA0=13
-CONFIG_IRQ_MEM_DMA1=13
-CONFIG_IRQ_WATCH=13
-
-#
-# Board customizations
-#
-# CONFIG_CMDLINE_BOOL is not set
-
-#
-# Board Setup
-#
-CONFIG_CLKIN_HZ=25000000
-CONFIG_MEM_SIZE=64
-CONFIG_MEM_ADD_WIDTH=10
-CONFIG_BOOT_LOAD=0x1000
-
-#
-# Console UART Setup
-#
-# CONFIG_BAUD_9600 is not set
-# CONFIG_BAUD_19200 is not set
-# CONFIG_BAUD_38400 is not set
-CONFIG_BAUD_57600=y
-# CONFIG_BAUD_115200 is not set
-CONFIG_BAUD_NO_PARITY=y
-# CONFIG_BAUD_PARITY is not set
-CONFIG_BAUD_1_STOPBIT=y
-# CONFIG_BAUD_2_STOPBIT is not set
-
-#
-# Blackfin Kernel Optimizations
-#
-
-#
-# Timer Tick
-#
-# CONFIG_HZ_100 is not set
-CONFIG_HZ_250=y
-# CONFIG_HZ_300 is not set
-# CONFIG_HZ_1000 is not set
-CONFIG_HZ=250
-
-#
-# Memory Optimizations
-#
-CONFIG_I_ENTRY_L1=y
-CONFIG_EXCPT_IRQ_SYSC_L1=y
-CONFIG_DO_IRQ_L1=y
-CONFIG_CORE_TIMER_IRQ_L1=y
-CONFIG_IDLE_L1=y
-CONFIG_SCHEDULE_L1=y
-CONFIG_ARITHMETIC_OPS_L1=y
-CONFIG_ACCESS_OK_L1=y
-CONFIG_MEMSET_L1=y
-CONFIG_MEMCPY_L1=y
-CONFIG_SYS_BFIN_SPINLOCK_L1=y
-# CONFIG_IP_CHECKSUM_L1 is not set
-# CONFIG_SYSCALL_TAB_L1 is not set
-# CONFIG_CPLB_SWITCH_TAB_L1 is not set
-CONFIG_RAMKERNEL=y
-# CONFIG_ROMKERNEL is not set
-CONFIG_SELECT_MEMORY_MODEL=y
-CONFIG_FLATMEM_MANUAL=y
-# CONFIG_DISCONTIGMEM_MANUAL is not set
-# CONFIG_SPARSEMEM_MANUAL is not set
-CONFIG_FLATMEM=y
-CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
-CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
-CONFIG_LARGE_ALLOCS=y
-CONFIG_BFIN_DMA_5XX=y
-# CONFIG_DMA_UNCACHED_2M is not set
-CONFIG_DMA_UNCACHED_1M=y
-# CONFIG_DMA_UNCACHED_NONE is not set
-
-#
-# Cache Support
-#
-CONFIG_BLKFIN_CACHE=y
-CONFIG_BLKFIN_DCACHE=y
-# CONFIG_BLKFIN_DCACHE_BANKA is not set
-# CONFIG_BLKFIN_CACHE_LOCK is not set
-# CONFIG_BLKFIN_WB is not set
-CONFIG_BLKFIN_WT=y
-CONFIG_L1_MAX_PIECE=16
-
-#
-# Clock Settings
-#
-# CONFIG_BFIN_KERNEL_CLOCK is not set
-
-#
-# Asynchonous Memory Configuration
-#
-
-#
-# EBIU_AMBCTL Global Control
-#
-CONFIG_C_AMCKEN=y
-CONFIG_C_CDPRIO=y
-# CONFIG_C_AMBEN is not set
-# CONFIG_C_AMBEN_B0 is not set
-# CONFIG_C_AMBEN_B0_B1 is not set
-# CONFIG_C_AMBEN_B0_B1_B2 is not set
-CONFIG_C_AMBEN_ALL=y
-
-#
-# EBIU_AMBCTL Control
-#
-CONFIG_BANK_0=0x7BB0
-CONFIG_BANK_1=0x7BB0
-CONFIG_BANK_2=0x7BB0
-CONFIG_BANK_3=0x99B3
-
-#
-# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
-#
-# CONFIG_PCI is not set
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
-# CONFIG_PCCARD is not set
-
-#
-# PCI Hotplug Support
-#
-
-#
-# Executable file formats
-#
-CONFIG_BINFMT_ELF_FDPIC=y
-CONFIG_BINFMT_FLAT=y
-CONFIG_BINFMT_ZFLAT=y
-# CONFIG_BINFMT_SHARED_FLAT is not set
-# CONFIG_BINFMT_MISC is not set
-
-#
-# Power management options
-#
-CONFIG_PM=y
-CONFIG_PM_LEGACY=y
-# CONFIG_PM_DEBUG is not set
-# CONFIG_PM_SYSFS_DEPRECATED is not set
-CONFIG_PM_WAKEUP_GPIO_BY_SIC_IWR=y
-# CONFIG_PM_WAKEUP_BY_GPIO is not set
-# CONFIG_PM_WAKEUP_GPIO_API is not set
-CONFIG_PM_WAKEUP_SIC_IWR=0x80000000
-
-#
-# CPU Frequency scaling
-#
-# CONFIG_CPU_FREQ is not set
-
-#
-# Networking
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-# CONFIG_NETDEBUG is not set
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_UNIX=y
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-# CONFIG_XFRM_SUB_POLICY is not set
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_FIB_HASH=y
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_XFRM_TUNNEL is not set
-# CONFIG_INET_TUNNEL is not set
-CONFIG_INET_XFRM_MODE_TRANSPORT=y
-CONFIG_INET_XFRM_MODE_TUNNEL=y
-CONFIG_INET_XFRM_MODE_BEET=y
-CONFIG_INET_DIAG=y
-CONFIG_INET_TCP_DIAG=y
-# CONFIG_TCP_CONG_ADVANCED is not set
-CONFIG_TCP_CONG_CUBIC=y
-CONFIG_DEFAULT_TCP_CONG="cubic"
-# CONFIG_TCP_MD5SIG is not set
-# CONFIG_IPV6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
-# CONFIG_NETLABEL is not set
-# CONFIG_NETWORK_SECMARK is not set
-# CONFIG_NETFILTER is not set
-
-#
-# DCCP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_DCCP is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-
-#
-# TIPC Configuration (EXPERIMENTAL)
-#
-# CONFIG_TIPC is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_HAMRADIO is not set
-CONFIG_IRDA=m
-
-#
-# IrDA protocols
-#
-CONFIG_IRLAN=m
-CONFIG_IRCOMM=m
-# CONFIG_IRDA_ULTRA is not set
-
-#
-# IrDA options
-#
-CONFIG_IRDA_CACHE_LAST_LSAP=y
-# CONFIG_IRDA_FAST_RR is not set
-# CONFIG_IRDA_DEBUG is not set
-
-#
-# Infrared-port device drivers
-#
-
-#
-# SIR device drivers
-#
-CONFIG_IRTTY_SIR=m
-
-#
-# Dongle support
-#
-# CONFIG_DONGLE is not set
-
-#
-# Old SIR device drivers
-#
-# CONFIG_IRPORT_SIR is not set
-
-#
-# Old Serial dongle support
-#
-
-#
-# FIR device drivers
-#
-# CONFIG_BT is not set
-# CONFIG_IEEE80211 is not set
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
-# CONFIG_SYS_HYPERVISOR is not set
-
-#
-# Connector - unified userspace <-> kernelspace linker
-#
-# CONFIG_CONNECTOR is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_CONCAT is not set
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_CMDLINE_PARTS is not set
-
-#
-# User Modules And Translation Layers
-#
-CONFIG_MTD_CHAR=m
-CONFIG_MTD_BLKDEVS=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-# CONFIG_INFTL is not set
-# CONFIG_RFD_FTL is not set
-# CONFIG_SSFDC is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-# CONFIG_MTD_CFI is not set
-CONFIG_MTD_JEDECPROBE=m
-CONFIG_MTD_GEN_PROBE=m
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-CONFIG_MTD_CFI_I1=y
-CONFIG_MTD_CFI_I2=y
-# CONFIG_MTD_CFI_I4 is not set
-# CONFIG_MTD_CFI_I8 is not set
-# CONFIG_MTD_CFI_INTELEXT is not set
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_CFI_STAA is not set
-CONFIG_MTD_MW320D=m
-CONFIG_MTD_RAM=y
-CONFIG_MTD_ROM=m
-# CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
-
-#
-# Mapping drivers for chip access
-#
-CONFIG_MTD_COMPLEX_MAPPINGS=y
-# CONFIG_MTD_PHYSMAP is not set
-CONFIG_MTD_BF5xx=m
-CONFIG_BFIN_FLASH_SIZE=0x400000
-CONFIG_EBIU_FLASH_BASE=0x20000000
-
-#
-# FLASH_EBIU_AMBCTL Control
-#
-CONFIG_BFIN_FLASH_BANK_0=0x7BB0
-CONFIG_BFIN_FLASH_BANK_1=0x7BB0
-CONFIG_BFIN_FLASH_BANK_2=0x7BB0
-CONFIG_BFIN_FLASH_BANK_3=0x7BB0
-CONFIG_MTD_UCLINUX=y
-# CONFIG_MTD_PLATRAM is not set
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_DATAFLASH is not set
-# CONFIG_MTD_M25P80 is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_PHRAM is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLOCK2MTD is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-
-#
-# NAND Flash Device Drivers
-#
-CONFIG_MTD_NAND=m
-# CONFIG_MTD_NAND_VERIFY_WRITE is not set
-# CONFIG_MTD_NAND_ECC_SMC is not set
-CONFIG_MTD_NAND_BFIN=m
-CONFIG_BFIN_NAND_BASE=0x20212000
-CONFIG_BFIN_NAND_CLE=2
-CONFIG_BFIN_NAND_ALE=1
-CONFIG_BFIN_NAND_READY=3
-CONFIG_MTD_NAND_IDS=m
-# CONFIG_MTD_NAND_DISKONCHIP is not set
-# CONFIG_MTD_NAND_NANDSIM is not set
-
-#
-# OneNAND Flash Device Drivers
-#
-# CONFIG_MTD_ONENAND is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_COW_COMMON is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_CDROM_PKTCDVD is not set
-# CONFIG_ATA_OVER_ETH is not set
-
-#
-# Misc devices
-#
-# CONFIG_TIFM_CORE is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_RAID_ATTRS is not set
-# CONFIG_SCSI is not set
-# CONFIG_SCSI_NETLINK is not set
-
-#
-# Serial ATA (prod) and Parallel ATA (experimental) drivers
-#
-# CONFIG_ATA is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-
-#
-# I2O device support
-#
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# PHY device support
-#
-# CONFIG_PHYLIB is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_SMC91X is not set
-CONFIG_BFIN_MAC=y
-CONFIG_BFIN_MAC_USE_L1=y
-CONFIG_BFIN_TX_DESC_NUM=10
-CONFIG_BFIN_RX_DESC_NUM=20
-# CONFIG_BFIN_MAC_RMII is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-
-#
-# Token Ring devices
-#
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-# CONFIG_INPUT_FF_MEMLESS is not set
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-CONFIG_INPUT_EVDEV=m
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-CONFIG_INPUT_MISC=y
-# CONFIG_INPUT_UINPUT is not set
-# CONFIG_BF53X_PFBUTTONS is not set
-CONFIG_TWI_KEYPAD=m
-CONFIG_BFIN_TWIKEYPAD_IRQ_PFX=72
-
-#
-# Hardware I/O ports
-#
-# CONFIG_SERIO is not set
-# CONFIG_GAMEPORT is not set
-
-#
-# Character devices
-#
-# CONFIG_AD9960 is not set
-# CONFIG_SPI_ADC_BF533 is not set
-# CONFIG_BF533_PFLAGS is not set
-# CONFIG_BF5xx_PPIFCD is not set
-# CONFIG_BF5xx_TIMERS is not set
-# CONFIG_BF5xx_PPI is not set
-CONFIG_BFIN_SPORT=y
-# CONFIG_BFIN_TIMER_LATENCY is not set
-CONFIG_TWI_LCD=m
-CONFIG_TWI_LCD_SLAVE_ADDR=34
-# CONFIG_AD5304 is not set
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_BFIN=y
-CONFIG_SERIAL_BFIN_CONSOLE=y
-CONFIG_SERIAL_BFIN_DMA=y
-# CONFIG_SERIAL_BFIN_PIO is not set
-CONFIG_SERIAL_BFIN_UART0=y
-# CONFIG_BFIN_UART0_CTSRTS is not set
-# CONFIG_SERIAL_BFIN_UART1 is not set
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-# CONFIG_SERIAL_BFIN_SPORT is not set
-CONFIG_UNIX98_PTYS=y
-# CONFIG_LEGACY_PTYS is not set
-
-#
-# CAN, the car bus and industrial fieldbus
-#
-CONFIG_CAN4LINUX=y
-
-#
-# linux embedded drivers
-#
-# CONFIG_CAN_MCF5282 is not set
-# CONFIG_CAN_UNCTWINCAN is not set
-CONFIG_CAN_BLACKFIN=m
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-CONFIG_HW_RANDOM=y
-# CONFIG_GEN_RTC is not set
-CONFIG_BLACKFIN_DPMC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# TPM devices
-#
-# CONFIG_TCG_TPM is not set
-
-#
-# I2C support
-#
-CONFIG_I2C=m
-CONFIG_I2C_CHARDEV=m
-
-#
-# I2C Algorithms
-#
-# CONFIG_I2C_ALGOBIT is not set
-# CONFIG_I2C_ALGOPCF is not set
-# CONFIG_I2C_ALGOPCA is not set
-
-#
-# I2C Hardware Bus support
-#
-# CONFIG_I2C_BLACKFIN_GPIO is not set
-# CONFIG_I2C_BLACKFIN_TWI is not set
-# CONFIG_I2C_OCORES is not set
-# CONFIG_I2C_PARPORT_LIGHT is not set
-# CONFIG_I2C_STUB is not set
-# CONFIG_I2C_PCA_ISA is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_DS1337 is not set
-# CONFIG_SENSORS_DS1374 is not set
-CONFIG_SENSORS_AD5252=m
-# CONFIG_SENSORS_EEPROM is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_SENSORS_PCF8575 is not set
-# CONFIG_SENSORS_PCA9543 is not set
-# CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_SENSORS_MAX6875 is not set
-# CONFIG_I2C_DEBUG_CORE is not set
-# CONFIG_I2C_DEBUG_ALGO is not set
-# CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
-
-#
-# SPI support
-#
-CONFIG_SPI=y
-CONFIG_SPI_MASTER=y
-
-#
-# SPI Master Controller Drivers
-#
-# CONFIG_SPI_BITBANG is not set
-
-#
-# SPI Protocol Masters
-#
-CONFIG_SPI_BFIN=y
-
-#
-# Dallas's 1-wire bus
-#
-# CONFIG_W1 is not set
-
-#
-# Hardware Monitoring support
-#
-CONFIG_HWMON=y
-# CONFIG_HWMON_VID is not set
-# CONFIG_SENSORS_ABITUGURU is not set
-# CONFIG_SENSORS_ADM1021 is not set
-# CONFIG_SENSORS_ADM1025 is not set
-# CONFIG_SENSORS_ADM1026 is not set
-# CONFIG_SENSORS_ADM1031 is not set
-# CONFIG_SENSORS_ADM9240 is not set
-# CONFIG_SENSORS_ASB100 is not set
-# CONFIG_SENSORS_ATXP1 is not set
-# CONFIG_SENSORS_DS1621 is not set
-# CONFIG_SENSORS_F71805F is not set
-# CONFIG_SENSORS_FSCHER is not set
-# CONFIG_SENSORS_FSCPOS is not set
-# CONFIG_SENSORS_GL518SM is not set
-# CONFIG_SENSORS_GL520SM is not set
-# CONFIG_SENSORS_IT87 is not set
-# CONFIG_SENSORS_LM63 is not set
-# CONFIG_SENSORS_LM70 is not set
-# CONFIG_SENSORS_LM75 is not set
-# CONFIG_SENSORS_LM77 is not set
-# CONFIG_SENSORS_LM78 is not set
-# CONFIG_SENSORS_LM80 is not set
-# CONFIG_SENSORS_LM83 is not set
-# CONFIG_SENSORS_LM85 is not set
-# CONFIG_SENSORS_LM87 is not set
-# CONFIG_SENSORS_LM90 is not set
-# CONFIG_SENSORS_LM92 is not set
-# CONFIG_SENSORS_MAX1619 is not set
-# CONFIG_SENSORS_PC87360 is not set
-# CONFIG_SENSORS_PC87427 is not set
-# CONFIG_SENSORS_SMSC47M1 is not set
-# CONFIG_SENSORS_SMSC47M192 is not set
-# CONFIG_SENSORS_SMSC47B397 is not set
-# CONFIG_SENSORS_VT1211 is not set
-# CONFIG_SENSORS_W83781D is not set
-# CONFIG_SENSORS_W83791D is not set
-# CONFIG_SENSORS_W83792D is not set
-# CONFIG_SENSORS_W83793 is not set
-# CONFIG_SENSORS_W83L785TS is not set
-# CONFIG_SENSORS_W83627HF is not set
-# CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-CONFIG_FIRMWARE_EDID=y
-CONFIG_FB=m
-CONFIG_FB_CFB_FILLRECT=m
-CONFIG_FB_CFB_COPYAREA=m
-CONFIG_FB_CFB_IMAGEBLIT=m
-# CONFIG_FB_MACMODES is not set
-# CONFIG_FB_BACKLIGHT is not set
-# CONFIG_FB_MODE_HELPERS is not set
-# CONFIG_FB_TILEBLITTING is not set
-CONFIG_FB_BFIN_7171=m
-CONFIG_FB_BFIN_7393=m
-CONFIG_NTSC=y
-# CONFIG_PAL is not set
-# CONFIG_NTSC_640x480 is not set
-# CONFIG_PAL_640x480 is not set
-# CONFIG_NTSC_YCBCR is not set
-# CONFIG_PAL_YCBCR is not set
-CONFIG_ADV7393_1XMEM=y
-# CONFIG_ADV7393_2XMEM is not set
-# CONFIG_FB_S1D13XXX is not set
-# CONFIG_FB_VIRTUAL is not set
-
-#
-# Logo configuration
-#
-# CONFIG_LOGO is not set
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=m
-CONFIG_BACKLIGHT_DEVICE=y
-CONFIG_LCD_CLASS_DEVICE=m
-CONFIG_LCD_DEVICE=y
-
-#
-# Sound
-#
-CONFIG_SOUND=m
-
-#
-# Advanced Linux Sound Architecture
-#
-CONFIG_SND=m
-CONFIG_SND_TIMER=m
-CONFIG_SND_PCM=m
-# CONFIG_SND_SEQUENCER is not set
-CONFIG_SND_OSSEMUL=y
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-CONFIG_SND_PCM_OSS_PLUGINS=y
-# CONFIG_SND_DYNAMIC_MINORS is not set
-CONFIG_SND_SUPPORT_OLD_API=y
-CONFIG_SND_VERBOSE_PROCFS=y
-# CONFIG_SND_VERBOSE_PRINTK is not set
-# CONFIG_SND_DEBUG is not set
-
-#
-# Generic devices
-#
-# CONFIG_SND_DUMMY is not set
-# CONFIG_SND_MTPAV is not set
-# CONFIG_SND_SERIAL_U16550 is not set
-# CONFIG_SND_MPU401 is not set
-
-#
-# Open Sound System
-#
-# CONFIG_SOUND_PRIME is not set
-
-#
-# HID Devices
-#
-CONFIG_HID=y
-
-#
-# USB support
-#
-CONFIG_USB_ARCH_HAS_HCD=y
-# CONFIG_USB_ARCH_HAS_OHCI is not set
-# CONFIG_USB_ARCH_HAS_EHCI is not set
-# CONFIG_USB is not set
-
-#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# MMC/SD Card support
-#
-# CONFIG_SPI_MMC is not set
-# CONFIG_MMC is not set
-
-#
-# LED devices
-#
-# CONFIG_NEW_LEDS is not set
-
-#
-# LED drivers
-#
-
-#
-# LED Triggers
-#
-
-#
-# InfiniBand support
-#
-
-#
-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
-#
-
-#
-# Real Time Clock
-#
-CONFIG_RTC_LIB=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_HCTOSYS=y
-CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
-# CONFIG_RTC_DEBUG is not set
-
-#
-# RTC interfaces
-#
-CONFIG_RTC_INTF_SYSFS=y
-CONFIG_RTC_INTF_PROC=y
-CONFIG_RTC_INTF_DEV=y
-# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
-
-#
-# RTC drivers
-#
-# CONFIG_RTC_DRV_X1205 is not set
-# CONFIG_RTC_DRV_DS1307 is not set
-# CONFIG_RTC_DRV_DS1553 is not set
-# CONFIG_RTC_DRV_ISL1208 is not set
-# CONFIG_RTC_DRV_DS1672 is not set
-# CONFIG_RTC_DRV_DS1742 is not set
-# CONFIG_RTC_DRV_PCF8563 is not set
-# CONFIG_RTC_DRV_PCF8583 is not set
-# CONFIG_RTC_DRV_RS5C348 is not set
-# CONFIG_RTC_DRV_RS5C372 is not set
-# CONFIG_RTC_DRV_M48T86 is not set
-# CONFIG_RTC_DRV_TEST is not set
-# CONFIG_RTC_DRV_MAX6902 is not set
-# CONFIG_RTC_DRV_V3020 is not set
-CONFIG_RTC_DRV_BFIN=y
-
-#
-# DMA Engine support
-#
-# CONFIG_DMA_ENGINE is not set
-
-#
-# DMA Clients
-#
-
-#
-# DMA Devices
-#
-
-#
-# Virtualization
-#
-
-#
-# PBX support
-#
-# CONFIG_PBX is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-# CONFIG_EXT2_FS_POSIX_ACL is not set
-# CONFIG_EXT2_FS_SECURITY is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_EXT4DEV_FS is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_FS_POSIX_ACL is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_GFS2_FS is not set
-# CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_INOTIFY=y
-CONFIG_INOTIFY_USER=y
-# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_FUSE_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_SYSCTL=y
-CONFIG_SYSFS=y
-# CONFIG_TMPFS is not set
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-# CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_YAFFS_FS=m
-CONFIG_YAFFS_YAFFS1=y
-# CONFIG_YAFFS_DOES_ECC is not set
-CONFIG_YAFFS_YAFFS2=y
-CONFIG_YAFFS_AUTO_YAFFS2=y
-# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
-CONFIG_YAFFS_CHECKPOINT_RESERVED_BLOCKS=10
-# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
-# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
-CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
-CONFIG_JFFS2_FS=m
-CONFIG_JFFS2_FS_DEBUG=0
-CONFIG_JFFS2_FS_WRITEBUFFER=y
-# CONFIG_JFFS2_SUMMARY is not set
-# CONFIG_JFFS2_FS_XATTR is not set
-# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
-CONFIG_JFFS2_ZLIB=y
-CONFIG_JFFS2_RTIME=y
-# CONFIG_JFFS2_RUBIN is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=m
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V3_ACL is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_LOCKD=m
-CONFIG_LOCKD_V4=y
-CONFIG_NFS_COMMON=y
-CONFIG_SUNRPC=m
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_RPCSEC_GSS_SPKM3 is not set
-CONFIG_SMB_FS=m
-# CONFIG_SMB_NLS_DEFAULT is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-# CONFIG_9P_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS=m
-CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1250 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-# CONFIG_NLS_ASCII is not set
-# CONFIG_NLS_ISO8859_1 is not set
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Distributed Lock Manager
-#
-# CONFIG_DLM is not set
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_PRINTK_TIME is not set
-CONFIG_ENABLE_MUST_CHECK=y
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_HEADERS_CHECK is not set
-# CONFIG_DEBUG_KERNEL is not set
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_DEBUG_SERIAL_EARLY_INIT is not set
-CONFIG_DEBUG_HUNT_FOR_ZERO=y
-# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
-CONFIG_CPLB_INFO=y
-CONFIG_ACCESS_CHECK=y
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-CONFIG_SECURITY=y
-# CONFIG_SECURITY_NETWORK is not set
-CONFIG_SECURITY_CAPABILITIES=y
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-CONFIG_BITREVERSE=y
-CONFIG_CRC_CCITT=m
-# CONFIG_CRC16 is not set
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=m
-CONFIG_PLIST=y
-CONFIG_IOMAP_COPY=y
}
EXPORT_SYMBOL(get_dma_curr_ycount);
-void *_dma_memcpy(void *dest, const void *src, size_t size)
+static void *__dma_memcpy(void *dest, const void *src, size_t size)
{
int direction; /* 1 - address decrease, 0 - address increase */
int flag_align; /* 1 - address aligned, 0 - address unaligned */
bulk = (size >> 16) << 16;
rest = size - bulk;
if (bulk)
- _dma_memcpy(dest, src, bulk);
- addr = _dma_memcpy(dest+bulk, src+bulk, rest);
+ __dma_memcpy(dest, src, bulk);
+ addr = __dma_memcpy(dest+bulk, src+bulk, rest);
return addr;
}
inline int check_gpio(unsigned short gpio)
{
- if (gpio > MAX_BLACKFIN_GPIOS)
+ if (gpio >= MAX_BLACKFIN_GPIOS)
return -EINVAL;
return 0;
}
gpio_bank_saved[bank].dir = gpio_bankb[bank]->dir;
gpio_bank_saved[bank].edge = gpio_bankb[bank]->edge;
gpio_bank_saved[bank].both = gpio_bankb[bank]->both;
+ gpio_bank_saved[bank].reserved = reserved_map[bank];
gpio = i;
while (mask) {
if (mask & 1) {
- bfin_gpio_wakeup_type(gpio, wakeup_flags_map[gpio]);
+ reserved_map[gpio_bank(gpio)] |=
+ gpio_bit(gpio);
+ bfin_gpio_wakeup_type(gpio,
+ wakeup_flags_map[gpio]);
set_gpio_data(gpio, 0); /*Clear*/
}
gpio++;
mask >>= 1;
}
- sic_iwr |= 1 << (sic_iwr_irqs[bank] - (IRQ_CORETMR + 1));
+ sic_iwr |= 1 <<
+ (sic_iwr_irqs[bank] - (IRQ_CORETMR + 1));
gpio_bankb[bank]->maskb_set = wakeup_map[gpio_bank(i)];
}
}
gpio_bankb[bank]->polar = gpio_bank_saved[bank].polar;
gpio_bankb[bank]->edge = gpio_bank_saved[bank].edge;
gpio_bankb[bank]->both = gpio_bank_saved[bank].both;
+
+ reserved_map[bank] = gpio_bank_saved[bank].reserved;
+
}
gpio_bankb[bank]->maskb = gpio_bank_saved[bank].maskb;
RESTORE_ALL_SYS
p0 = reti;
jump (p0);
+ENDPROC(_ret_from_fork)
ENTRY(_sys_fork)
r0 = -EINVAL;
rts;
+ENDPROC(_sys_fork)
ENTRY(_sys_vfork)
r0 = sp;
SP += 12;
rets = [sp++];
rts;
+ENDPROC(_sys_vfork)
ENTRY(_sys_clone)
r0 = sp;
SP += 12;
rets = [sp++];
rts;
+ENDPROC(_sys_clone)
ENTRY(_sys_rt_sigreturn)
r0 = sp;
SP += 12;
rets = [sp++];
rts;
+ENDPROC(_sys_rt_sigreturn)
}
/*
- * do_IRQ handles all hardware IRQ's. Decoded IRQs should not
+ * do_IRQ handles all hardware IRQs. Decoded IRQs should not
* come via this function. Instead, they should provide their
* own 'handler'
*/
EXPORT_SYMBOL(mtd_size);
#endif
-char command_line[COMMAND_LINE_SIZE];
+char __initdata command_line[COMMAND_LINE_SIZE];
#if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE)
static void generate_cpl_tables(void);
#endif
}
-void bf53x_relocate_l1_mem(void)
+void __init bf53x_relocate_l1_mem(void)
{
unsigned long l1_code_length;
unsigned long l1_data_a_length;
#endif
#if defined(CONFIG_CMDLINE_BOOL)
- memset(command_line, 0, sizeof(command_line));
strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
command_line[sizeof(command_line) - 1] = 0;
#endif
/* Keep a copy of command line */
*cmdline_p = &command_line[0];
memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
- boot_command_line[COMMAND_LINE_SIZE - 1] = 0;
+ boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
/* setup memory defaults from the user config */
physical_mem_end = 0;
subsys_initcall(topology_init);
#if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE)
-u16 lock_kernel_check(u32 start, u32 end)
+static u16 __init lock_kernel_check(u32 start, u32 end)
{
if ((start <= (u32) _stext && end >= (u32) _end)
|| (start >= (u32) _stext && end <= (u32) _end))
return 0;
}
+/* helper function */
+static void __fill_code_cplbtab(struct cplb_tab *t, int i,
+ u32 a_start, u32 a_end)
+{
+ if (cplb_data[i].psize) {
+ fill_cplbtab(t,
+ cplb_data[i].start,
+ cplb_data[i].end,
+ cplb_data[i].psize,
+ cplb_data[i].i_conf);
+ } else {
+#if (defined(CONFIG_BLKFIN_CACHE) && defined(ANOMALY_05000263))
+ if (i == SDRAM_KERN) {
+ fill_cplbtab(t,
+ cplb_data[i].start,
+ cplb_data[i].end,
+ SIZE_4M,
+ cplb_data[i].i_conf);
+ } else {
+#endif
+ fill_cplbtab(t,
+ cplb_data[i].start,
+ a_start,
+ SIZE_1M,
+ cplb_data[i].i_conf);
+ fill_cplbtab(t,
+ a_start,
+ a_end,
+ SIZE_4M,
+ cplb_data[i].i_conf);
+ fill_cplbtab(t, a_end,
+ cplb_data[i].end,
+ SIZE_1M,
+ cplb_data[i].i_conf);
+ }
+ }
+}
+
+static void __fill_data_cplbtab(struct cplb_tab *t, int i,
+ u32 a_start, u32 a_end)
+{
+ if (cplb_data[i].psize) {
+ fill_cplbtab(t,
+ cplb_data[i].start,
+ cplb_data[i].end,
+ cplb_data[i].psize,
+ cplb_data[i].d_conf);
+ } else {
+ fill_cplbtab(t,
+ cplb_data[i].start,
+ a_start, SIZE_1M,
+ cplb_data[i].d_conf);
+ fill_cplbtab(t, a_start,
+ a_end, SIZE_4M,
+ cplb_data[i].d_conf);
+ fill_cplbtab(t, a_end,
+ cplb_data[i].end,
+ SIZE_1M,
+ cplb_data[i].d_conf);
+ }
+}
static void __init generate_cpl_tables(void)
{
cplb_data[RES_MEM].i_conf = SDRAM_INON_CHBL;
for (i = ZERO_P; i <= L2_MEM; i++) {
+ if (!cplb_data[i].valid)
+ continue;
- if (cplb_data[i].valid) {
+ as_1m = cplb_data[i].start % SIZE_1M;
- as_1m = cplb_data[i].start % SIZE_1M;
+ /*
+ * We need to make sure all sections are properly 1M aligned
+ * However between Kernel Memory and the Kernel mtd section,
+ * depending on the rootfs size, there can be overlapping
+ * memory areas.
+ */
- /* We need to make sure all sections are properly 1M aligned
- * However between Kernel Memory and the Kernel mtd section, depending on the
- * rootfs size, there can be overlapping memory areas.
- */
-
- if (as_1m && i!=L1I_MEM && i!=L1D_MEM) {
+ if (as_1m && i != L1I_MEM && i != L1D_MEM) {
#ifdef CONFIG_MTD_UCLINUX
- if (i == SDRAM_RAM_MTD) {
- if ((cplb_data[SDRAM_KERN].end + 1) > cplb_data[SDRAM_RAM_MTD].start)
- cplb_data[SDRAM_RAM_MTD].start = (cplb_data[i].start & (-2*SIZE_1M)) + SIZE_1M;
- else
- cplb_data[SDRAM_RAM_MTD].start = (cplb_data[i].start & (-2*SIZE_1M));
- } else
+ if (i == SDRAM_RAM_MTD) {
+ if ((cplb_data[SDRAM_KERN].end + 1) >
+ cplb_data[SDRAM_RAM_MTD].start)
+ cplb_data[SDRAM_RAM_MTD].start =
+ (cplb_data[i].start &
+ (-2*SIZE_1M)) + SIZE_1M;
+ else
+ cplb_data[SDRAM_RAM_MTD].start =
+ (cplb_data[i].start &
+ (-2*SIZE_1M));
+ } else
#endif
- printk(KERN_WARNING "Unaligned Start of %s at 0x%X\n",
- cplb_data[i].name, cplb_data[i].start);
- }
+ printk(KERN_WARNING
+ "Unaligned Start of %s at 0x%X\n",
+ cplb_data[i].name, cplb_data[i].start);
+ }
- as = cplb_data[i].start % SIZE_4M;
- ae = cplb_data[i].end % SIZE_4M;
-
- if (as)
- a_start = cplb_data[i].start + (SIZE_4M - (as));
- else
- a_start = cplb_data[i].start;
-
- a_end = cplb_data[i].end - ae;
-
- for (j = INITIAL_T; j <= SWITCH_T; j++) {
-
- switch (j) {
- case INITIAL_T:
- if (cplb_data[i].attr & INITIAL_T) {
- t_i = &cplb.init_i;
- t_d = &cplb.init_d;
- process = 1;
- } else
- process = 0;
- break;
- case SWITCH_T:
- if (cplb_data[i].attr & SWITCH_T) {
- t_i = &cplb.switch_i;
- t_d = &cplb.switch_d;
- process = 1;
- } else
- process = 0;
- break;
- default:
- process = 0;
- break;
- }
+ as = cplb_data[i].start % SIZE_4M;
+ ae = cplb_data[i].end % SIZE_4M;
- if (process) {
- if (cplb_data[i].attr & I_CPLB) {
-
- if (cplb_data[i].psize) {
- fill_cplbtab(t_i,
- cplb_data[i].start,
- cplb_data[i].end,
- cplb_data[i].psize,
- cplb_data[i].i_conf);
- } else {
- /*icplb_table */
-#if (defined(CONFIG_BLKFIN_CACHE) && defined(ANOMALY_05000263))
- if (i == SDRAM_KERN) {
- fill_cplbtab(t_i,
- cplb_data[i].start,
- cplb_data[i].end,
- SIZE_4M,
- cplb_data[i].i_conf);
- } else
-#endif
- {
- fill_cplbtab(t_i,
- cplb_data[i].start,
- a_start,
- SIZE_1M,
- cplb_data[i].i_conf);
- fill_cplbtab(t_i,
- a_start,
- a_end,
- SIZE_4M,
- cplb_data[i].i_conf);
- fill_cplbtab(t_i, a_end,
- cplb_data[i].end,
- SIZE_1M,
- cplb_data[i].i_conf);
- }
- }
+ if (as)
+ a_start = cplb_data[i].start + (SIZE_4M - (as));
+ else
+ a_start = cplb_data[i].start;
- }
- if (cplb_data[i].attr & D_CPLB) {
-
- if (cplb_data[i].psize) {
- fill_cplbtab(t_d,
- cplb_data[i].start,
- cplb_data[i].end,
- cplb_data[i].psize,
- cplb_data[i].d_conf);
- } else {
-/*dcplb_table*/
- fill_cplbtab(t_d,
- cplb_data[i].start,
- a_start, SIZE_1M,
- cplb_data[i].d_conf);
- fill_cplbtab(t_d, a_start,
- a_end, SIZE_4M,
- cplb_data[i].d_conf);
- fill_cplbtab(t_d, a_end,
- cplb_data[i].end,
- SIZE_1M,
- cplb_data[i].d_conf);
+ a_end = cplb_data[i].end - ae;
- }
+ for (j = INITIAL_T; j <= SWITCH_T; j++) {
- }
- }
+ switch (j) {
+ case INITIAL_T:
+ if (cplb_data[i].attr & INITIAL_T) {
+ t_i = &cplb.init_i;
+ t_d = &cplb.init_d;
+ process = 1;
+ } else
+ process = 0;
+ break;
+ case SWITCH_T:
+ if (cplb_data[i].attr & SWITCH_T) {
+ t_i = &cplb.switch_i;
+ t_d = &cplb.switch_d;
+ process = 1;
+ } else
+ process = 0;
+ break;
+ default:
+ process = 0;
+ break;
}
+ if (!process)
+ continue;
+ if (cplb_data[i].attr & I_CPLB)
+ __fill_code_cplbtab(t_i, i, a_start, a_end);
+
+ if (cplb_data[i].attr & D_CPLB)
+ __fill_data_cplbtab(t_d, i, a_start, a_end);
}
}
#endif
-static inline u_long get_vco(void)
+static u_long get_vco(void)
{
u_long msel;
u_long vco;
.show = show_cpuinfo,
};
-void cmdline_init(unsigned long r0)
+void __init cmdline_init(const char *r0)
{
if (r0)
- strncpy(command_line, (char *)r0, COMMAND_LINE_SIZE);
+ strncpy(command_line, r0, COMMAND_LINE_SIZE);
}
break;
#ifndef CONFIG_DEBUG_HWERR
/* If one of the last few instructions was a STI
- * it is likily that the error occured awhile ago
+ * it is likely that the error occured awhile ago
* and we just noticed
*/
if (x >= 0x0040 && x <= 0x0047 && i <= 0)
* Description: Master linker script for blackfin architecture
*
* Modified:
- * Copyright 2004-2006 Analog Devices Inc.
+ * Copyright 2004-2007 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
#include <asm-generic/vmlinux.lds.h>
#include <asm/mem_map.h>
-
OUTPUT_FORMAT("elf32-bfin")
ENTRY(__start)
_jiffies = _jiffies_64;
-MEMORY
-{
- ram : ORIGIN = CONFIG_BOOT_LOAD, LENGTH = (CONFIG_MEM_SIZE * 1024 * 1024) - (CONFIG_BOOT_LOAD)
- l1_data_a : ORIGIN = L1_DATA_A_START, LENGTH = L1_DATA_A_LENGTH
- l1_data_b : ORIGIN = L1_DATA_B_START, LENGTH = L1_DATA_B_LENGTH
- l1_code : ORIGIN = L1_CODE_START, LENGTH = L1_CODE_LENGTH
- l1_scratch : ORIGIN = L1_SCRATCH_START, LENGTH = L1_SCRATCH_LENGTH
-}
-
SECTIONS
{
. = CONFIG_BOOT_LOAD;
-
.text :
{
- _text = .;
- __stext = .;
+ __text = .;
+ _text = .;
+ __stext = .;
TEXT_TEXT
SCHED_TEXT
+ LOCK_TEXT
*(.text.lock)
+ *(.fixup)
+
. = ALIGN(16);
- ___start___ex_table = .;
+ ___start___ex_table = .;
*(__ex_table)
- ___stop___ex_table = .;
-
- *($code)
- *(.rodata)
- *(.rodata.*)
- *(__vermagic) /* Kernel version magic */
- *(.rodata1)
- *(.fixup)
- *(.spinlock.text)
+ ___stop___ex_table = .;
- /* Kernel symbol table: Normal symbols */
. = ALIGN(4);
- ___start___ksymtab = .;
- *(__ksymtab)
- ___stop___ksymtab = .;
-
- /* Kernel symbol table: GPL-only symbols */
- ___start___ksymtab_gpl = .;
- *(__ksymtab_gpl)
- ___stop___ksymtab_gpl = .;
-
- /* Kernel symbol table: Normal unused symbols */ \
- ___start___ksymtab_unused = .;
- *(__ksymtab_unused)
- ___stop___ksymtab_unused = .;
-
- /* Kernel symbol table: GPL-only unused symbols */
- ___start___ksymtab_unused_gpl = .;
- *(__ksymtab_unused_gpl)
- ___stop___ksymtab_unused_gpl = .;
-
-
- /* Kernel symbol table: GPL-future symbols */
- ___start___ksymtab_gpl_future = .;
- *(__ksymtab_gpl_future)
- ___stop___ksymtab_gpl_future = .;
-
- /* Kernel symbol table: Normal symbols */
- ___start___kcrctab = .;
- *(__kcrctab)
- ___stop___kcrctab = .;
-
- /* Kernel symbol table: GPL-only symbols */
- ___start___kcrctab_gpl = .;
- *(__kcrctab_gpl)
- ___stop___kcrctab_gpl = .;
-
- /* Kernel symbol table: GPL-future symbols */
- ___start___kcrctab_gpl_future = .;
- *(__kcrctab_gpl_future)
- ___stop___kcrctab_gpl_future = .;
-
- /* Kernel symbol table: strings */
- *(__ksymtab_strings)
-
- . = ALIGN(4);
__etext = .;
- } > ram
+ }
+
+ RODATA
+
+ .data :
+ {
+ __sdata = .;
+ . = ALIGN(0x2000);
+ *(.data.init_task)
+ DATA_DATA
+ CONSTRUCTORS
+
+ . = ALIGN(32);
+ *(.data.cacheline_aligned)
+
+ . = ALIGN(0x2000);
+ __edata = .;
+ }
+ ___init_begin = .;
.init :
{
. = ALIGN(4096);
- ___init_begin = .;
__sinittext = .;
*(.init.text)
__einittext = .;
*(.init.ramfs)
___initramfs_end = .;
. = ALIGN(4);
- ___init_end = .;
- } > ram
+ }
- __l1_lma_start = .;
+ __l1_lma_start = .;
- .text_l1 :
+ .text_l1 L1_CODE_START : AT(LOADADDR(.init) + SIZEOF(.init))
{
. = ALIGN(4);
- __stext_l1 = .;
+ __stext_l1 = .;
*(.l1.text)
. = ALIGN(4);
- __etext_l1 = .;
- } > l1_code AT > ram
+ __etext_l1 = .;
+ }
- .data_l1 :
+ .data_l1 L1_DATA_A_START : AT(LOADADDR(.text_l1) + SIZEOF(.text_l1))
{
. = ALIGN(4);
- __sdata_l1 = .;
+ __sdata_l1 = .;
*(.l1.data)
- __edata_l1 = .;
+ __edata_l1 = .;
. = ALIGN(4);
- __sbss_l1 = .;
+ __sbss_l1 = .;
*(.l1.bss)
. = ALIGN(32);
*(.data_l1.cacheline_aligned)
. = ALIGN(4);
- __ebss_l1 = .;
- } > l1_data_a AT > ram
- .data_b_l1 :
+ __ebss_l1 = .;
+ }
+
+ .data_b_l1 L1_DATA_B_START : AT(LOADADDR(.data_l1) + SIZEOF(.data_l1))
{
. = ALIGN(4);
__sdata_b_l1 = .;
. = ALIGN(4);
__ebss_b_l1 = .;
- } > l1_data_b AT > ram
+ }
- .data :
- {
- __sdata = .;
- . = ALIGN(0x2000);
- *(.data.init_task)
- DATA_DATA
+ ___init_end = LOADADDR(.data_b_l1) + SIZEOF(.data_b_l1);
- . = ALIGN(32);
- *(.data.cacheline_aligned)
-
- . = ALIGN(0x2000);
- __edata = .;
- } > ram
-
- /DISCARD/ : { /* Exit code and data*/
- *(.exit.text)
- *(.exit.data)
- *(.exitcall.exit)
- } > ram
-
- .bss :
+ .bss LOADADDR(.data_b_l1) + SIZEOF(.data_b_l1) :
{
. = ALIGN(4);
- ___bss_start = .;
+ ___bss_start = .;
*(.bss)
*(COMMON)
. = ALIGN(4);
- ___bss_stop = .;
- __end = . ;
- } > ram
+ ___bss_stop = .;
+ __end = .;
+ }
+
+ /DISCARD/ :
+ {
+ *(.exit.text)
+ *(.exit.data)
+ *(.exitcall.exit)
+ }
}
*/
.global ___divsi3;
+.type ___divsi3, STT_FUNC;
#ifdef CONFIG_ARITHMETIC_OPS_L1
.section .l1.text
.Lret_zero:
R0 = 0;
RTS;
+
+.size ___divsi3, .-___divsi3
.Llong_loop_e: NOP;
sti R3;
RTS;
-
+ENDPROC(_insl)
ENTRY(_insw)
P0 = R0; /* P0 = port */
.Lword_loop_e: NOP;
sti R3;
RTS;
+ENDPROC(_insw)
ENTRY(_insb)
P0 = R0; /* P0 = port */
.Lbyte_loop_e: NOP;
sti R3;
RTS;
+ENDPROC(_insb)
R0 += -1;
RTS;
-.size _memchr,.-_memchr
+ENDPROC(_memchr)
P3 = I1;
RTS;
-.size _memcmp,.-_memcmp
+ENDPROC(_memcmp)
B[P0--] = R1;
RTS;
+
+ENDPROC(_memcpy)
P3 = I1;
RTS;
-.size _memmove,.-_memmove
+ENDPROC(_memmove)
B[P0++] = R1;
JUMP .Laligned;
-.size _memset,.-_memset
+ENDPROC(_memset)
R0 = 0;
.LRETURN_R0:
RTS;
+
+.size ___modsi3, .-___modsi3
.Llong_loop_s: R0 = [P1++];
.Llong_loop_e: [P0] = R0;
RTS;
+ENDPROC(_outsl)
ENTRY(_outsw)
P0 = R0; /* P0 = port */
.Lword_loop_s: R0 = W[P1++];
.Lword_loop_e: W[P0] = R0;
RTS;
+ENDPROC(_outsw)
ENTRY(_outsb)
P0 = R0; /* P0 = port */
.Lbyte_loop_s: R0 = B[P1++];
.Lbyte_loop_e: B[P0] = R0;
RTS;
+ENDPROC(_outsb)
R0 = R0 + R1;
RTS;
+
+.size ___smulsi3_highpart, .-___smulsi3_highpart
R1 = R0 - R3;
IF CC R0 = R1;
RTS;
+
+ENDPROC(___udivsi3)
#endif
.extern ___udivsi3;
+.type ___udivsi3, STT_FUNC;
.globl ___umodsi3
+.type ___umodsi3, STT_FUNC;
___umodsi3:
CC=R0==0;
R0 = 0;
.LRETURN_R0:
RTS;
+
+.size ___umodsi3, .-___umodsi3
R1 = PACK(R1.l,R0.h);
R0 = R1 + R2;
RTS;
+
+.size ___umulsi3_highpart, .-___umulsi3_highpart
/*
* File: arch/blackfin/mach-bf533/boards/cm_bf533.c
* Based on: arch/blackfin/mach-bf533/boards/ezkit.c
- * Author: Aidan Williams <aidan@nicta.com.au> Copright 2005
+ * Author: Aidan Williams <aidan@nicta.com.au> Copyright 2005
*
* Created: 2005
* Description: Board description file
/*
* File: arch/blackfin/mach-bf533/ezkit.c
- * Based on: Orginal Work
+ * Based on: Original Work
* Author: Aidan Williams <aidan@nicta.com.au>
*
* Created: 2005
*/
#include <linux/linkage.h>
+#include <linux/init.h>
#include <asm/blackfin.h>
#if CONFIG_BFIN_KERNEL_CLOCK
#include <asm/mach/mem_init.h>
#define INITIAL_STACK 0xFFB01000
-.text
+__INIT
ENTRY(__start)
-ENTRY(__stext)
/* R0: argument of command line string, passed from uboot, save it */
R7 = R0;
- /* Set the SYSCFG register */
+ /* Set the SYSCFG register:
+ * Enable Cycle Counter and Nesting Of Interrupts (3rd Bit)
+ */
R0 = 0x36;
- /*Enable Cycle Counter and Nesting Of Interrupts(3rd Bit)*/
SYSCFG = R0;
R0 = 0;
- /*Clear Out All the data and pointer Registers*/
+ /* Clear Out All the data and pointer Registers */
R1 = R0;
R2 = R0;
R3 = R0;
L2 = r0;
L3 = r0;
- /* Clear Out All the DAG Registers*/
+ /* Clear Out All the DAG Registers */
B0 = r0;
B1 = r0;
B2 = r0;
.LWAIT_HERE:
jump .LWAIT_HERE;
+ENDPROC(__start)
ENTRY(_real_start)
[ -- sp ] = reti;
.L_clear_zero:
W[p1++] = r0;
-/* pass the uboot arguments to the global value command line */
+ /* pass the uboot arguments to the global value command line */
R0 = R7;
call _cmdline_init;
[p1] = r1;
/*
- * load the current thread pointer and stack
+ * load the current thread pointer and stack
*/
r1.l = _init_thread_union;
r1.h = _init_thread_union;
sp = r1;
usp = sp;
fp = sp;
- call _start_kernel;
-.L_exit:
- jump.s .L_exit;
+ jump.l _start_kernel;
+ENDPROC(_real_start)
+
+__FINIT
.section .l1.text
#if CONFIG_BFIN_KERNEL_CLOCK
p0.h = hi(SIC_IWR);
p0.l = lo(SIC_IWR);
- r0.l = lo(IWR_ENABLE_ALL)
- r0.h = hi(IWR_ENABLE_ALL)
+ r0.l = lo(IWR_ENABLE_ALL);
+ r0.h = hi(IWR_ENABLE_ALL);
[p0] = r0;
SSYNC;
RTS;
+ENDPROC(_start_dma_code)
#endif /* CONFIG_BFIN_KERNEL_CLOCK */
ENTRY(_bfin_reset)
* Author: Michael Hennerich
*
* Created: ?
- * Description: Set up the interupt priorities
+ * Description: Set up the interrupt priorities
*
* Modified:
* Copyright 2004-2006 Analog Devices Inc.
.end = 0x20312000,
.flags = IORESOURCE_MEM,
},{
- .start = 0x20311000, /* Attribute Memeory */
+ .start = 0x20311000, /* Attribute Memory */
.end = 0x20311FFF,
.flags = IORESOURCE_MEM,
},{
.end = 0x20312000,
.flags = IORESOURCE_MEM,
},{
- .start = 0x20311000, /* Attribute Memeory */
+ .start = 0x20311000, /* Attribute Memory */
.end = 0x20311FFF,
.flags = IORESOURCE_MEM,
},{
.end = 0x20312000,
.flags = IORESOURCE_MEM,
},{
- .start = 0x20311000, /* Attribute Memeory */
+ .start = 0x20311000, /* Attribute Memory */
.end = 0x20311FFF,
.flags = IORESOURCE_MEM,
},{
*/
#include <linux/linkage.h>
+#include <linux/init.h>
#include <asm/blackfin.h>
#if CONFIG_BFIN_KERNEL_CLOCK
#include <asm/mach/mem_init.h>
.extern ___bss_start
.extern _bf53x_relocate_l1_mem
-#define INITIAL_STACK 0xFFB01000
+#define INITIAL_STACK 0xFFB01000
-.text
+__INIT
ENTRY(__start)
-ENTRY(__stext)
/* R0: argument of command line string, passed from uboot, save it */
R7 = R0;
- /* Set the SYSCFG register */
+ /* Set the SYSCFG register:
+ * Enable Cycle Counter and Nesting Of Interrupts (3rd Bit)
+ */
R0 = 0x36;
- SYSCFG = R0; /*Enable Cycle Counter and Nesting Of Interrupts(3rd Bit)*/
+ SYSCFG = R0;
R0 = 0;
- /* Clear Out All the data and pointer Registers*/
+ /* Clear Out All the data and pointer Registers */
R1 = R0;
R2 = R0;
R3 = R0;
L2 = r0;
L3 = r0;
- /* Clear Out All the DAG Registers*/
+ /* Clear Out All the DAG Registers */
B0 = r0;
B1 = r0;
B2 = r0;
p0.h = hi(UART_DLL);
p0.l = lo(UART_DLL);
- r0 = 0x00(Z);
+ r0 = 0x0(Z);
w[p0] = r0.L;
ssync;
#if CONFIG_BFIN_KERNEL_CLOCK
call _start_dma_code;
#endif
+
/* Code for initializing Async memory banks */
p2.h = hi(EBIU_AMBCTL1);
.LWAIT_HERE:
jump .LWAIT_HERE;
+ENDPROC(__start)
ENTRY(_real_start)
[ -- sp ] = reti;
p2.h = ___bss_stop;
r0 = 0;
p2 -= p1;
- lsetup (.L_clear_bss, .L_clear_bss ) lc0 = p2;
+ lsetup (.L_clear_bss, .L_clear_bss) lc0 = p2;
.L_clear_bss:
B[p1++] = r0;
r0 = r0 >> 1;
p2 = r0;
r0 = 0;
- lsetup (.L_clear_zero, .L_clear_zero ) lc0 = p2;
+ lsetup (.L_clear_zero, .L_clear_zero) lc0 = p2;
.L_clear_zero:
W[p1++] = r0;
r1 = p3;
[p1] = r1;
-
/*
- * load the current thread pointer and stack
+ * load the current thread pointer and stack
*/
r1.l = _init_thread_union;
r1.h = _init_thread_union;
sp = r1;
usp = sp;
fp = sp;
- call _start_kernel;
-.L_exit:
- jump.s .L_exit;
+ jump.l _start_kernel;
+ENDPROC(_real_start)
+
+__FINIT
.section .l1.text
#if CONFIG_BFIN_KERNEL_CLOCK
SSYNC;
RTS;
+ENDPROC(_start_dma_code)
#endif /* CONFIG_BFIN_KERNEL_CLOCK */
ENTRY(_bfin_reset)
* Author: Michael Hennerich
*
* Created:
- * Description: Set up the interupt priorities
+ * Description: Set up the interrupt priorities
*
* Modified:
* Copyright 2004-2006 Analog Devices Inc.
/*
* File: arch/blackfin/mach-bf533/boards/cm_bf561.c
* Based on: arch/blackfin/mach-bf533/boards/ezkit.c
- * Author: Aidan Williams <aidan@nicta.com.au> Copright 2005
+ * Author: Aidan Williams <aidan@nicta.com.au> Copyright 2005
*
* Created: 2006
* Description: Board description file
char *bfin_board_name = "Bluetechnix CM BF561";
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
-/* all SPI perpherals info goes here */
+/* all SPI peripherals info goes here */
#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
static struct mtd_partition bfin_spi_flash_partitions[] = {
*/
#include <linux/linkage.h>
+#include <linux/init.h>
#include <asm/blackfin.h>
#if CONFIG_BFIN_KERNEL_CLOCK
#include <asm/mach/mem_init.h>
#define INITIAL_STACK 0xFFB01000
-.text
+__INIT
ENTRY(__start)
-ENTRY(__stext)
- /* R0: argument of command line string, passed from uboot, save it */
+ /* R0: argument of command line string, passed from uboot, save it */
R7 = R0;
- /* Set the SYSCFG register */
+ /* Set the SYSCFG register:
+ * Enable Cycle Counter and Nesting Of Interrupts (3rd Bit)
+ */
R0 = 0x36;
- SYSCFG = R0; /*Enable Cycle Counter and Nesting Of Interrupts(3rd Bit)*/
+ SYSCFG = R0;
R0 = 0;
- /*Clear Out All the data and pointer Registers*/
+ /* Clear Out All the data and pointer Registers */
R1 = R0;
R2 = R0;
R3 = R0;
L2 = r0;
L3 = r0;
- /* Clear Out All the DAG Registers*/
+ /* Clear Out All the DAG Registers */
B0 = r0;
B1 = r0;
B2 = r0;
.LWAIT_HERE:
jump .LWAIT_HERE;
+ENDPROC(__start)
ENTRY(_real_start)
[ -- sp ] = reti;
p2.h = ___bss_stop;
r0 = 0;
p2 -= p1;
- lsetup (.L_clear_bss, .L_clear_bss ) lc0 = p2;
+ lsetup (.L_clear_bss, .L_clear_bss) lc0 = p2;
.L_clear_bss:
B[p1++] = r0;
r0 = r0 >> 1;
p2 = r0;
r0 = 0;
- lsetup (.L_clear_zero, .L_clear_zero ) lc0 = p2;
+ lsetup (.L_clear_zero, .L_clear_zero) lc0 = p2;
.L_clear_zero:
W[p1++] = r0;
-/* pass the uboot arguments to the global value command line */
+ /* pass the uboot arguments to the global value command line */
R0 = R7;
call _cmdline_init;
sp = r1;
usp = sp;
fp = sp;
- call _start_kernel;
-.L_exit:
- jump.s .L_exit;
+ jump.l _start_kernel;
+ENDPROC(_real_start)
+
+__FINIT
.section .l1.text
#if CONFIG_BFIN_KERNEL_CLOCK
if ! CC jump .Lcheck_again;
/* Configure SCLK & CCLK Dividers */
- r0 = (CONFIG_CCLK_ACT_DIV | CONFIG_SCLK_DIV);
+ r0 = (CONFIG_CCLK_ACT_DIV | CONFIG_SCLK_DIV);
p0.h = hi(PLL_DIV);
p0.l = lo(PLL_DIV);
w[p0] = r0.l;
SSYNC;
RTS;
+ENDPROC(_start_dma_code)
#endif /* CONFIG_BFIN_KERNEL_CLOCK */
ENTRY(_bfin_reset)
* Author: Michael Hennerich
*
* Created:
- * Description: Set up the interupt priorities
+ * Description: Set up the interrupt priorities
*
* Modified:
* Copyright 2004-2006 Analog Devices Inc.
.Lno_dcache_b:
R7 = [SP++];
RTS;
+ENDPROC(_cache_invalidate)
/* Invalidate the Entire Instruction cache by
* disabling IMC bit
( R7:5) = [SP++];
RTS;
+ENDPROC(_invalidate_entire_icache)
+ENDPROC(_icache_invalidate)
/*
* blackfin_cache_flush_range(start, end)
IFLUSH [P0];
SSYNC;
RTS;
+ENDPROC(_blackfin_icache_flush_range)
/*
* blackfin_icache_dcache_flush_range(start, end)
FLUSH [P0];
SSYNC;
RTS;
+ENDPROC(_blackfin_icache_dcache_flush_range)
/* Throw away all D-cached data in specified region without any obligation to
* write them back. However, we must clean the D-cached entries around the
FLUSHINV[P0];
SSYNC;
RTS;
+ENDPROC(_blackfin_dcache_invalidate_range)
/* Invalidate the Entire Data cache by
* clearing DMC[1:0] bits
( R7:6) = [SP++];
RTS;
+ENDPROC(_dcache_invalidate)
+ENDPROC(_invalidate_entire_dcache)
ENTRY(_blackfin_dcache_flush_range)
R2 = -L1_CACHE_BYTES;
FLUSH[P0];
SSYNC;
RTS;
+ENDPROC(_blackfin_dcache_flush_range)
ENTRY(_blackfin_dflush_page)
P1 = 1 << (PAGE_SHIFT - L1_CACHE_SHIFT);
.Lfl1: FLUSH [P0++];
SSYNC;
RTS;
+ENDPROC(_blackfin_dflush_page)
SSYNC;
STI R2;
RTS;
+
+ENDPROC(_bfin_icache_init)
#endif
#if defined(CONFIG_BLKFIN_DCACHE)
SSYNC;
STI R2;
RTS;
+
+ENDPROC(_bfin_dcache_init)
#endif
.align 2
-.global __cplb_hdr;
-.type __cplb_hdr, STT_FUNC;
ENTRY(__cplb_hdr)
R2 = SEQSTAT;
call _panic_cplb_error;
SP += 12;
JUMP _handle_bad_cplb;
+
+ENDPROC(__cplb_hdr)
int entry = 0, used_cplb = 0;
if (type == CPLB_I) {
- buf += sprintf(buf, "Instrction CPLB entry:\n");
+ buf += sprintf(buf, "Instruction CPLB entry:\n");
p_addr = ipdt_table;
p_data = ipdt_table + 1;
p_icount = ipdt_swapcount_table;
( R7:4,P5:3 ) = [SP++];
R0 = CPLB_RELOADED;
RTS;
+ENDPROC(_cplb_mgr)
.data
.align 4;
if !cc jump _return_from_exception;
/* fall through */
#endif
+ENDPROC(_ex_dcplb)
ENTRY(_ex_icplb)
(R7:6,P5:4) = [sp++];
RESTORE_ALL_SYS
SP = RETN;
rtx;
+ENDPROC(_ex_icplb)
ENTRY(_ex_spinlock)
/* Transform this into a syscall - twiddle the syscall vector. */
[p5] = r7;
csync;
/* Fall through. */
+ENDPROC(_ex_spinlock)
ENTRY(_ex_syscall)
DEBUG_START_HWTRACE
raise 15; /* invoked by TRAP #0, for sys call */
sp = retn;
rtx
+ENDPROC(_ex_syscall)
ENTRY(_spinlock_bh)
SAVE_ALL_SYS
[SP + PT_R0] = R0;
RESTORE_ALL_SYS
rti;
+ENDPROC(_spinlock_bh)
ENTRY(_ex_soft_bp)
r7 = retx;
r7 += -2;
retx = r7;
jump.s _ex_trap_c;
+ENDPROC(_ex_soft_bp)
ENTRY(_ex_single_step)
r7 = retx;
ASTAT = [sp++];
sp = retn;
rtx;
+ENDPROC(_ex_soft_bp)
ENTRY(_handle_bad_cplb)
/* To get here, we just tried and failed to change a CPLB
SP = RETN;
raise 5;
rtx;
+ENDPROC(_ex_trap_c)
ENTRY(_exception_to_level5)
SAVE_ALL_SYS
call _ret_from_exception;
RESTORE_ALL_SYS
rti;
+ENDPROC(_exception_to_level5)
ENTRY(_trap) /* Exception: 4th entry into system event table(supervisor mode)*/
/* Since the kernel stack can be anywhere, it's not guaranteed to be
r7 = -ENOSYS; /* signextending enough */
[sp + PT_R0] = r7; /* return value from system call */
jump .Lsyscall_really_exit;
+ENDPROC(_trap)
ENTRY(_kernel_execve)
link SIZEOF_PTREGS;
1:
unlink;
rts;
+ENDPROC(_kernel_execve)
ENTRY(_system_call)
/* Store IPEND */
r5 = [sp + PT_RESERVED];
rets = r5;
rts;
+ENDPROC(_system_call)
_sys_trace:
call _syscall_trace;
call _syscall_trace;
jump .Lresume_userspace;
+ENDPROC(_sys_trace)
ENTRY(_resume)
/*
* in "new" task.
*/
rts;
+ENDPROC(_resume)
ENTRY(_ret_from_exception)
p2.l = lo(IPEND);
syscfg = r0;
5:
rts;
+ENDPROC(_ret_from_exception)
ENTRY(_return_from_int)
/* If someone else already raised IRQ 15, do nothing. */
rti;
2:
rts;
+ENDPROC(_return_from_int)
ENTRY(_lower_to_irq14)
#if defined(ANOMALY_05000281)
1:
RESTORE_CONTEXT
rti;
+ENDPROC(_lower_to_irq14)
/* Make sure when we start, that the circular buffer is initialized properly
* R0 and P0 are call clobbered, so we can use them here.
p0.l = _out_ptr_excause;
[p0] = r0;
rts;
+ENDPROC(_init_exception_buff)
/*
* Put these in the kernel data section - that should always be covered by
SP += 12;
/* - GDB stub fills this in by itself (if defined) */
rte;
+ENDPROC(_evt_emulation)
#endif
/* Common interrupt entry code. First we do CLI, then push
#endif
call _system_call;
jump .Lcommon_restore_context;
+ENDPROC(_evt_system_call)
* Author:
*
* Created: ?
- * Description: Set up the interupt priorities
+ * Description: Set up the interrupt priorities
*
* Modified:
* 1996 Roman Zippel
* Author:
*
* Created: ?
- * Description: Set up the interupt priorities
+ * Description: Set up the interrupt priorities
*
* Modified:
* 1996 Roman Zippel
( R7:0,P5:0 ) = [SP++];
RTS;
+ENDPROC(_cache_grab_lock)
/* After the execution of critical code, the code is now locked into
* the cache way. Now we need to set ILOC.
( R7:0,P5:0 ) = [SP++];
RTS;
+ENDPROC(_cache_lock)
#endif /* BLKFIN_CACHE_LOCK */
*/
ENTRY(_read_iloc)
-
P1.H = (IMEM_CONTROL >> 16);
P1.L = (IMEM_CONTROL & 0xFFFF);
R1 = 0xF;
R0 = R0 & R1;
RTS;
+ENDPROC(_read_iloc)
#include <asm/io.h>
#include <asm/dpmc.h>
#include <asm/irq.h>
-
+#include <asm/gpio.h>
#ifdef CONFIG_PM_WAKEUP_GPIO_POLAR_H
#define WAKEUP_TYPE PM_WAKE_HIGH
* Description: SRAM driver for Blackfin ADSP-BF5xx
*
* Modified:
- * Copyright 2004-2006 Analog Devices Inc.
+ * Copyright 2004-2007 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
void *paddr;
int size;
int flag;
+ pid_t pid;
};
static struct l1_sram_piece l1_ssram[CONFIG_L1_MAX_PIECE];
#endif
/* L1 Scratchpad SRAM initialization function */
-void l1sram_init(void)
+void __init l1sram_init(void)
{
printk(KERN_INFO "Blackfin Scratchpad data SRAM: %d KB\n",
L1_SCRATCH_LENGTH >> 10);
spin_lock_init(&l1sram_lock);
}
-void l1_data_sram_init(void)
+void __init l1_data_sram_init(void)
{
#if L1_DATA_A_LENGTH != 0
- printk(KERN_INFO "Blackfin DATA_A SRAM: %d KB\n",
- L1_DATA_A_LENGTH >> 10);
-
memset(&l1_data_A_sram, 0x00, sizeof(l1_data_A_sram));
- l1_data_A_sram[0].paddr = (void*)L1_DATA_A_START +
- (_ebss_l1 - _sdata_l1);
+ l1_data_A_sram[0].paddr = (void *)L1_DATA_A_START +
+ (_ebss_l1 - _sdata_l1);
l1_data_A_sram[0].size = L1_DATA_A_LENGTH - (_ebss_l1 - _sdata_l1);
l1_data_A_sram[0].flag = SRAM_SLT_FREE;
+
+ printk(KERN_INFO "Blackfin Data A SRAM: %d KB (%d KB free)\n",
+ L1_DATA_A_LENGTH >> 10, l1_data_A_sram[0].size >> 10);
#endif
#if L1_DATA_B_LENGTH != 0
- printk(KERN_INFO "Blackfin DATA_B SRAM: %d KB\n",
- L1_DATA_B_LENGTH >> 10);
-
memset(&l1_data_B_sram, 0x00, sizeof(l1_data_B_sram));
- l1_data_B_sram[0].paddr = (void*)L1_DATA_B_START;
- l1_data_B_sram[0].size = L1_DATA_B_LENGTH;
+ l1_data_B_sram[0].paddr = (void *)L1_DATA_B_START +
+ (_ebss_b_l1 - _sdata_b_l1);
+ l1_data_B_sram[0].size = L1_DATA_B_LENGTH - (_ebss_b_l1 - _sdata_b_l1);
l1_data_B_sram[0].flag = SRAM_SLT_FREE;
+
+ printk(KERN_INFO "Blackfin Data B SRAM: %d KB (%d KB free)\n",
+ L1_DATA_B_LENGTH >> 10, l1_data_B_sram[0].size >> 10);
#endif
/* mutex initialize */
spin_lock_init(&l1_data_sram_lock);
}
-void l1_inst_sram_init(void)
+void __init l1_inst_sram_init(void)
{
#if L1_CODE_LENGTH != 0
- printk(KERN_INFO "Blackfin Instruction SRAM: %d KB\n",
- L1_CODE_LENGTH >> 10);
-
memset(&l1_inst_sram, 0x00, sizeof(l1_inst_sram));
l1_inst_sram[0].paddr = (void*)L1_CODE_START + (_etext_l1 - _stext_l1);
l1_inst_sram[0].size = L1_CODE_LENGTH - (_etext_l1 - _stext_l1);
l1_inst_sram[0].flag = SRAM_SLT_FREE;
+
+ printk(KERN_INFO "Blackfin Instruction SRAM: %d KB (%d KB free)\n",
+ L1_CODE_LENGTH >> 10, l1_inst_sram[0].size >> 10);
#endif
/* mutex initialize */
size = (size + 3) & ~3;
/* not use the good method to match the best slot !!! */
- /* search an available memeory slot */
+ /* search an available memory slot */
for (i = 0; i < count; i++) {
if ((pfree[i].flag == SRAM_SLT_FREE)
&& (pfree[i].size >= size)) {
addr = pfree[i].paddr;
pfree[i].flag = SRAM_SLT_ALLOCATED;
+ pfree[i].pid = current->pid;
index = i;
break;
}
if (i >= count)
return NULL;
- /* updated the NULL memeory slot !!! */
+ /* updated the NULL memory slot !!! */
if (pfree[i].size > size) {
for (i = 0; i < count; i++) {
if (pfree[i].flag == SRAM_SLT_NULL) {
+ pfree[i].pid = 0;
pfree[i].flag = SRAM_SLT_FREE;
pfree[i].paddr = addr + size;
pfree[i].size = pfree[index].size - size;
int i, index = -1;
void *addr = NULL;
- /* search an available memeory slot */
+ /* search an available memory slot */
for (i = 0; i < count; i++) {
if (pfree[i].flag == SRAM_SLT_FREE && pfree[i].size > best) {
addr = pfree[i].paddr;
return NULL;
*psize = best;
+ pfree[index].pid = current->pid;
pfree[index].flag = SRAM_SLT_ALLOCATED;
return addr;
}
/* L1 memory free function */
static int _l1_sram_free(const void *addr,
- struct l1_sram_piece *pfree, int count)
+ struct l1_sram_piece *pfree,
+ int count)
{
int i, index = 0;
if (i >= count)
return -1;
+ pfree[index].pid = 0;
pfree[index].flag = SRAM_SLT_FREE;
/* link the next address slot */
for (i = 0; i < count; i++) {
if (((pfree[index].paddr + pfree[index].size) == pfree[i].paddr)
&& (pfree[i].flag == SRAM_SLT_FREE)) {
+ pfree[i].pid = 0;
pfree[i].flag = SRAM_SLT_NULL;
pfree[index].size += pfree[i].size;
pfree[index].flag = SRAM_SLT_FREE;
return addr;
}
EXPORT_SYMBOL(sram_alloc_with_lsl);
+
+#ifdef CONFIG_PROC_FS
+/* Once we get a real allocator, we'll throw all of this away.
+ * Until then, we need some sort of visibility into the L1 alloc.
+ */
+static void _l1sram_proc_read(char *buf, int *len, const char *desc,
+ struct l1_sram_piece *pfree, const int array_size)
+{
+ int i;
+
+ *len += sprintf(&buf[*len], "--- L1 %-14s Size PID State\n", desc);
+ for (i = 0; i < array_size; ++i) {
+ const char *alloc_type;
+ switch (pfree[i].flag) {
+ case SRAM_SLT_NULL: alloc_type = "NULL"; break;
+ case SRAM_SLT_FREE: alloc_type = "FREE"; break;
+ case SRAM_SLT_ALLOCATED: alloc_type = "ALLOCATED"; break;
+ default: alloc_type = "????"; break;
+ }
+ *len += sprintf(&buf[*len], "%p-%p %8i %4i %s\n",
+ pfree[i].paddr, pfree[i].paddr + pfree[i].size,
+ pfree[i].size, pfree[i].pid, alloc_type);
+ }
+}
+static int l1sram_proc_read(char *buf, char **start, off_t offset, int count,
+ int *eof, void *data)
+{
+ int len = 0;
+
+ _l1sram_proc_read(buf, &len, "Scratchpad",
+ l1_ssram, ARRAY_SIZE(l1_ssram));
+#if L1_DATA_A_LENGTH != 0
+ _l1sram_proc_read(buf, &len, "Data A",
+ l1_data_A_sram, ARRAY_SIZE(l1_data_A_sram));
+#endif
+#if L1_DATA_B_LENGTH != 0
+ _l1sram_proc_read(buf, &len, "Data B",
+ l1_data_B_sram, ARRAY_SIZE(l1_data_B_sram));
+#endif
+#if L1_CODE_LENGTH != 0
+ _l1sram_proc_read(buf, &len, "Instruction",
+ l1_inst_sram, ARRAY_SIZE(l1_inst_sram));
+#endif
+
+ return len;
+}
+
+static int __init l1sram_proc_init(void)
+{
+ struct proc_dir_entry *ptr;
+ ptr = create_proc_entry("sram", S_IFREG | S_IRUGO, NULL);
+ if (!ptr) {
+ printk(KERN_WARNING "unable to create /proc/sram\n");
+ return -1;
+ }
+ ptr->owner = THIS_MODULE;
+ ptr->read_proc = l1sram_proc_read;
+ return 0;
+}
+late_initcall(l1sram_proc_init);
+#endif
* Description:
*
* Modified:
- * Copyright 2004-2006 Analog Devices Inc.
+ * Copyright 2004-2007 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
unsigned long empty_zero_page;
-void show_mem(void)
+void __init show_mem(void)
{
unsigned long i;
int free = 0, total = 0, reserved = 0, shared = 0;
* The parameters are pointers to where to stick the starting and ending
* addresses of available kernel virtual memory.
*/
-void paging_init(void)
+void __init paging_init(void)
{
/*
* make sure start_mem is page aligned, otherwise bootmem and
}
}
-void mem_init(void)
+void __init mem_init(void)
{
unsigned int codek = 0, datak = 0, initk = 0;
unsigned long tmp;
}
#ifdef CONFIG_BLK_DEV_INITRD
-void free_initrd_mem(unsigned long start, unsigned long end)
+void __init free_initrd_mem(unsigned long start, unsigned long end)
{
int pages = 0;
for (; start < end; start += PAGE_SIZE) {
}
#endif
-void free_initmem(void)
+void __init free_initmem(void)
{
#ifdef CONFIG_RAMKERNEL
unsigned long addr;
-/*
- * the following code should be cool even if these sections
- * are not page aligned.
- */
+ /*
+ * the following code should be cool even if these sections
+ * are not page aligned.
+ */
addr = PAGE_ALIGN((unsigned long)(__init_begin));
/* next to check that the page we free is not a partial page */
for (; addr + PAGE_SIZE < (unsigned long)(__init_end);
static struct irqaction irq_resched = {
.handler = ipi_resched_interrupt,
- .flags = IRQF_DISABLED,
+ .flags = IRQF_DISABLED|IRQF_PERCPU,
.name = "IPI_resched"
};
static struct irqaction irq_call = {
.handler = ipi_call_interrupt,
- .flags = IRQF_DISABLED,
+ .flags = IRQF_DISABLED|IRQF_PERCPU,
.name = "IPI_call"
};
setup_irq(cpu_ipi_resched_irq, &irq_resched);
setup_irq(cpu_ipi_call_irq, &irq_call);
- /* need to mark IPI's as IRQ_PER_CPU */
- irq_desc[cpu_ipi_resched_irq].status |= IRQ_PER_CPU;
set_irq_handler(cpu_ipi_resched_irq, handle_percpu_irq);
- irq_desc[cpu_ipi_call_irq].status |= IRQ_PER_CPU;
set_irq_handler(cpu_ipi_call_irq, handle_percpu_irq);
}
void prom_init_secondary(void)
{
+ /* Enable per-cpu interrupts */
+
+ /* This is Malta specific: IPI,performance and timer inetrrupts */
write_c0_status((read_c0_status() & ~ST0_IM ) |
- (STATUSF_IP0 | STATUSF_IP1 | STATUSF_IP7));
+ (STATUSF_IP0 | STATUSF_IP1 | STATUSF_IP6 | STATUSF_IP7));
}
void prom_smp_finish(void)
EXPORT_SYMBOL(null_perf_irq);
EXPORT_SYMBOL(perf_irq);
+/*
+ * Performance counter IRQ or -1 if shared with timer
+ */
+int mipsxx_perfcount_irq;
+EXPORT_SYMBOL(mipsxx_perfcount_irq);
+
+/*
+ * Possibly handle a performance counter interrupt.
+ * Return true if the timer interrupt should not be checked
+ */
+static inline int handle_perf_irq (int r2)
+{
+ /*
+ * The performance counter overflow interrupt may be shared with the
+ * timer interrupt (mipsxx_perfcount_irq < 0). If it is and a
+ * performance counter has overflowed (perf_irq() == IRQ_HANDLED)
+ * and we can't reliably determine if a counter interrupt has also
+ * happened (!r2) then don't check for a timer interrupt.
+ */
+ return (mipsxx_perfcount_irq < 0) &&
+ perf_irq() == IRQ_HANDLED &&
+ !r2;
+}
+
asmlinkage void ll_timer_interrupt(int irq)
{
int r2 = cpu_has_mips_r2;
irq_enter();
kstat_this_cpu.irqs[irq]++;
- /*
- * Suckage alert:
- * Before R2 of the architecture there was no way to see if a
- * performance counter interrupt was pending, so we have to run the
- * performance counter interrupt handler anyway.
- */
- if (!r2 || (read_c0_cause() & (1 << 26)))
- if (perf_irq())
- goto out;
+ if (handle_perf_irq(r2))
+ goto out;
- /* we keep interrupt disabled all the time */
- if (!r2 || (read_c0_cause() & (1 << 30)))
- timer_interrupt(irq, NULL);
+ if (r2 && ((read_c0_cause() & (1 << 30)) == 0))
+ goto out;
+
+ timer_interrupt(irq, NULL);
out:
irq_exit();
static struct irqaction timer_irqaction = {
.handler = timer_interrupt,
- .flags = IRQF_DISABLED,
+ .flags = IRQF_DISABLED | IRQF_PERCPU,
.name = "timer",
};
int init_debug = 0;
-unsigned int mips_revision_corid;
+int mips_revision_corid;
+int mips_revision_sconid;
/* Bonito64 system controller register base. */
unsigned long _pcictrl_bonito;
else
mips_revision_corid = MIPS_REVISION_CORID_CORE_EMUL_MSC;
}
- switch(mips_revision_corid) {
+
+ mips_revision_sconid = MIPS_REVISION_SCONID;
+ if (mips_revision_sconid == MIPS_REVISION_SCON_OTHER) {
+ switch (mips_revision_corid) {
+ case MIPS_REVISION_CORID_QED_RM5261:
+ case MIPS_REVISION_CORID_CORE_LV:
+ case MIPS_REVISION_CORID_CORE_FPGA:
+ case MIPS_REVISION_CORID_CORE_FPGAR2:
+ mips_revision_sconid = MIPS_REVISION_SCON_GT64120;
+ break;
+ case MIPS_REVISION_CORID_CORE_EMUL_BON:
+ case MIPS_REVISION_CORID_BONITO64:
+ case MIPS_REVISION_CORID_CORE_20K:
+ mips_revision_sconid = MIPS_REVISION_SCON_BONITO;
+ break;
+ case MIPS_REVISION_CORID_CORE_MSC:
+ case MIPS_REVISION_CORID_CORE_FPGA2:
+ case MIPS_REVISION_CORID_CORE_FPGA3:
+ case MIPS_REVISION_CORID_CORE_24K:
+ case MIPS_REVISION_CORID_CORE_EMUL_MSC:
+ mips_revision_sconid = MIPS_REVISION_SCON_SOCIT;
+ break;
+ default:
+ mips_display_message("CC Error");
+ while (1); /* We die here... */
+ }
+ }
+
+ switch (mips_revision_sconid) {
u32 start, map, mask, data;
- case MIPS_REVISION_CORID_QED_RM5261:
- case MIPS_REVISION_CORID_CORE_LV:
- case MIPS_REVISION_CORID_CORE_FPGA:
- case MIPS_REVISION_CORID_CORE_FPGAR2:
+ case MIPS_REVISION_SCON_GT64120:
/*
* Setup the North bridge to do Master byte-lane swapping
* when running in bigendian.
set_io_port_base(MALTA_GT_PORT_BASE);
break;
- case MIPS_REVISION_CORID_CORE_EMUL_BON:
- case MIPS_REVISION_CORID_BONITO64:
- case MIPS_REVISION_CORID_CORE_20K:
+ case MIPS_REVISION_SCON_BONITO:
_pcictrl_bonito_pcicfg = (unsigned long)ioremap(BONITO_PCICFG_BASE, BONITO_PCICFG_SIZE);
/*
set_io_port_base(MALTA_BONITO_PORT_BASE);
break;
- case MIPS_REVISION_CORID_CORE_MSC:
- case MIPS_REVISION_CORID_CORE_FPGA2:
- case MIPS_REVISION_CORID_CORE_FPGA3:
- case MIPS_REVISION_CORID_CORE_24K:
- case MIPS_REVISION_CORID_CORE_EMUL_MSC:
+ case MIPS_REVISION_SCON_SOCIT:
+ case MIPS_REVISION_SCON_ROCIT:
_pcictrl_msc = (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE, 0x2000);
-
+ mips_pci_controller:
mb();
MSC_READ(MSC01_PCI_CFG, data);
MSC_WRITE(MSC01_PCI_CFG, data & ~MSC01_PCI_CFG_EN_BIT);
set_io_port_base(MALTA_MSC_PORT_BASE);
break;
+ case MIPS_REVISION_SCON_SOCITSC:
+ case MIPS_REVISION_SCON_SOCITSCP:
+ _pcictrl_msc = (unsigned long)ioremap(MIPS_SOCITSC_PCI_REG_BASE, 0x2000);
+ goto mips_pci_controller;
+
default:
- /* Unknown Core card */
- mips_display_message("CC Error");
- while(1); /* We die here... */
+ /* Unknown system controller */
+ mips_display_message("SC Error");
+ while (1); /* We die here... */
}
#endif
board_nmi_handler_setup = mips_nmi_setup;
struct pci_controller *controller;
resource_size_t start, end, map, start1, end1, map1, map2, map3, mask;
- switch (mips_revision_corid) {
- case MIPS_REVISION_CORID_QED_RM5261:
- case MIPS_REVISION_CORID_CORE_LV:
- case MIPS_REVISION_CORID_CORE_FPGA:
- case MIPS_REVISION_CORID_CORE_FPGAR2:
+ switch (mips_revision_sconid) {
+ case MIPS_REVISION_SCON_GT64120:
/*
* Due to a bug in the Galileo system controller, we need
* to setup the PCI BAR for the Galileo internal registers.
controller = >64120_controller;
break;
- case MIPS_REVISION_CORID_BONITO64:
- case MIPS_REVISION_CORID_CORE_20K:
- case MIPS_REVISION_CORID_CORE_EMUL_BON:
+ case MIPS_REVISION_SCON_BONITO:
/* Set up resource ranges from the controller's registers. */
map = BONITO_PCIMAP;
map1 = (BONITO_PCIMAP & BONITO_PCIMAP_PCIMAP_LO0) >>
controller = &bonito64_controller;
break;
- case MIPS_REVISION_CORID_CORE_MSC:
- case MIPS_REVISION_CORID_CORE_FPGA2:
- case MIPS_REVISION_CORID_CORE_FPGA3:
- case MIPS_REVISION_CORID_CORE_24K:
- case MIPS_REVISION_CORID_CORE_EMUL_MSC:
+ case MIPS_REVISION_SCON_SOCIT:
+ case MIPS_REVISION_SCON_ROCIT:
+ case MIPS_REVISION_SCON_SOCITSC:
+ case MIPS_REVISION_SCON_SOCITSCP:
/* Set up resource ranges from the controller's registers. */
MSC_READ(MSC01_PCI_SC2PMBASL, start);
MSC_READ(MSC01_PCI_SC2PMMSKL, mask);
unsigned long cpu_khz;
-#define CPUCTR_IMASKBIT (0x100 << MIPSCPU_INT_CPUCTR)
-
static int mips_cpu_timer_irq;
+extern int mipsxx_perfcount_irq;
extern void smtc_timer_broadcast(int);
static void mips_timer_dispatch(void)
do_IRQ(mips_cpu_timer_irq);
}
+static void mips_perf_dispatch(void)
+{
+ do_IRQ(mipsxx_perfcount_irq);
+}
+
/*
* Redeclare until I get around mopping the timer code insanity on MIPS.
*/
extern int (*perf_irq)(void);
+/*
+ * Possibly handle a performance counter interrupt.
+ * Return true if the timer interrupt should not be checked
+ */
+static inline int handle_perf_irq (int r2)
+{
+ /*
+ * The performance counter overflow interrupt may be shared with the
+ * timer interrupt (mipsxx_perfcount_irq < 0). If it is and a
+ * performance counter has overflowed (perf_irq() == IRQ_HANDLED)
+ * and we can't reliably determine if a counter interrupt has also
+ * happened (!r2) then don't check for a timer interrupt.
+ */
+ return (mipsxx_perfcount_irq < 0) &&
+ perf_irq() == IRQ_HANDLED &&
+ !r2;
+}
+
irqreturn_t mips_timer_interrupt(int irq, void *dev_id)
{
int cpu = smp_processor_id();
* We could be here due to timer interrupt,
* perf counter overflow, or both.
*/
- if (read_c0_cause() & (1 << 26))
- perf_irq();
+ (void) handle_perf_irq(1);
if (read_c0_cause() & (1 << 30)) {
/*
#else /* CONFIG_MIPS_MT_SMTC */
int r2 = cpu_has_mips_r2;
+ if (handle_perf_irq(r2))
+ goto out;
+
+ if (r2 && ((read_c0_cause() & (1 << 30)) == 0))
+ goto out;
+
if (cpu == 0) {
/*
* CPU 0 handles the global timer interrupt job and process
* accounting resets count/compare registers to trigger next
* timer int.
*/
- if (!r2 || (read_c0_cause() & (1 << 26)))
- if (perf_irq())
- goto out;
-
- /* we keep interrupt disabled all the time */
- if (!r2 || (read_c0_cause() & (1 << 30)))
- timer_interrupt(irq, NULL);
+ timer_interrupt(irq, NULL);
} else {
/* Everyone else needs to reset the timer int here as
ll_local_timer_interrupt doesn't */
mips_scroll_message();
}
+irqreturn_t mips_perf_interrupt(int irq, void *dev_id)
+{
+ return perf_irq();
+}
+
+static struct irqaction perf_irqaction = {
+ .handler = mips_perf_interrupt,
+ .flags = IRQF_DISABLED | IRQF_PERCPU,
+ .name = "performance",
+};
+
+void __init plat_perf_setup(struct irqaction *irq)
+{
+ int hwint = 0;
+ mipsxx_perfcount_irq = -1;
+
+#ifdef MSC01E_INT_BASE
+ if (cpu_has_veic) {
+ set_vi_handler (MSC01E_INT_PERFCTR, mips_perf_dispatch);
+ mipsxx_perfcount_irq = MSC01E_INT_BASE + MSC01E_INT_PERFCTR;
+ } else
+#endif
+ if (cpu_has_mips_r2) {
+ /*
+ * Read IntCtl.IPPCI to determine the performance
+ * counter interrupt
+ */
+ hwint = (read_c0_intctl () >> 26) & 7;
+ if (hwint != MIPSCPU_INT_CPUCTR) {
+ if (cpu_has_vint)
+ set_vi_handler (hwint, mips_perf_dispatch);
+ mipsxx_perfcount_irq = MIPSCPU_INT_BASE + hwint;
+ }
+ }
+ if (mipsxx_perfcount_irq >= 0) {
+#ifdef CONFIG_MIPS_MT_SMTC
+ setup_irq_smtc(mipsxx_perfcount_irq, irq, 0x100 << hwint);
+#else
+ setup_irq(mipsxx_perfcount_irq, irq);
+#endif /* CONFIG_MIPS_MT_SMTC */
+#ifdef CONFIG_SMP
+ set_irq_handler(mipsxx_perfcount_irq, handle_percpu_irq);
+#endif
+ }
+}
+
void __init plat_timer_setup(struct irqaction *irq)
{
+ int hwint = 0;
#ifdef MSC01E_INT_BASE
if (cpu_has_veic) {
set_vi_handler (MSC01E_INT_CPUCTR, mips_timer_dispatch);
mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR;
- } else
+ }
+ else
#endif
{
+ if (cpu_has_mips_r2)
+ /*
+ * Read IntCtl.IPTI to determine the timer interrupt
+ */
+ hwint = (read_c0_intctl () >> 29) & 7;
+ else
+ hwint = MIPSCPU_INT_CPUCTR;
if (cpu_has_vint)
- set_vi_handler (MIPSCPU_INT_CPUCTR, mips_timer_dispatch);
- mips_cpu_timer_irq = MIPSCPU_INT_BASE + MIPSCPU_INT_CPUCTR;
+ set_vi_handler (hwint, mips_timer_dispatch);
+ mips_cpu_timer_irq = MIPSCPU_INT_BASE + hwint;
}
-
/* we are using the cpu counter for timer interrupts */
irq->handler = mips_timer_interrupt; /* we use our own handler */
#ifdef CONFIG_MIPS_MT_SMTC
- setup_irq_smtc(mips_cpu_timer_irq, irq, CPUCTR_IMASKBIT);
+ setup_irq_smtc(mips_cpu_timer_irq, irq, 0x100 << hwint);
#else
setup_irq(mips_cpu_timer_irq, irq);
#endif /* CONFIG_MIPS_MT_SMTC */
-
#ifdef CONFIG_SMP
- /* irq_desc(riptor) is a global resource, when the interrupt overlaps
- on seperate cpu's the first one tries to handle the second interrupt.
- The effect is that the int remains disabled on the second cpu.
- Mark the interrupt with IRQ_PER_CPU to avoid any confusion */
- irq_desc[mips_cpu_timer_irq].status |= IRQ_PER_CPU;
set_irq_handler(mips_cpu_timer_irq, handle_percpu_irq);
#endif
+
+ plat_perf_setup(&perf_irqaction);
}
* Determine highest priority pending interrupt by performing
* a PCI Interrupt Acknowledge cycle.
*/
- switch(mips_revision_corid) {
- case MIPS_REVISION_CORID_CORE_MSC:
- case MIPS_REVISION_CORID_CORE_FPGA2:
- case MIPS_REVISION_CORID_CORE_FPGA3:
- case MIPS_REVISION_CORID_CORE_24K:
- case MIPS_REVISION_CORID_CORE_EMUL_MSC:
+ switch (mips_revision_sconid) {
+ case MIPS_REVISION_SCON_SOCIT:
+ case MIPS_REVISION_SCON_ROCIT:
+ case MIPS_REVISION_SCON_SOCITSC:
+ case MIPS_REVISION_SCON_SOCITSCP:
MSC_READ(MSC01_PCI_IACK, irq);
irq &= 0xff;
break;
- case MIPS_REVISION_CORID_QED_RM5261:
- case MIPS_REVISION_CORID_CORE_LV:
- case MIPS_REVISION_CORID_CORE_FPGA:
- case MIPS_REVISION_CORID_CORE_FPGAR2:
+ case MIPS_REVISION_SCON_GT64120:
irq = GT_READ(GT_PCI0_IACK_OFS);
irq &= 0xff;
break;
- case MIPS_REVISION_CORID_BONITO64:
- case MIPS_REVISION_CORID_CORE_20K:
- case MIPS_REVISION_CORID_CORE_EMUL_BON:
+ case MIPS_REVISION_SCON_BONITO:
/* The following will generate a PCI IACK cycle on the
* Bonito controller. It's a little bit kludgy, but it
* was the easiest way to implement it in hardware at
BONITO_PCIMAP_CFG = 0;
break;
default:
- printk("Unknown Core card, don't know the system controller.\n");
+ printk("Unknown system controller.\n");
return -1;
}
return irq;
Do it for the others too.
*/
- switch(mips_revision_corid) {
- case MIPS_REVISION_CORID_CORE_MSC:
- case MIPS_REVISION_CORID_CORE_FPGA2:
- case MIPS_REVISION_CORID_CORE_FPGA3:
- case MIPS_REVISION_CORID_CORE_24K:
- case MIPS_REVISION_CORID_CORE_EMUL_MSC:
+ switch (mips_revision_sconid) {
+ case MIPS_REVISION_SCON_SOCIT:
+ case MIPS_REVISION_SCON_ROCIT:
+ case MIPS_REVISION_SCON_SOCITSC:
+ case MIPS_REVISION_SCON_SOCITSCP:
ll_msc_irq();
break;
- case MIPS_REVISION_CORID_QED_RM5261:
- case MIPS_REVISION_CORID_CORE_LV:
- case MIPS_REVISION_CORID_CORE_FPGA:
- case MIPS_REVISION_CORID_CORE_FPGAR2:
+ case MIPS_REVISION_SCON_GT64120:
intrcause = GT_READ(GT_INTRCAUSE_OFS);
datalo = GT_READ(GT_CPUERR_ADDRLO_OFS);
datahi = GT_READ(GT_CPUERR_ADDRHI_OFS);
printk("GT_INTRCAUSE = %08x\n", intrcause);
printk("GT_CPUERR_ADDR = %02x%08x\n", datahi, datalo);
break;
- case MIPS_REVISION_CORID_BONITO64:
- case MIPS_REVISION_CORID_CORE_20K:
- case MIPS_REVISION_CORID_CORE_EMUL_BON:
+ case MIPS_REVISION_SCON_BONITO:
pcibadaddr = BONITO_PCIBADADDR;
pcimstat = BONITO_PCIMSTAT;
intisr = BONITO_INTISR;
kgdb_config ();
#endif
- if ((mips_revision_corid == MIPS_REVISION_CORID_BONITO64) ||
- (mips_revision_corid == MIPS_REVISION_CORID_CORE_20K) ||
- (mips_revision_corid == MIPS_REVISION_CORID_CORE_EMUL_BON)) {
+ if (mips_revision_sconid == MIPS_REVISION_SCON_BONITO) {
char *argptr;
argptr = prom_getcmdline();
unsigned int counters = op_model_mipsxx_ops.num_counters;
unsigned int control;
unsigned int counter;
- int handled = 0;
+ int handled = IRQ_NONE;
+
+ if (cpu_has_mips_r2 && !(read_c0_cause() & (1 << 26)))
+ return handled;
switch (counters) {
#define HANDLE_COUNTER(n) \
(counter & M_COUNTER_OVERFLOW)) { \
oprofile_add_sample(get_irq_regs(), n); \
w_c0_perfcntr ## n(reg.counter[n]); \
- handled = 1; \
+ handled = IRQ_HANDLED; \
}
HANDLE_COUNTER(3)
HANDLE_COUNTER(2)
static int early_console_initialized;
-/* called by setup_system */
+/*
+ * Called by setup_system after ppc_md->probe and ppc_md->early_init.
+ * Call it again after setting udbg_putc in ppc_md->setup_arch.
+ */
void register_early_udbg_console(void)
{
if (early_console_initialized)
return;
+ if (!udbg_putc)
+ return;
+
if (strstr(boot_command_line, "udbg-immortal")) {
printk(KERN_INFO "early console immortal !\n");
udbg_console.flags &= ~CON_BOOT;
smp_ops = &core99_smp_ops;
}
#ifdef CONFIG_PPC32
- else
+ else {
+ /*
+ * We have to set bits in cpu_possible_map here since the
+ * secondary CPU(s) aren't in the device tree, and
+ * setup_per_cpu_areas only allocates per-cpu data for
+ * CPUs in the cpu_possible_map.
+ */
+ int cpu;
+
+ for (cpu = 1; cpu < 4 && cpu < NR_CPUS; ++cpu)
+ cpu_set(cpu, cpu_possible_map);
smp_ops = &psurge_smp_ops;
+ }
#endif
#endif /* CONFIG_SMP */
ncpus = NR_CPUS;
for (i = 1; i < ncpus ; ++i) {
cpu_set(i, cpu_present_map);
- cpu_set(i, cpu_possible_map);
set_hard_smp_processor_id(i, i);
}
if (rq == &q->post_flush_rq)
return QUEUE_ORDSEQ_POSTFLUSH;
+ /*
+ * !fs requests don't need to follow barrier ordering. Always
+ * put them at the front. This fixes the following deadlock.
+ *
+ * http://thread.gmane.org/gmane.linux.kernel/537473
+ */
+ if (!blk_fs_request(rq))
+ return QUEUE_ORDSEQ_DRAIN;
+
if ((rq->cmd_flags & REQ_ORDERED_COLOR) ==
(q->orig_bar_rq->cmd_flags & REQ_ORDERED_COLOR))
return QUEUE_ORDSEQ_DRAIN;
char *host_fx_image;
char *guest_fx_image;
int fpu_active;
+ int guest_fpu_loaded;
int mmio_needed;
int mmio_read_completed;
void load_msrs(struct vmx_msr_entry *e, int n);
void save_msrs(struct vmx_msr_entry *e, int n);
void kvm_resched(struct kvm_vcpu *vcpu);
+void kvm_load_guest_fpu(struct kvm_vcpu *vcpu);
+void kvm_put_guest_fpu(struct kvm_vcpu *vcpu);
int kvm_read_guest(struct kvm_vcpu *vcpu,
gva_t addr,
}
EXPORT_SYMBOL_GPL(kvm_write_guest);
+void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
+{
+ if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
+ return;
+
+ vcpu->guest_fpu_loaded = 1;
+ fx_save(vcpu->host_fx_image);
+ fx_restore(vcpu->guest_fx_image);
+}
+EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
+
+void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
+{
+ if (!vcpu->guest_fpu_loaded)
+ return;
+
+ vcpu->guest_fpu_loaded = 0;
+ fx_save(vcpu->guest_fx_image);
+ fx_restore(vcpu->host_fx_image);
+}
+EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
+
/*
* Switches to specified vcpu, until a matching vcpu_put()
*/
static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
{
+ kvm_put_guest_fpu(vcpu);
put_cpu();
}
if (vcpu->guest_debug.enabled)
kvm_guest_debug_pre(vcpu);
- if (vcpu->fpu_active) {
- fx_save(vcpu->host_fx_image);
- fx_restore(vcpu->guest_fx_image);
- }
+ kvm_load_guest_fpu(vcpu);
+
/*
* Loading guest fpu may have cleared host cr0.ts
*/
}
#endif
- if (vcpu->fpu_active) {
- fx_save(vcpu->guest_fx_image);
- fx_restore(vcpu->host_fx_image);
- }
-
vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;
asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
#elif defined(CONFIG_BFIN)
#define SMC_IRQ_FLAGS IRQF_TRIGGER_HIGH
+#define RPC_LSA_DEFAULT RPC_LED_100_10
+#define RPC_LSB_DEFAULT RPC_LED_TX_RX
# if defined (CONFIG_BFIN561_EZKIT)
#define SMC_CAN_USE_8BIT 0
uart->port.icount.brk++;
if (uart_handle_break(&uart->port))
goto ignore_char;
+ status &= ~(PE | FE);
}
if (status & PE)
uart->port.icount.parity++;
uart->port.icount.brk++;
if (uart_handle_break(&uart->port))
goto dma_ignore_char;
+ status &= ~(PE | FE);
}
if (status & PE)
uart->port.icount.parity++;
*/
static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
{
+ struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
+ u16 lcr = UART_GET_LCR(uart);
+ if (break_state)
+ lcr |= SB;
+ else
+ lcr &= ~SB;
+ UART_PUT_LCR(uart, lcr);
+ SSYNC();
}
static int bfin_serial_startup(struct uart_port *port)
if (termios->c_cflag & CSTOPB)
lcr |= STB;
- if (termios->c_cflag & PARENB) {
+ if (termios->c_cflag & PARENB)
lcr |= PEN;
- if (!(termios->c_cflag & PARODD))
- lcr |= EPS;
- }
+ if (!(termios->c_cflag & PARODD))
+ lcr |= EPS;
+ if (termios->c_cflag & CMSPAR)
+ lcr |= STP;
port->read_status_mask = OE;
if (termios->c_iflag & INPCK)
dev_dbg(&drv_data->pdev->dev, "in dma_irq_handler\n");
clear_dma_irqstat(CH_SPI);
+ /* Wait for DMA to complete */
+ while (get_dma_curr_irqstat(CH_SPI) & DMA_RUN)
+ continue;
+
/*
- * wait for the last transaction shifted out. yes, these two
- * while loops are supposed to be the same (see the HRM).
+ * wait for the last transaction shifted out. HRM states:
+ * at this point there may still be data in the SPI DMA FIFO waiting
+ * to be transmitted ... software needs to poll TXS in the SPI_STAT
+ * register until it goes low for 2 successive reads
*/
if (drv_data->tx != NULL) {
- while (bfin_read_SPI_STAT() & TXS)
- continue;
- while (bfin_read_SPI_STAT() & TXS)
+ while ((bfin_read_SPI_STAT() & TXS) ||
+ (bfin_read_SPI_STAT() & TXS))
continue;
}
*/
static void cleanup(struct spi_device *spi)
{
- struct chip_data *chip = spi_get_ctldata((struct spi_device *)spi);
+ struct chip_data *chip = spi_get_ctldata(spi);
kfree(chip);
}
static ssize_t splice_to_pipe(struct pipe_inode_info *pipe,
struct splice_pipe_desc *spd)
{
+ unsigned int spd_pages = spd->nr_pages;
int ret, do_wakeup, page_nr;
ret = 0;
pipe->waiting_writers--;
}
- if (pipe->inode)
+ if (pipe->inode) {
mutex_unlock(&pipe->inode->i_mutex);
- if (do_wakeup) {
- smp_mb();
- if (waitqueue_active(&pipe->wait))
- wake_up_interruptible(&pipe->wait);
- kill_fasync(&pipe->fasync_readers, SIGIO, POLL_IN);
+ if (do_wakeup) {
+ smp_mb();
+ if (waitqueue_active(&pipe->wait))
+ wake_up_interruptible(&pipe->wait);
+ kill_fasync(&pipe->fasync_readers, SIGIO, POLL_IN);
+ }
}
- while (page_nr < spd->nr_pages)
+ while (page_nr < spd_pages)
page_cache_release(spd->pages[page_nr++]);
return ret;
ret = __splice_from_pipe(pipe, out, ppos, len, flags, pipe_to_file);
if (ret > 0) {
+ unsigned long nr_pages;
+
*ppos += ret;
+ nr_pages = (ret + PAGE_CACHE_SIZE - 1) >> PAGE_CACHE_SHIFT;
/*
* If file or inode is SYNC and we actually wrote some data,
if (err)
ret = err;
}
- balance_dirty_pages_ratelimited(mapping);
+ balance_dirty_pages_ratelimited_nr(mapping, nr_pages);
}
return ret;
ret = splice_from_pipe(pipe, out, ppos, len, flags, pipe_to_file);
if (ret > 0) {
+ unsigned long nr_pages;
+
*ppos += ret;
+ nr_pages = (ret + PAGE_CACHE_SIZE - 1) >> PAGE_CACHE_SHIFT;
/*
* If file or inode is SYNC and we actually wrote some data,
if (err)
ret = err;
}
- balance_dirty_pages_ratelimited(mapping);
+ balance_dirty_pages_ratelimited_nr(mapping, nr_pages);
}
return ret;
int gpio_get_value(unsigned int gpio);
void gpio_set_value(unsigned int gpio, int value);
+#include <asm-generic/gpio.h> /* cansleep wrappers */
+
static inline int gpio_to_irq(unsigned int gpio)
{
return gpio + GPIO_IRQ_BASE;
#define L1_CACHE_SHIFT 5
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
+/*
+ * Memory returned by kmalloc() may be used for DMA, so we must make
+ * sure that all such allocations are cache aligned. Otherwise,
+ * unrelated code may cause parts of the buffer to be read into the
+ * cache before the transfer is done, causing old data to be seen by
+ * the CPU.
+ */
+#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
+
#ifndef __ASSEMBLER__
struct cache_info {
unsigned int ways;
#ifndef _BLACKFIN_H_
#define _BLACKFIN_H_
-#include <asm/macros.h>
+#define LO(con32) ((con32) & 0xFFFF)
+#define lo(con32) ((con32) & 0xFFFF)
+#define HI(con32) (((con32) >> 16) & 0xFFFF)
+#define hi(con32) (((con32) >> 16) & 0xFFFF)
+
#include <asm/mach/blackfin.h>
#include <asm/bfin-global.h>
unsigned short inen;
unsigned short fer;
+ unsigned short reserved;
};
#endif /*CONFIG_PM*/
#if defined(ANOMALY_05000198)
+#define bfin_read8(addr) ({ unsigned char __v; \
+ __asm__ __volatile__ ("NOP;\n\t" \
+ "%0 = b[%1] (z);\n\t" \
+ : "=d"(__v) : "a"(addr)); \
+ __v; })
+
#define bfin_read16(addr) ({ unsigned __v; \
__asm__ __volatile__ ("NOP;\n\t"\
"%0 = w[%1] (z);\n\t"\
"%0 = [%1];\n\t"\
: "=d"(__v) : "a"(addr)); __v; })
+#define bfin_write8(addr, val) ({ \
+ __asm__ __volatile__ ("NOP;\n\t" \
+ "b[%0] = %1;\n\t" \
+ : : "a"(addr), "d"(val) : "memory");})
+
#define bfin_write16(addr,val) ({\
__asm__ __volatile__ ("NOP;\n\t"\
"w[%0] = %1;\n\t"\
#else
+#define bfin_read8(addr) ({ unsigned char __v; \
+ __asm__ __volatile__ ( \
+ "%0 = b[%1] (z);\n\t" \
+ :"=d"(__v) : "a"(addr)); \
+ __v; })
+
#define bfin_read16(addr) ({ unsigned __v; \
__asm__ __volatile__ (\
"%0 = w[%1] (z);\n\t"\
"%0 = [%1];\n\t"\
: "=d"(__v) : "a"(addr)); __v; })
+#define bfin_write8(addr, val) ({ \
+ __asm__ __volatile__ ( \
+ "b[%0] = %1; \n\t" \
+ ::"a"(addr), "d"(val) : "memory");})
+
#define bfin_write16(addr,val) ({\
__asm__ __volatile__ (\
"w[%0] = %1;\n\t"\
-/************************************************************************
- *
- * macros.h
- *
- * (c) Copyright 2001-2003 Analog Devices, Inc. All rights reserved.
- *
- ************************************************************************/
-
-/* Defines various assembly macros. */
-
-#ifndef _MACROS_H
-#define _MACROS_H
-
-#define LO(con32) ((con32) & 0xFFFF)
-#define lo(con32) ((con32) & 0xFFFF)
-#define HI(con32) (((con32) >> 16) & 0xFFFF)
-#define hi(con32) (((con32) >> 16) & 0xFFFF)
-
-/*
- * Set the corresponding bits in a System Register (SR);
- * All bits set in "mask" will be set in the system register
- * specified by "sys_reg" bitset_SR(sys_reg, mask), where
- * sys_reg is the system register and mask are the bits to be set.
- */
-#define bitset_SR(sys_reg, mask)\
- [--SP] = (R7:6);\
- r7 = sys_reg;\
- r6.l = (mask) & 0xffff;\
- r6.h = (mask) >> 16;\
- r7 = r7 | r6;\
- sys_reg = r7;\
- csync;\
- (R7:6) = [SP++]
-
-/*
- * Clear the corresponding bits in a System Register (SR);
- * All bits set in "mask" will be cleared in the SR
- * specified by "sys_reg" bitclr_SR(sys_reg, mask), where
- * sys_reg is the SR and mask are the bits to be cleared.
- */
-#define bitclr_SR(sys_reg, mask)\
- [--SP] = (R7:6);\
- r7 = sys_reg;\
- r7 =~ r7;\
- r6.l = (mask) & 0xffff;\
- r6.h = (mask) >> 16;\
- r7 = r7 | r6;\
- r7 =~ r7;\
- sys_reg = r7;\
- csync;\
- (R7:6) = [SP++]
-
-/*
- * Set the corresponding bits in a Memory Mapped Register (MMR);
- * All bits set in "mask" will be set in the MMR specified by "mmr_reg"
- * bitset_MMR(mmr_reg, mask), where mmr_reg is the MMR and mask are
- * the bits to be set.
- */
-#define bitset_MMR(mmr_reg, mask)\
- [--SP] = (R7:6);\
- [--SP] = P5;\
- p5.l = mmr_reg & 0xffff;\
- p5.h = mmr_reg >> 16;\
- r7 = [p5];\
- r6.l = (mask) & 0xffff;\
- r6.h = (mask) >> 16;\
- r7 = r7 | r6;\
- [p5] = r7;\
- csync;\
- p5 = [SP++];\
- (R7:6) = [SP++]
-
-/*
- * Clear the corresponding bits in a Memory Mapped Register (MMR);
- * All bits set in "mask" will be cleared in the MMR specified by "mmr_reg"
- * bitclr_MMRreg(mmr_reg, mask), where sys_reg is the MMR and mask are
- * the bits to be cleared.
- */
-#define bitclr_MMR(mmr_reg, mask)\
- [--SP] = (R7:6);\
- [--SP] = P5;\
- p5.l = mmr_reg & 0xffff;\
- p5.h = mmr_reg >> 16;\
- r7 = [p5];\
- r7 =~ r7;\
- r6.l = (mask) & 0xffff;\
- r6.h = (mask) >> 16;\
- r7 = r7 | r6;\
- r7 =~ r7;\
- [p5] = r7;\
- csync;\
- p5 = [SP++];\
- (R7:6) = [SP++]
-
-#endif /* _MACROS_H */
* CoreEMUL with Bonito System Controller is treated like a Core20K
* CoreEMUL with SOC-it 101 System Controller is treated like a CoreMSC
*/
-#define MIPS_REVISION_CORID_CORE_EMUL_BON 0x63
-#define MIPS_REVISION_CORID_CORE_EMUL_MSC 0x65
+#define MIPS_REVISION_CORID_CORE_EMUL_BON -1
+#define MIPS_REVISION_CORID_CORE_EMUL_MSC -2
#define MIPS_REVISION_CORID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 10) & 0x3f)
-extern unsigned int mips_revision_corid;
+extern int mips_revision_corid;
+
+#define MIPS_REVISION_SCON_OTHER 0
+#define MIPS_REVISION_SCON_SOCITSC 1
+#define MIPS_REVISION_SCON_SOCITSCP 2
+
+/* Artificial SCON defines for MIPS_REVISION_SCON_OTHER */
+#define MIPS_REVISION_SCON_UNKNOWN -1
+#define MIPS_REVISION_SCON_GT64120 -2
+#define MIPS_REVISION_SCON_BONITO -3
+#define MIPS_REVISION_SCON_BRTL -4
+#define MIPS_REVISION_SCON_SOCIT -5
+#define MIPS_REVISION_SCON_ROCIT -6
+
+#define MIPS_REVISION_SCONID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 24) & 0xff)
+
+extern int mips_revision_sconid;
#ifdef CONFIG_PCI
extern void mips_pcibios_init(void);
* latter, they should be moved elsewhere.
*/
#define MIPS_MSC01_PCI_REG_BASE 0x1bd00000
+#define MIPS_SOCITSC_PCI_REG_BASE 0x1ff10000
extern unsigned long _pcictrl_msc;
memmap_init_zone((size), (nid), (zone), (start_pfn), MEMMAP_EARLY)
#endif
-static int __cpuinit zone_batchsize(struct zone *zone)
+static int __devinit zone_batchsize(struct zone *zone)
{
int batch;
projects / karo-tx-linux.git / commitdiff