From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Mon, 1 Aug 2016 22:27:08 +0000 (-0400)
Subject: Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
X-Git-Tag: v4.8-rc1~70
X-Git-Url: https://git.kernelconcepts.de/?a=commitdiff_plain;h=fbae5cbb43512446ba15a3b90039cb127d22ee95;p=karo-tx-linux.git

Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform updates from Olof Johansson:
 "Improved and new platform support for various SoCs:

  New SoC support:
   - Broadcom BCM23550
   - Freescale i.MX7Solo
   - Qualcomm MDM9615
   - Renesas r8a7792

  Improvements:
   - convert clps711x to multiplatform
   - debug uart improvements for Atmel platforms
   - Tango platform improvements: HOTPLUG_CPU, Suspend-to-ram
   - OMAP tweaks and improvements to hwmod
   - OMAP support for kexec on SMP"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (109 commits)
  ARM: davinci: fix build break because of undeclared dm365_evm_snd_data
  ARM: s3c64xx: smartq: Avoid sparse warnings
  ARM: sti: Implement dummy L2 cache's write_sec
  ARM: STi: Update machine _namestr to be more generic.
  arm: meson: explicitly select clk drivers
  ARM: tango: add Suspend-to-RAM support
  ARM: hisi: consolidate the hisilicon machine entries
  ARM: tango: fix CONFIG_HOTPLUG_CPU=n build
  MAINTAINERS: Update BCM281XX/BCM11XXX/BCM216XX entry
  MAINTAINERS: Update BCM63XX entry
  MAINTAINERS: Add NS2 entry
  MAINTAINERS: Fix nsp false-positives
  MAINTAINERS: Change L to M for Broadcom ARM/ARM64 SoC entries
  ARM: debug: Enable DEBUG_BCM_5301X for Northstar Plus SoCs
  ARM: clps711x: Switch to MULTIPLATFORM
  ARM: clps711x: Remove boards support
  ARM: clps711x: Add basic DT support
  ARM: clps711x: Reduce static map size
  ARM: SAMSUNG: Constify iomem address passed to s5p_init_cpu
  ARM: oxnas: Change OX810SE default driver config
  ...
---

fbae5cbb43512446ba15a3b90039cb127d22ee95
diff --cc arch/arm/mach-bcm/board_bcm21664.c
index 0d7034c57334,65b3db06e57a..c5bf01641172
--- a/arch/arm/mach-bcm/board_bcm21664.c
+++ b/arch/arm/mach-bcm/board_bcm21664.c
@@@ -11,54 -11,15 +11,12 @@@
   * GNU General Public License for more details.
   */
  
- #include <linux/of_address.h>
- #include <linux/io.h>
 -#include <linux/of_platform.h>
--
  #include <asm/mach/arch.h>
  
  #include "kona_l2_cache.h"
  
- #define RSTMGR_DT_STRING		"brcm,bcm21664-resetmgr"
- 
- #define RSTMGR_REG_WR_ACCESS_OFFSET	0
- #define RSTMGR_REG_CHIP_SOFT_RST_OFFSET	4
- 
- #define RSTMGR_WR_PASSWORD		0xa5a5
- #define RSTMGR_WR_PASSWORD_SHIFT	8
- #define RSTMGR_WR_ACCESS_ENABLE		1
- 
- static void bcm21664_restart(enum reboot_mode mode, const char *cmd)
- {
- 	void __iomem *base;
- 	struct device_node *resetmgr;
- 
- 	resetmgr = of_find_compatible_node(NULL, NULL, RSTMGR_DT_STRING);
- 	if (!resetmgr) {
- 		pr_emerg("Couldn't find " RSTMGR_DT_STRING "\n");
- 		return;
- 	}
- 	base = of_iomap(resetmgr, 0);
- 	if (!base) {
- 		pr_emerg("Couldn't map " RSTMGR_DT_STRING "\n");
- 		return;
- 	}
- 
- 	/*
- 	 * A soft reset is triggered by writing a 0 to bit 0 of the soft reset
- 	 * register. To write to that register we must first write the password
- 	 * and the enable bit in the write access enable register.
- 	 */
- 	writel((RSTMGR_WR_PASSWORD << RSTMGR_WR_PASSWORD_SHIFT) |
- 		RSTMGR_WR_ACCESS_ENABLE,
- 		base + RSTMGR_REG_WR_ACCESS_OFFSET);
- 	writel(0, base + RSTMGR_REG_CHIP_SOFT_RST_OFFSET);
- 
- 	/* Wait for reset */
- 	while (1);
- }
- 
  static void __init bcm21664_init(void)
  {
 -	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
  	kona_l2_cache_init();
  }
  
diff --cc arch/arm/mach-imx/mach-imx51.c
index 40564c9b1226,1e91740ac7ae..3835b6a3423c
--- a/arch/arm/mach-imx/mach-imx51.c
+++ b/arch/arm/mach-imx/mach-imx51.c
@@@ -52,6 -52,10 +52,8 @@@ static void __init imx51_dt_init(void
  {
  	imx51_ipu_mipi_setup();
  	imx_src_init();
+ 
 -	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 -
+ 	imx_aips_allow_unprivileged_access("fsl,imx51-aipstz");
  }
  
  static void __init imx51_init_late(void)
diff --cc drivers/net/ethernet/freescale/fec.h
index 92fd5c0bf4df,dc71a88e9c55..c865135f3cb9
--- a/drivers/net/ethernet/freescale/fec.h
+++ b/drivers/net/ethernet/freescale/fec.h
@@@ -442,8 -442,8 +442,10 @@@ struct bufdesc_ex 
  #define FEC_QUIRK_SINGLE_MDIO		(1 << 11)
  /* Controller supports RACC register */
  #define FEC_QUIRK_HAS_RACC		(1 << 12)
 +/* Controller supports interrupt coalesc */
 +#define FEC_QUIRK_HAS_COALESCE		(1 << 13)
+ /* Interrupt doesn't wake CPU from deep idle */
 -#define FEC_QUIRK_ERR006687		(1 << 13)
++#define FEC_QUIRK_ERR006687		(1 << 14)
  
  struct bufdesc_prop {
  	int qid;