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10 years agoclk: samsung: exynos4: Remove unused static clkdev aliases
Tomasz Figa [Mon, 26 Aug 2013 17:09:01 +0000 (19:09 +0200)]
clk: samsung: exynos4: Remove unused static clkdev aliases

Since Exynos does not support legacy non-DT boot anymore, most of clock
lookups happen using device tree, so most of static clkdev aliases are no
longer necessary. This patch removes them.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: samsung: Modify _get_rate() helper to use __clk_lookup()
Tomasz Figa [Mon, 26 Aug 2013 17:09:00 +0000 (19:09 +0200)]
clk: samsung: Modify _get_rate() helper to use __clk_lookup()

There is no need to use clkdev inside the clock driver to retrieve the
clocks for internal use. Instead __clk_lookup() helper can be used to
look up clocks by their platform name.

This patch modifies the behavior of _get_rate() helper to look up clocks
by platform name and adjusts all users of it to pass platform names
instead of clkdev aliases.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: samsung: exynos4: Use separate aliases for cpufreq related clocks
Tomasz Figa [Mon, 26 Aug 2013 17:08:59 +0000 (19:08 +0200)]
clk: samsung: exynos4: Use separate aliases for cpufreq related clocks

Exynos cpufreq driver is the only remaining piece of code that needs
static clkdev aliases for operation, because it can not do device tree
based clock lookups yet.

This patch moves clock alias definitions for those clocks to separate
arrays that can be used with samsung_clk_register_alias() helper.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclocksource: samsung_pwm_timer: Get clock from device tree
Tomasz Figa [Mon, 26 Aug 2013 17:08:58 +0000 (19:08 +0200)]
clocksource: samsung_pwm_timer: Get clock from device tree

When booting with device tree static clkdev aliases should not be used.
This patch modifies the samsung_pwm_timer driver to use DT-based clock
lookup when booting with device tree.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoARM: dts: exynos4: Specify PWM clocks in PWM node
Tomasz Figa [Mon, 26 Aug 2013 17:08:57 +0000 (19:08 +0200)]
ARM: dts: exynos4: Specify PWM clocks in PWM node

Since pwm-samsung bindings require at least one clock to be specified,
this patch adds the missing clocks and clock-names properties to specify
clocks used by PWM block on Exynos4 SoCs.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agopwm: samsung: Update DT bindings documentation to cover clocks
Tomasz Figa [Mon, 26 Aug 2013 17:08:56 +0000 (19:08 +0200)]
pwm: samsung: Update DT bindings documentation to cover clocks

PWM driver consumes at least one and up to three clocks, which need to be
specified in device tree when used. This patch updates bindings
documentation to add information about clocks.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: Move symbol export to proper location
Thierry Reding [Tue, 3 Sep 2013 07:43:51 +0000 (09:43 +0200)]
clk: Move symbol export to proper location

The __clk_get_flags() symbol is exported immediately following the
clk_unprepare_unused_subtree() function. This is unusual, since a symbol
export typically follows body of the function that it exports.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: fix new_parent dereference before null check
James Hogan [Thu, 29 Aug 2013 11:10:51 +0000 (12:10 +0100)]
clk: fix new_parent dereference before null check

Commit 71472c0 (clk: add support for clock reparent on set_rate) added a
dereference of the new_parent pointer in clk_reparent(), but as detected
by smatch clk_reparent() later checks whether new_parent is NULL.

The dereference was in order to clear the new parent's new_child pointer
to avoid duplicate POST_RATE_CHANGE notifications, so clearly isn't
necessary if the new parent is NULL, so move it inside the "if
(new_parent)" block.

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: wm831x: Initialise wm831x pointer on init
Mark Brown [Thu, 29 Aug 2013 11:21:01 +0000 (12:21 +0100)]
clk: wm831x: Initialise wm831x pointer on init

Otherwise any attempt to interact with the hardware will crash. This is
what happens when drivers get written blind.

Signed-off-by: Mark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk/exynos5420: assign dout_pixel id to pixel clock divider
Rahul Sharma [Thu, 29 Aug 2013 05:37:09 +0000 (11:07 +0530)]
clk/exynos5420: assign dout_pixel id to pixel clock divider

dout_pixel is a new ID allocated for pixel clock divider. It is
queried in the driver to pass as the parent to hdmi clock while
switching between parents.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk/exynos5420: add hdmi mux to change parents in hdmi driver
Rahul Sharma [Thu, 29 Aug 2013 05:37:08 +0000 (11:07 +0530)]
clk/exynos5420: add hdmi mux to change parents in hdmi driver

hdmi driver needs to change the parent of hdmi clock
to pixel clock or hdmiphy clock, based on the stability
of hdmiphy. This patch is exposing the mux for changing
the parent.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk/exynos5420: fix the order of parents of hdmi mux
Rahul Sharma [Thu, 29 Aug 2013 05:37:07 +0000 (11:07 +0530)]
clk/exynos5420: fix the order of parents of hdmi mux

Listing sclk_hdmiphy at 0th position in the list of parents is
causing wrong configuration in reg SRC_DISP10.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk/exynos5420: add gate clock for mixer sysmmu
Rahul Sharma [Thu, 29 Aug 2013 05:37:06 +0000 (11:07 +0530)]
clk/exynos5420: add gate clock for mixer sysmmu

Adding sysmmu clock for mixer for exynos5420.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk/exynos5420: add sclk_hdmiphy to the list of special clocks
Rahul Sharma [Thu, 29 Aug 2013 05:37:05 +0000 (11:07 +0530)]
clk/exynos5420: add sclk_hdmiphy to the list of special clocks

Add sclk_hdmiphy to the list of exposed clocks. This is required
by hdmi driver to change the parent of hdmi clock.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: wm831x: Provide is_prepared() rather than is_enabled()
Mark Brown [Thu, 29 Aug 2013 14:13:28 +0000 (15:13 +0100)]
clk: wm831x: Provide is_prepared() rather than is_enabled()

Since the driver was written an is_prepared() operation has been made
possible. Since the driver uses I2C I/O only prepare operations are
provided so move the is_enabled() operation over to is_prepared().

Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk/exynos5250: change parent to aclk200_disp1 for hdmi subsystem
Rahul Sharma [Fri, 23 Aug 2013 07:16:59 +0000 (12:46 +0530)]
clk/exynos5250: change parent to aclk200_disp1 for hdmi subsystem

parent of hdmi and mixer block is mentioned as aclk200 which is
not correct. It is clocked by the ouput of aclk200_disp1. Hence
parent for mixer and hdmi clocks is changed to aclk200_disp1.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: tegra30: Don't wait for PLL_U lock bit
Tuomas Tynkkynen [Wed, 28 Aug 2013 15:18:47 +0000 (18:18 +0300)]
clk: tegra30: Don't wait for PLL_U lock bit

The lock bit on PLL_U does not seem to be working correctly and
sometimes never gets set when waiting for the PLL to come up.
Remove the TEGRA_PLL_USE_LOCK flag to use a constant delay.

Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: s3c64xx: Fix incorrect placement of __initdata
Sachin Kamat [Mon, 12 Aug 2013 09:14:07 +0000 (14:44 +0530)]
clk: s3c64xx: Fix incorrect placement of __initdata

__initdata should be placed between the variable name and equal
sign for the variable to be placed in the intended section.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: sunxi: Fix incorrect placement of __initconst
Sachin Kamat [Mon, 12 Aug 2013 09:14:06 +0000 (14:44 +0530)]
clk: sunxi: Fix incorrect placement of __initconst

__initconst should be placed between the variable name and equal
sign for the variable to be placed in the intended section.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Cc: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: refreshed patch based on sunxi changes]

10 years agoclk: kirkwood: Fix incorrect placement of __initconst
Sachin Kamat [Mon, 12 Aug 2013 09:14:05 +0000 (14:44 +0530)]
clk: kirkwood: Fix incorrect placement of __initconst

__initconst should be placed between the variable name and equal
sign for the variable to be placed in the intended section.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Gregory Clement <gregory.clement@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: dove: Fix incorrect placement of __initconst
Sachin Kamat [Mon, 12 Aug 2013 09:14:04 +0000 (14:44 +0530)]
clk: dove: Fix incorrect placement of __initconst

__initconst should be placed between the variable name and equal
sign for the variable to be placed in the intended section.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Gregory Clement <gregory.clement@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: armada-xp: Fix incorrect placement of __initconst
Sachin Kamat [Mon, 12 Aug 2013 09:14:03 +0000 (14:44 +0530)]
clk: armada-xp: Fix incorrect placement of __initconst

__initconst should be placed between the variable name and equal
sign for the variable to be placed in the intended section.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Gregory Clement <gregory.clement@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: armada-370: Fix incorrect placement of __initconst
Sachin Kamat [Mon, 12 Aug 2013 09:14:02 +0000 (14:44 +0530)]
clk: armada-370: Fix incorrect placement of __initconst

__initconst should be placed between the variable name and equal
sign for the variable to be placed in the intended section.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Gregory Clement <gregory.clement@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: u300: Fix incorrect placement of __initconst
Sachin Kamat [Mon, 12 Aug 2013 09:14:01 +0000 (14:44 +0530)]
clk: u300: Fix incorrect placement of __initconst

__initconst should be placed between the variable name and equal
sign for the variable to be placed in the intended section.

While at it also make 'u300_clk_lookup' static as it is used only
in this file.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: nomadik: Fix incorrect placement of __initconst
Sachin Kamat [Mon, 12 Aug 2013 09:14:00 +0000 (14:44 +0530)]
clk: nomadik: Fix incorrect placement of __initconst

__initconst should be placed between the variable name and equal
sign for the variable to be placed in the intended section.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: bcm2835: Fix incorrect placement of __initconst
Sachin Kamat [Mon, 12 Aug 2013 09:13:59 +0000 (14:43 +0530)]
clk: bcm2835: Fix incorrect placement of __initconst

__initconst should be placed between the variable name and equal
sign for the variable to be placed in the intended section.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoMerge tag 'sunxi-clk-for-3.12' of https://github.com/mripard/linux into clk-next...
Mike Turquette [Wed, 28 Aug 2013 01:07:46 +0000 (18:07 -0700)]
Merge tag 'sunxi-clk-for-3.12' of https://github.com/mripard/linux into clk-next-sunxi

Allwinner clock changes for 3.12

These patches mostly do some cleanup to introduce the basic gated clocks for
the Allwinner A10s, A20 and A31 SoCs.

Conflicts:
drivers/clk/sunxi/clk-sunxi.c

10 years agoclk: wrap I/O access for improved portability
Gerhard Sittig [Mon, 22 Jul 2013 12:14:40 +0000 (14:14 +0200)]
clk: wrap I/O access for improved portability

the common clock drivers were motivated/initiated by ARM development
and apparently assume little endian peripherals

wrap register/peripherals access in the common code (div, gate, mux)
in preparation of adding COMMON_CLK support for other platforms

Signed-off-by: Gerhard Sittig <gsi@denx.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoMerge branch 'clk-next-s3c64xx-delta' into clk-next
Mike Turquette [Tue, 27 Aug 2013 23:20:35 +0000 (16:20 -0700)]
Merge branch 'clk-next-s3c64xx-delta' into clk-next

10 years agoclk: get matching entry under lock in of_clk_init()
Alex Elder [Thu, 22 Aug 2013 16:31:31 +0000 (11:31 -0500)]
clk: get matching entry under lock in of_clk_init()

Currently of_clk_init() finds a matching device node while holding
the device tree spinlock.  When a matching device node is found, the
lock is dropped and then re-acquired in order to get a reference
to the matching device id structure.

Acquiring the spinlock twice is unnecessary (and it opens a
vulnerable window that could conceivably lead to errors).

There already exists an interface for both finding and taking a
reference to a device id under lock, so use it.

Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Christian Daudt <csd@broadcom.com>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: sunxi: fix initialization of basic clocks
Emilio López [Sun, 4 Aug 2013 09:47:29 +0000 (11:47 +0200)]
clk: sunxi: fix initialization of basic clocks

With the recent move towards CLK_OF_DECLARE(...), the driver stopped
initializing osc32k, which is compatible "fixed-clock". This is because
we never called of_clk_init(NULL). Fix this by moving the only other
simple clock (osc24M) to use CLK_OF_DECLARE(...) and call of_clk_init(NULL)
to initialize both of them.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: samsung: pll: Use new registration method for PLL6552 and PLL6553
Tomasz Figa [Wed, 21 Aug 2013 00:33:21 +0000 (02:33 +0200)]
clk: samsung: pll: Use new registration method for PLL6552 and PLL6553

This patch modifies PLL6552 and PLL6553 clock drivers to use recently
added common Samsung PLL registration method.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: sunxi: Add Allwinner A20 gates
Maxime Ripard [Thu, 25 Jul 2013 19:06:56 +0000 (21:06 +0200)]
clk: sunxi: Add Allwinner A20 gates

The Allwinner A20 is almost identical to the earlier A10 SoC from
Allwinner on many aspects, including the clocks tree. However, since the
A20 has some additionnal IPs compared to the A10, the clock tree isn't
exactly the same, especially when it comes to the gated clocks
available. We thus need to register different clock gates for the A20.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Emilio López <emilio@elopez.com.ar>
10 years agoclk: sunxi: Add A31 clocks support
Maxime Ripard [Tue, 23 Jul 2013 21:34:10 +0000 (23:34 +0200)]
clk: sunxi: Add A31 clocks support

The A31 has a mostly different clock set compared to the other older
SoCs currently supported in the Allwinner clock driver.

Add support for the basic useful clocks. The other ones will come in
eventually.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Emilio López <emilio@elopez.com.ar>
10 years agoclk: sunxi: Allow to specify the divider width from the dividers data
Maxime Ripard [Tue, 23 Jul 2013 07:25:56 +0000 (09:25 +0200)]
clk: sunxi: Allow to specify the divider width from the dividers data

The divider width used to be hardcoded. Some A31 dividers are no longer
with the hardcoded width, so we need to make it specific to each divider
and set it in the dividers data.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Emilio López <emilio@elopez.com.ar>
10 years agoclk: sunxi: Rename the structure to prepare the addition of sun6i
Maxime Ripard [Mon, 22 Jul 2013 16:21:32 +0000 (18:21 +0200)]
clk: sunxi: Rename the structure to prepare the addition of sun6i

Rename all the generic-named structure to sun4i to avoid confusion when
we will introduce the sun6i (A31) clocks.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Emilio López <emilio@elopez.com.ar>
10 years agoclk: sunxi: fix initialization of basic clocks
Emilio López [Tue, 23 Jul 2013 01:01:05 +0000 (22:01 -0300)]
clk: sunxi: fix initialization of basic clocks

With the recent move towards CLK_OF_DECLARE(...), the driver stopped
initializing osc32k, which is compatible "fixed-clock". This is because
we never called of_clk_init(NULL). Fix this by moving the only other
simple clock (osc24M) to use CLK_OF_DECLARE(...) and call of_clk_init(NULL)
to initialize both of them.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Mike Turquette <mturquette@linaro.org>
10 years agoclk: sunxi: Add A10s gates
Maxime Ripard [Tue, 16 Jul 2013 09:21:59 +0000 (11:21 +0200)]
clk: sunxi: Add A10s gates

The Allwinner A10s has a slightly different gates set than the A10 and
A13, so add these gates to the clk driver.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Emilio López <emilio@elopez.com.ar>
Reviewed-by: Emilio López <emilio@elopez.com.ar>
10 years agoclk: mvebu: add missing iounmap
Jisheng Zhang [Fri, 23 Aug 2013 02:34:01 +0000 (10:34 +0800)]
clk: mvebu: add missing iounmap

Add missing iounmap to setup error path.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: handle NULL struct clk gracefully
Mike Turquette [Thu, 22 Aug 2013 06:58:09 +0000 (23:58 -0700)]
clk: handle NULL struct clk gracefully

At some point changes to clk_set_rate and clk_set_parent introduced a
bug whereby NULL struct clk pointers were treated as an error. This is
in violation of the API in include/linux/clk.h. Reintroduce graceful
handling of NULL clk's by bailing from clk_set_rate and clk_set_parent
with return codes of zero.

Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoMerge tag 'zynq-clk-for-3.12' of git://git.xilinx.com/linux-xlnx into clk-next
Mike Turquette [Tue, 20 Aug 2013 21:58:48 +0000 (14:58 -0700)]
Merge tag 'zynq-clk-for-3.12' of git://git.xilinx.com/linux-xlnx into clk-next

arm: Xilinx Zynq clock changes for v3.12

Just small two changes where the first fixes
documentation and the second improves
code readability.

10 years agoclk/zynq/pll: Use #defines for fbdiv min/max values
Soren Brinkmann [Fri, 19 Jul 2013 17:16:45 +0000 (10:16 -0700)]
clk/zynq/pll: Use #defines for fbdiv min/max values

Use more descriptive #defines for the minimum and maximum PLL
feedback divider.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
10 years agoclk/zynq/pll: Fix documentation for PLL register function
Soren Brinkmann [Fri, 19 Jul 2013 17:16:44 +0000 (10:16 -0700)]
clk/zynq/pll: Fix documentation for PLL register function

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
10 years agoclk: clk-mux: implement remuxing on set_rate
James Hogan [Mon, 29 Jul 2013 11:25:02 +0000 (12:25 +0100)]
clk: clk-mux: implement remuxing on set_rate

Implement clk-mux remuxing if the CLK_SET_RATE_NO_REPARENT flag isn't
set. This implements determine_rate for clk-mux to propagate to each
parent and to choose the best one (like clk-divider this chooses the
parent which provides the fastest rate <= the requested rate).

The determine_rate op is implemented as a core helper function so that
it can be easily used by more complex clocks which incorporate muxes.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: add CLK_SET_RATE_NO_REPARENT flag
James Hogan [Mon, 29 Jul 2013 11:25:01 +0000 (12:25 +0100)]
clk: add CLK_SET_RATE_NO_REPARENT flag

Add a CLK_SET_RATE_NO_REPARENT clock flag, which will prevent muxes
being reparented during clk_set_rate.

To avoid breaking existing platforms, all callers of clk_register_mux()
are adjusted to pass the new flag. Platform maintainers are encouraged
to remove the flag if they wish to allow mux reparenting on set_rate.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Cc: Chao Xie <xiechao.mail@gmail.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: "Emilio López" <emilio@elopez.com.ar>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Andrew Chew <achew@nvidia.com>
Cc: Doug Anderson <dianders@chromium.org>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Thomas Abraham <thomas.abraham@linaro.org>
Cc: Tomasz Figa <t.figa@samsung.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-samsung-soc@vger.kernel.org
Cc: spear-devel@list.st.com
Cc: linux-tegra@vger.kernel.org
Tested-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Stephen Warren <swarren@nvidia.com> [tegra]
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> [sunxi]
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> [Zynq]
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: add support for clock reparent on set_rate
James Hogan [Mon, 29 Jul 2013 11:25:00 +0000 (12:25 +0100)]
clk: add support for clock reparent on set_rate

Add core support to allow clock implementations to select the best
parent clock when rounding a rate, e.g. the one which can provide the
closest clock rate to that requested. This is by way of adding a new
clock op, determine_rate(), which is like round_rate() but has an extra
parameter to allow the clock implementation to optionally select a
different parent clock. The core then takes care of reparenting the
clock when setting the rate.

The parent change takes place with the help of some new private data
members. struct clk::new_parent specifies a clock's new parent (NULL
indicates no change), and struct clk::new_child specifies a clock's new
child (whose new_parent member points back to it). The purpose of these
are to allow correct walking of the future tree for notifications prior
to actually reparenting any clocks, specifically to skip child clocks
who are being reparented to another clock (they will be notified via the
new parent), and to include any new child clock. These pointers are set
by clk_calc_subtree(), and the new_child pointer gets cleared when a
child is actually reparented to avoid duplicate POST_RATE_CHANGE
notifications.

Each place where round_rate() is called, determine_rate() is checked
first and called in preference. This restructures a few of the call
sites to simplify the logic into if/else blocks.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: move some parent related functions upwards
James Hogan [Mon, 29 Jul 2013 11:24:59 +0000 (12:24 +0100)]
clk: move some parent related functions upwards

Move some parent related functions up in clk.c so they can be used by
the modifications in the following patch which enables clock reparenting
during set_rate. No other changes are made so this patch makes no
functional difference in isolation. This is separate from the following
patch primarily to ease readability of that patch.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: abstract parent cache
James Hogan [Mon, 29 Jul 2013 11:24:58 +0000 (12:24 +0100)]
clk: abstract parent cache

Abstract access to the clock parent cache by defining
clk_get_parent_by_index(clk, index). This allows access to parent
clocks from clock drivers.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: export fixed-factor, gate & mux registration
Mike Turquette [Fri, 16 Aug 2013 02:06:29 +0000 (19:06 -0700)]
clk: export fixed-factor, gate & mux registration

These registration calls may be used by loadable modules. Export them.

Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: clk-divider: Export clk_register_divider()
Fabio Estevam [Fri, 2 Aug 2013 16:14:07 +0000 (13:14 -0300)]
clk: clk-divider: Export clk_register_divider()

clk_register_divider() needs to be exported so that it could be used
in a module driver, otherwise we get the following error:

ERROR: "clk_register_divider" [sound/soc/mxs/snd-soc-mxs.ko] undefined!

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: also export clk_register_divider_table]

10 years agoclk: fixed-rate: Export clk_fixed_rate_register()
Stephen Boyd [Thu, 25 Jul 2013 00:43:29 +0000 (17:43 -0700)]
clk: fixed-rate: Export clk_fixed_rate_register()

Export this symbol so that modules can register fixed rate
clocks.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: prima2: Fix incorrect placement of __initdata
Sachin Kamat [Thu, 8 Aug 2013 04:31:26 +0000 (10:01 +0530)]
clk: prima2: Fix incorrect placement of __initdata

__initdata should be placed between the variable name and equal
sign for the variable to be placed in the intended section.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: tegra30: Fix incorrect placement of __initdata
Sachin Kamat [Thu, 8 Aug 2013 04:25:49 +0000 (09:55 +0530)]
clk: tegra30: Fix incorrect placement of __initdata

__initdata should be placed between the variable name and equal
sign for the variable to be placed in the intended section.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: tegra20: Fix incorrect placement of __initdata
Sachin Kamat [Thu, 8 Aug 2013 04:25:48 +0000 (09:55 +0530)]
clk: tegra20: Fix incorrect placement of __initdata

__initdata should be placed between the variable name and equal
sign for the variable to be placed in the intended section.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: tegra114: Fix incorrect placement of __initdata
Sachin Kamat [Thu, 8 Aug 2013 04:25:47 +0000 (09:55 +0530)]
clk: tegra114: Fix incorrect placement of __initdata

__initdata should be placed between the variable name and equal
sign for the variable to be placed in the intended section.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: exynos5440: Fix incorrect placement of __initdata
Sachin Kamat [Wed, 7 Aug 2013 04:48:40 +0000 (10:18 +0530)]
clk: exynos5440: Fix incorrect placement of __initdata

__initdata should be placed between the variable name and equal
sign for the variable to be placed in the intended section.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: exynos5420: Fix incorrect placement of __initdata
Sachin Kamat [Wed, 7 Aug 2013 04:48:39 +0000 (10:18 +0530)]
clk: exynos5420: Fix incorrect placement of __initdata

__initdata should be placed between the variable name and equal
sign for the variable to be placed in the intended section.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: exynos5250: Fix incorrect placement of __initdata
Sachin Kamat [Wed, 7 Aug 2013 04:48:38 +0000 (10:18 +0530)]
clk: exynos5250: Fix incorrect placement of __initdata

__initdata should be placed between the variable name and equal
sign for the variable to be placed in the intended section.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: exynos4: Fix incorrect placement of __initdata
Sachin Kamat [Wed, 7 Aug 2013 04:48:37 +0000 (10:18 +0530)]
clk: exynos4: Fix incorrect placement of __initdata

__initdata should be placed between the variable name and equal
sign for the variable to be placed in the intended section.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: s2mps11: Add support for s2mps11
Yadwinder Singh Brar [Sun, 7 Jul 2013 11:44:20 +0000 (17:14 +0530)]
clk: s2mps11: Add support for s2mps11

This patch adds support to register three(AP/CP/BT) buffered 32.768 KHz
outputs of mfd-s2mps11 with common clock framework.

Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: exynos5420: Make exynos5420_plls static
Sachin Kamat [Tue, 6 Aug 2013 11:31:15 +0000 (17:01 +0530)]
clk: exynos5420: Make exynos5420_plls static

'exynos5420_plls' is used only in this file. Make is static.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: exynos5250: Make exynos5250_plls static
Sachin Kamat [Tue, 6 Aug 2013 11:31:14 +0000 (17:01 +0530)]
clk: exynos5250: Make exynos5250_plls static

exynos5250_plls is used only in this file. Make it static.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: exynos4: Make exynos4_plls static
Sachin Kamat [Tue, 6 Aug 2013 11:31:13 +0000 (17:01 +0530)]
clk: exynos4: Make exynos4_plls static

'exynos4_plls' is used only in this file. Make it static.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: mxs: clk-imx23: Include <linux/clk/mxs.h>
Fabio Estevam [Tue, 16 Jul 2013 13:33:43 +0000 (10:33 -0300)]
clk: mxs: clk-imx23: Include <linux/clk/mxs.h>

Fix the following sparse warning:

drivers/clk/mxs/clk-imx23.c:102:12: warning: symbol 'mx23_clocks_init' was not declared. Should it be static?

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: sunxi: Fix checking return value of clk_register_[composite|factors]
Axel Lin [Fri, 12 Jul 2013 08:15:15 +0000 (16:15 +0800)]
clk: sunxi: Fix checking return value of clk_register_[composite|factors]

clk_register_composite() and clk_register_factors() return ERR_PTR on error.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoMerge branch 'clk-next-s3c64xx' into clk-next
Mike Turquette [Mon, 5 Aug 2013 18:59:06 +0000 (11:59 -0700)]
Merge branch 'clk-next-s3c64xx' into clk-next

10 years agoDocumentation: clk: Fix a trivial typo in audss
Sachin Kamat [Fri, 12 Jul 2013 03:23:43 +0000 (08:53 +0530)]
Documentation: clk: Fix a trivial typo in audss

Fixes a trivial typo.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: samsung: Add clock driver for S3C64xx SoCs
Tomasz Figa [Tue, 23 Jul 2013 23:55:15 +0000 (01:55 +0200)]
clk: samsung: Add clock driver for S3C64xx SoCs

This patch adds new, Common Clock Framework-based clock driver for Samsung
S3C64xx SoCs. The driver is just added, without actually letting the
platforms use it yet, since this requires more intermediate steps.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: samsung: pll: Add support for PLL6552 and PLL6553
Tomasz Figa [Mon, 22 Jul 2013 23:49:19 +0000 (01:49 +0200)]
clk: samsung: pll: Add support for PLL6552 and PLL6553

This patch adds support for PLL6552 and PLL6553 PLLs present on Samsung
S3C64xx SoCs.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: mux: Add support for read-only muxes.
Tomasz Figa [Mon, 22 Jul 2013 23:49:18 +0000 (01:49 +0200)]
clk: mux: Add support for read-only muxes.

Some platforms have read-only clock muxes that are preconfigured at
reset and cannot be changed at runtime. This patch extends mux clock
driver to allow handling such read-only muxes by adding new
CLK_MUX_READ_ONLY mux flag.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: samsung: Add EPLL and VPLL freq table for exynos5250 SoC
Vikas Sajjan [Tue, 11 Jun 2013 09:31:16 +0000 (15:01 +0530)]
clk: samsung: Add EPLL and VPLL freq table for exynos5250 SoC

Adds the EPLL and VPLL freq table for exynos5250 SoC.

Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: samsung: Reorder MUX registration for mout_vpllsrc
Vikas Sajjan [Tue, 11 Jun 2013 09:31:15 +0000 (15:01 +0530)]
clk: samsung: Reorder MUX registration for mout_vpllsrc

While trying to get rate of "mout_vpllsrc" MUX (parent) for registering the
"fout_vpll" (child), we found get rate was failing.

So this patch moves the mout_vpllsrc MUX out of the existing common list
and registers the mout_vpllsrc MUX before the PLL registrations.

Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: samsung: Add set_rate() clk_ops for PLL36xx
Vikas Sajjan [Tue, 11 Jun 2013 09:31:14 +0000 (15:01 +0530)]
clk: samsung: Add set_rate() clk_ops for PLL36xx

This patch adds set_rate and round_rate clk_ops for PLL36xx

Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: samsung: Add set_rate() clk_ops for PLL35xx
Yadwinder Singh Brar [Tue, 11 Jun 2013 09:31:13 +0000 (15:01 +0530)]
clk: samsung: Add set_rate() clk_ops for PLL35xx

This patch add set_rate() and round_rate() for PLL35xx

Reviewed-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: samsung: Add support to register rate_table for samsung plls
Yadwinder Singh Brar [Tue, 11 Jun 2013 09:31:12 +0000 (15:01 +0530)]
clk: samsung: Add support to register rate_table for samsung plls

This patch defines a common rate_table which will contain recommended p, m, s,
k values for supported rates that needs to be changed for changing
corresponding PLL's rate.

Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: samsung: Remove unused pll registeration code for pll35xx and pll36xx
Yadwinder Singh Brar [Tue, 11 Jun 2013 09:31:11 +0000 (15:01 +0530)]
clk: samsung: Remove unused pll registeration code for pll35xx and pll36xx

This patch removes samsung_clk_register_pll35xx() and
samsung_clk_register_pll36xx() registaration functions as users migrated to
new samsung_clk_register_pll().

Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: samsung: Migrate exynos5420 to use common samsung_clk_register_pll()
Yadwinder Singh Brar [Tue, 11 Jun 2013 09:31:10 +0000 (15:01 +0530)]
clk: samsung: Migrate exynos5420 to use common samsung_clk_register_pll()

This patch migrates exynos5420 pll registeration to use common
samsung_clk_register_pll() by intialising table of PLLs and adding PLLs to
unique id list of clocks.

Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: samsung: Migrate exynos4 to use common samsung_clk_register_pll()
Yadwinder Singh Brar [Tue, 11 Jun 2013 09:31:09 +0000 (15:01 +0530)]
clk: samsung: Migrate exynos4 to use common samsung_clk_register_pll()

This patch migrates exynos4 pll registeration to use common
samsung_clk_register_pll() by intialising table of PLLs.

Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: samsung: Migrate exynos5250 to use common samsung_clk_register_pll()
Yadwinder Singh Brar [Tue, 11 Jun 2013 09:31:08 +0000 (15:01 +0530)]
clk: samsung: Migrate exynos5250 to use common samsung_clk_register_pll()

This patch migrates exynos5250 pll registeration to use common
samsung_clk_register_pll() by intialising table of PLLs and adding PLLs to
unique id list of clocks.

Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: samsung: Define a common samsung_clk_register_pll()
Yadwinder Singh Brar [Tue, 11 Jun 2013 09:31:07 +0000 (15:01 +0530)]
clk: samsung: Define a common samsung_clk_register_pll()

This patch defines a common samsung_clk_register_pll()
Since pll2550 & pll35xx and pll2650 & pll36xx have exactly same clk ops
implementation, added pll2550 and pll2650 also.

Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: samsung: Introduce a common samsung_clk_pll struct
Yadwinder Singh Brar [Tue, 11 Jun 2013 09:31:06 +0000 (15:01 +0530)]
clk: samsung: Introduce a common samsung_clk_pll struct

This patch unifies clk strutures used for PLL35xx & PLL36xx and
adding an extra member lock_reg, so that common code can be factored out.

Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoof/documentation: Update G2D documentation
Sachin Kamat [Tue, 9 Jul 2013 06:29:15 +0000 (11:59 +0530)]
of/documentation: Update G2D documentation

Exynos5250 G2D IP requires only the gate clock. Update the
binding documentation accordingly.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Cc: Inki Dae <inki.dae@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: exynos4: Add clock entries for TMU
Sachin Kamat [Wed, 24 Jul 2013 10:09:15 +0000 (15:39 +0530)]
clk: exynos4: Add clock entries for TMU

Added clock entries for thermal management unit (TMU) for
Exynos4 SoCs.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk/exynos5250: add sclk_hdmiphy in the list of special clocks
Rahul Sharma [Thu, 25 Jul 2013 05:07:35 +0000 (10:37 +0530)]
clk/exynos5250: add sclk_hdmiphy in the list of special clocks

hdmi driver needs hdmiphy clock which is one of the parent
for hdmi mux clock. This is required while changing the parent
of mux clock.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk/exynos5250: add mout_hdmi mux clock for hdmi
Rahul Sharma [Thu, 25 Jul 2013 05:07:34 +0000 (10:37 +0530)]
clk/exynos5250: add mout_hdmi mux clock for hdmi

hdmi driver needs to change the parent of hdmi clock
frequently between pixel clock and hdmiphy clock. hdmiphy is
not stable after power on and for a short interval while changing
the phy configuration. For this duration pixel clock is used to
clock hdmi.

This patch is exposing the mux for changing parent.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoDocumentation: exynos5250-clock: Add div_i2s1 and div_i2s2
Tushar Behera [Thu, 25 Jul 2013 05:07:33 +0000 (10:37 +0530)]
Documentation: exynos5250-clock: Add div_i2s1 and div_i2s2

commit 79d743c177f9 ("clk: exynos5250: Add enum entries for divider
clock of i2s1 and i2s2") added two new clock entries. Add the clock
entry enum numbers to documentation.

Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: exynos5250: Add G2D gate clock
Sachin Kamat [Fri, 5 Jul 2013 08:42:27 +0000 (14:12 +0530)]
clk: exynos5250: Add G2D gate clock

Adds gate clock for G2D IP for Exynos5250 SoC.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: exynos-audss: Staticize exynos_audss_clk_init
Sachin Kamat [Thu, 18 Jul 2013 10:01:22 +0000 (15:31 +0530)]
clk: exynos-audss: Staticize exynos_audss_clk_init

exynos_audss_clk_init() is used only in this file. Make it
static.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: exynos5440: Staticize local symbols
Sachin Kamat [Thu, 18 Jul 2013 10:01:21 +0000 (15:31 +0530)]
clk: exynos5440: Staticize local symbols

Symbols referenced only in this file are made static.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: exynos5420: Staticize local symbols
Sachin Kamat [Thu, 18 Jul 2013 10:01:20 +0000 (15:31 +0530)]
clk: exynos5420: Staticize local symbols

Symbols referenced only in this file are made static.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: exynos5250: Staticize local symbols
Sachin Kamat [Thu, 18 Jul 2013 10:01:19 +0000 (15:31 +0530)]
clk: exynos5250: Staticize local symbols

Symbols referenced only in this file are made static.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: exynos4: Remove unused function
Sachin Kamat [Thu, 18 Jul 2013 10:01:18 +0000 (15:31 +0530)]
clk: exynos4: Remove unused function

Subsequent to the cleanup in commit 3c70348c7c ("ARM: EXYNOS:
Remove legacy timer initialization code"), this function has no more
users. Hence remove it.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: exynos4: Staticize local symbols
Sachin Kamat [Thu, 18 Jul 2013 10:01:17 +0000 (15:31 +0530)]
clk: exynos4: Staticize local symbols

Symbols referenced only in this file are made static.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoclk: fix typos
Peter Meerwald [Sat, 29 Jun 2013 13:14:19 +0000 (15:14 +0200)]
clk: fix typos

Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoof/documentation: Fix a typo in exynos5250-clock.txt
Sachin Kamat [Fri, 5 Jul 2013 08:18:01 +0000 (13:48 +0530)]
of/documentation: Fix a typo in exynos5250-clock.txt

The clocks should be numbered sequentially as they are represented as
enum values in the clock driver.

Typo introduced by commit 17d4caccef ("clk: exynos5250: register
display block gate clocks to common clock framework")

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
10 years agoLinux 3.11-rc2 v3.11-rc2
Linus Torvalds [Sun, 21 Jul 2013 19:05:29 +0000 (12:05 -0700)]
Linux 3.11-rc2

10 years agoMerge tag 'acpi-video-3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael...
Linus Torvalds [Sun, 21 Jul 2013 17:11:04 +0000 (10:11 -0700)]
Merge tag 'acpi-video-3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull ACPI video support fixes from Rafael Wysocki:
 "I'm sending a separate pull request for this as it may be somewhat
  controversial.  The breakage addressed here is not really new and the
  fixes may not satisfy all users of the affected systems, but we've had
  so much back and forth dance in this area over the last several weeks
  that I think it's time to actually make some progress.

  The source of the problem is that about a year ago we started to tell
  BIOSes that we're compatible with Windows 8, which we really need to
  do, because some systems shipping with Windows 8 are tested with it
  and nothing else, so if we tell their BIOSes that we aren't compatible
  with Windows 8, we expose our users to untested BIOS/AML code paths.

  However, as it turns out, some Windows 8-specific AML code paths are
  not tested either, because Windows 8 actually doesn't use the ACPI
  methods containing them, so if we declare Windows 8 compatibility and
  attempt to use those ACPI methods, things break.  That occurs mostly
  in the backlight support area where in particular the _BCM and _BQC
  methods are plain unusable on some systems if the OS declares Windows
  8 compatibility.

  [ The additional twist is that they actually become usable if the OS
    says it is not compatible with Windows 8, but that may cause
    problems to show up elsewhere ]

  Investigation carried out by Matthew Garrett indicates that what
  Windows 8 does about backlight is to leave backlight control up to
  individual graphics drivers.  At least there's evidence that it does
  that if the Intel graphics driver is used, so we've decided to follow
  Windows 8 in that respect and allow i915 to control backlight (Daniel
  likes that part).

  The first commit from Aaron Lu makes ACPICA export the variable from
  which we can infer whether or not the BIOS believes that we are
  compatible with Windows 8.

  The second commit from Matthew Garrett prepares the ACPI video driver
  by making it initialize the ACPI backlight even if it is not going to
  be used afterward (that is needed for backlight control to work on
  Thinkpads).

  The third commit implements the actual workaround making i915 take
  over backlight control if the firmware thinks it's dealing with
  Windows 8 and is based on the work of multiple developers, including
  Matthew Garrett, Chun-Yi Lee, Seth Forshee, and Aaron Lu.

  The final commit from Aaron Lu makes us follow Windows 8 by informing
  the firmware through the _DOS method that it should not carry out
  automatic brightness changes, so that brightness can be controlled by
  GUI.

  Hopefully, this approach will allow us to avoid using blacklists of
  systems that should not declare Windows 8 compatibility just to avoid
  backlight control problems in the future.

   - Change from Aaron Lu makes ACPICA export a variable which can be
     used by driver code to determine whether or not the BIOS believes
     that we are compatible with Windows 8.

   - Change from Matthew Garrett makes the ACPI video driver initialize
     the ACPI backlight even if it is not going to be used afterward
     (that is needed for backlight control to work on Thinkpads).

   - Fix from Rafael J Wysocki implements Windows 8 backlight support
     workaround making i915 take over bakclight control if the firmware
     thinks it's dealing with Windows 8.  Based on the work of multiple
     developers including Matthew Garrett, Chun-Yi Lee, Seth Forshee,
     and Aaron Lu.

   - Fix from Aaron Lu makes the kernel follow Windows 8 by informing
     the firmware through the _DOS method that it should not carry out
     automatic brightness changes, so that brightness can be controlled
     by GUI"

* tag 'acpi-video-3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm:
  ACPI / video: no automatic brightness changes by win8-compatible firmware
  ACPI / video / i915: No ACPI backlight if firmware expects Windows 8
  ACPI / video: Always call acpi_video_init_brightness() on init
  ACPICA: expose OSI version

10 years agoMerge tag 'ext4_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso...
Linus Torvalds [Sun, 21 Jul 2013 03:11:42 +0000 (20:11 -0700)]
Merge tag 'ext4_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4

Pull ext[34] tmpfile bugfix from Ted Ts'o:
 "Fix regression caused by commit af51a2ac36d1f which added ->tmpfile()
  support (along with a similar fix for ext3)"

* tag 'ext4_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4:
  ext3: fix a BUG when opening a file with O_TMPFILE flag
  ext4: fix a BUG when opening a file with O_TMPFILE flag

10 years agoext3: fix a BUG when opening a file with O_TMPFILE flag
Zheng Liu [Sun, 21 Jul 2013 02:03:20 +0000 (22:03 -0400)]
ext3: fix a BUG when opening a file with O_TMPFILE flag

When we try to open a file with O_TMPFILE flag, we will trigger a bug.
The root cause is that in ext4_orphan_add() we check ->i_nlink == 0 and
this check always fails because we set ->i_nlink = 1 in
inode_init_always().  We can use the following program to trigger it:

int main(int argc, char *argv[])
{
int fd;

fd = open(argv[1], O_TMPFILE, 0666);
if (fd < 0) {
perror("open ");
return -1;
}
close(fd);
return 0;
}

The oops message looks like this:

kernel: kernel BUG at fs/ext3/namei.c:1992!
kernel: invalid opcode: 0000 [#1] SMP
kernel: Modules linked in: ext4 jbd2 crc16 cpufreq_ondemand ipv6 dm_mirror dm_region_hash dm_log dm_mod parport_pc parport serio_raw sg dcdbas pcspkr i2c_i801 ehci_pci ehci_hcd button acpi_cpufreq mperf e1000e ptp pps_core ttm drm_kms_helper drm hwmon i2c_algo_bit i2c_core ext3 jbd sd_mod ahci libahci libata scsi_mod uhci_hcd
kernel: CPU: 0 PID: 2882 Comm: tst_tmpfile Not tainted 3.11.0-rc1+ #4
kernel: Hardware name: Dell Inc. OptiPlex 780 /0V4W66, BIOS A05 08/11/2010
kernel: task: ffff880112d30050 ti: ffff8801124d4000 task.ti: ffff8801124d4000
kernel: RIP: 0010:[<ffffffffa00db5ae>] [<ffffffffa00db5ae>] ext3_orphan_add+0x6a/0x1eb [ext3]
kernel: RSP: 0018:ffff8801124d5cc8  EFLAGS: 00010202
kernel: RAX: 0000000000000000 RBX: ffff880111510128 RCX: ffff8801114683a0
kernel: RDX: 0000000000000000 RSI: ffff880111510128 RDI: ffff88010fcf65a8
kernel: RBP: ffff8801124d5d18 R08: 0080000000000000 R09: ffffffffa00d3b7f
kernel: R10: ffff8801114683a0 R11: ffff8801032a2558 R12: 0000000000000000
kernel: R13: ffff88010fcf6800 R14: ffff8801032a2558 R15: ffff8801115100d8
kernel: FS:  00007f5d172b5700(0000) GS:ffff880117c00000(0000) knlGS:0000000000000000
kernel: CS:  0010 DS: 0000 ES: 0000 CR0: 000000008005003b
kernel: CR2: 00007f5d16df15d0 CR3: 0000000110b1d000 CR4: 00000000000407f0
kernel: Stack:
kernel: 000000000000000c ffff8801048a7dc8 ffff8801114685a8 ffffffffa00b80d7
kernel: ffff8801124d5e38 ffff8801032a2558 ffff88010ce24d68 0000000000000000
kernel: ffff88011146b300 ffff8801124d5d44 ffff8801124d5d78 ffffffffa00db7e1
kernel: Call Trace:
kernel: [<ffffffffa00b80d7>] ? journal_start+0x8c/0xbd [jbd]
kernel: [<ffffffffa00db7e1>] ext3_tmpfile+0xb2/0x13b [ext3]
kernel: [<ffffffff821076f8>] path_openat+0x11f/0x5e7
kernel: [<ffffffff821c86b4>] ? list_del+0x11/0x30
kernel: [<ffffffff82065fa2>] ?  __dequeue_entity+0x33/0x38
kernel: [<ffffffff82107cd5>] do_filp_open+0x3f/0x8d
kernel: [<ffffffff82112532>] ? __alloc_fd+0x50/0x102
kernel: [<ffffffff820f9296>] do_sys_open+0x13b/0x1cd
kernel: [<ffffffff820f935c>] SyS_open+0x1e/0x20
kernel: [<ffffffff82398c02>] system_call_fastpath+0x16/0x1b
kernel: Code: 39 c7 0f 85 67 01 00 00 0f b7 03 25 00 f0 00 00 3d 00 40 00 00 74 18 3d 00 80 00 00 74 11 3d 00 a0 00 00 74 0a 83 7b 48 00 74 04 <0f> 0b eb fe 49 8b 85 50 03 00 00 4c 89 f6 48 c7 c7 c0 99 0e a0
kernel: RIP  [<ffffffffa00db5ae>] ext3_orphan_add+0x6a/0x1eb [ext3]
kernel: RSP <ffff8801124d5cc8>

Here we couldn't call clear_nlink() directly because in d_tmpfile() we
will call inode_dec_link_count() to decrease ->i_nlink.  So this commit
tries to call d_tmpfile() before ext4_orphan_add() to fix this problem.

Signed-off-by: Zheng Liu <wenqing.lz@taobao.com>
Signed-off-by: "Theodore Ts'o" <tytso@mit.edu>
Cc: Jan Kara <jack@suse.cz>
Cc: Al Viro <viro@zeniv.linux.org.uk>
10 years agoext4: fix a BUG when opening a file with O_TMPFILE flag
Zheng Liu [Sun, 21 Jul 2013 01:58:38 +0000 (21:58 -0400)]
ext4: fix a BUG when opening a file with O_TMPFILE flag

When we try to open a file with O_TMPFILE flag, we will trigger a bug.
The root cause is that in ext4_orphan_add() we check ->i_nlink == 0 and
this check always fails because we set ->i_nlink = 1 in
inode_init_always().  We can use the following program to trigger it:

int main(int argc, char *argv[])
{
int fd;

fd = open(argv[1], O_TMPFILE, 0666);
if (fd < 0) {
perror("open ");
return -1;
}
close(fd);
return 0;
}

The oops message looks like this:

kernel BUG at fs/ext4/namei.c:2572!
invalid opcode: 0000 [#1] PREEMPT SMP DEBUG_PAGEALLOC
Modules linked in: dlci bridge stp hidp cmtp kernelcapi l2tp_ppp l2tp_netlink l2tp_core sctp libcrc32c rfcomm tun fuse nfnetli
nk can_raw ipt_ULOG can_bcm x25 scsi_transport_iscsi ipx p8023 p8022 appletalk phonet psnap vmw_vsock_vmci_transport af_key vmw_vmci rose vsock atm can netrom ax25 af_rxrpc ir
da pppoe pppox ppp_generic slhc bluetooth nfc rfkill rds caif_socket caif crc_ccitt af_802154 llc2 llc snd_hda_codec_realtek snd_hda_intel snd_hda_codec serio_raw snd_pcm pcsp
kr edac_core snd_page_alloc snd_timer snd soundcore r8169 mii sr_mod cdrom pata_atiixp radeon backlight drm_kms_helper ttm
CPU: 1 PID: 1812571 Comm: trinity-child2 Not tainted 3.11.0-rc1+ #12
Hardware name: Gigabyte Technology Co., Ltd. GA-MA78GM-S2H/GA-MA78GM-S2H, BIOS F12a 04/23/2010
task: ffff88007dfe69a0 ti: ffff88010f7b6000 task.ti: ffff88010f7b6000
RIP: 0010:[<ffffffff8125ce69>]  [<ffffffff8125ce69>] ext4_orphan_add+0x299/0x2b0
RSP: 0018:ffff88010f7b7cf8  EFLAGS: 00010202
RAX: 0000000000000000 RBX: ffff8800966d3020 RCX: 0000000000000000
RDX: 0000000000000000 RSI: ffff88007dfe70b8 RDI: 0000000000000001
RBP: ffff88010f7b7d40 R08: ffff880126a3c4e0 R09: ffff88010f7b7ca0
R10: 0000000000000000 R11: 0000000000000000 R12: ffff8801271fd668
R13: ffff8800966d2f78 R14: ffff88011d7089f0 R15: ffff88007dfe69a0
FS:  00007f70441a3740(0000) GS:ffff88012a800000(0000) knlGS:00000000f77c96c0
CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
CR2: 0000000002834000 CR3: 0000000107964000 CR4: 00000000000007e0
DR0: 0000000000780000 DR1: 0000000000000000 DR2: 0000000000000000
DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000600
Stack:
 0000000000002000 00000020810b6dde 0000000000000000 ffff88011d46db00
 ffff8800966d3020 ffff88011d7089f0 ffff88009c7f4c10 ffff88010f7b7f2c
 ffff88007dfe69a0 ffff88010f7b7da8 ffffffff8125cfac ffff880100000004
Call Trace:
 [<ffffffff8125cfac>] ext4_tmpfile+0x12c/0x180
 [<ffffffff811cba78>] path_openat+0x238/0x700
 [<ffffffff8100afc4>] ? native_sched_clock+0x24/0x80
 [<ffffffff811cc647>] do_filp_open+0x47/0xa0
 [<ffffffff811db73f>] ? __alloc_fd+0xaf/0x200
 [<ffffffff811ba2e4>] do_sys_open+0x124/0x210
 [<ffffffff81010725>] ? syscall_trace_enter+0x25/0x290
 [<ffffffff811ba3ee>] SyS_open+0x1e/0x20
 [<ffffffff816ca8d4>] tracesys+0xdd/0xe2
 [<ffffffff81001001>] ? start_thread_common.constprop.6+0x1/0xa0
Code: 04 00 00 00 89 04 24 31 c0 e8 c4 77 04 00 e9 43 fe ff ff 66 25 00 d0 66 3d 00 80 0f 84 0e fe ff ff 83 7b 48 00 0f 84 04 fe ff ff <0f> 0b 49 8b 8c 24 50 07 00 00 e9 88 fe ff ff 0f 1f 84 00 00 00

Here we couldn't call clear_nlink() directly because in d_tmpfile() we
will call inode_dec_link_count() to decrease ->i_nlink.  So this commit
tries to call d_tmpfile() before ext4_orphan_add() to fix this problem.

Reported-by: Dave Jones <davej@redhat.com>
Signed-off-by: Zheng Liu <wenqing.lz@taobao.com>
Tested-by: Darrick J. Wong <darrick.wong@oracle.com>
Tested-by: Dave Jones <davej@redhat.com>
Signed-off-by: "Theodore Ts'o" <tytso@mit.edu>
Acked-by: Al Viro <viro@zeniv.linux.org.uk>