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coresight: document the bindings for the ATCLK
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1 * CoreSight Components:
2
3 CoreSight components are compliant with the ARM CoreSight architecture
4 specification and can be connected in various topologies to suit a particular
5 SoCs tracing needs. These trace components can generally be classified as
6 sinks, links and sources. Trace data produced by one or more sources flows
7 through the intermediate links connecting the source to the currently selected
8 sink. Each CoreSight component device should use these properties to describe
9 its hardware characteristcs.
10
11 * Required properties for all components *except* non-configurable replicators:
12
13         * compatible: These have to be supplemented with "arm,primecell" as
14           drivers are using the AMBA bus interface.  Possible values include:
15                 - "arm,coresight-etb10", "arm,primecell";
16                 - "arm,coresight-tpiu", "arm,primecell";
17                 - "arm,coresight-tmc", "arm,primecell";
18                 - "arm,coresight-funnel", "arm,primecell";
19                 - "arm,coresight-etm3x", "arm,primecell";
20
21         * reg: physical base address and length of the register
22           set(s) of the component.
23
24         * clocks: the clocks associated to this component.
25
26         * clock-names: the name of the clocks referenced by the code.
27           Since we are using the AMBA framework, the name of the clock
28           providing the interconnect should be "apb_pclk", and some
29           coresight blocks also have an additional clock "atclk", which
30           clocks the core of that coresight component. The latter clock
31           is optional.
32
33         * port or ports: The representation of the component's port
34           layout using the generic DT graph presentation found in
35           "bindings/graph.txt".
36
37 * Required properties for devices that don't show up on the AMBA bus, such as
38   non-configurable replicators:
39
40         * compatible: Currently supported value is (note the absence of the
41           AMBA markee):
42                 - "arm,coresight-replicator"
43
44         * port or ports: same as above.
45
46 * Optional properties for ETM/PTMs:
47
48         * arm,cp14: must be present if the system accesses ETM/PTM management
49           registers via co-processor 14.
50
51         * cpu: the cpu phandle this ETM/PTM is affined to. When omitted the
52           source is considered to belong to CPU0.
53
54 * Optional property for TMC:
55
56         * arm,buffer-size: size of contiguous buffer space for TMC ETR
57          (embedded trace router)
58
59
60 Example:
61
62 1. Sinks
63         etb@20010000 {
64                 compatible = "arm,coresight-etb10", "arm,primecell";
65                 reg = <0 0x20010000 0 0x1000>;
66
67                 clocks = <&oscclk6a>;
68                 clock-names = "apb_pclk";
69                 port {
70                         etb_in_port: endpoint@0 {
71                                 slave-mode;
72                                 remote-endpoint = <&replicator_out_port0>;
73                         };
74                 };
75         };
76
77         tpiu@20030000 {
78                 compatible = "arm,coresight-tpiu", "arm,primecell";
79                 reg = <0 0x20030000 0 0x1000>;
80
81                 clocks = <&oscclk6a>;
82                 clock-names = "apb_pclk";
83                 port {
84                         tpiu_in_port: endpoint@0 {
85                                 slave-mode;
86                                 remote-endpoint = <&replicator_out_port1>;
87                         };
88                 };
89         };
90
91 2. Links
92         replicator {
93                 /* non-configurable replicators don't show up on the
94                  * AMBA bus.  As such no need to add "arm,primecell".
95                  */
96                 compatible = "arm,coresight-replicator";
97
98                 ports {
99                         #address-cells = <1>;
100                         #size-cells = <0>;
101
102                         /* replicator output ports */
103                         port@0 {
104                                 reg = <0>;
105                                 replicator_out_port0: endpoint {
106                                         remote-endpoint = <&etb_in_port>;
107                                 };
108                         };
109
110                         port@1 {
111                                 reg = <1>;
112                                 replicator_out_port1: endpoint {
113                                         remote-endpoint = <&tpiu_in_port>;
114                                 };
115                         };
116
117                         /* replicator input port */
118                         port@2 {
119                                 reg = <0>;
120                                 replicator_in_port0: endpoint {
121                                         slave-mode;
122                                         remote-endpoint = <&funnel_out_port0>;
123                                 };
124                         };
125                 };
126         };
127
128         funnel@20040000 {
129                 compatible = "arm,coresight-funnel", "arm,primecell";
130                 reg = <0 0x20040000 0 0x1000>;
131
132                 clocks = <&oscclk6a>;
133                 clock-names = "apb_pclk";
134                 ports {
135                         #address-cells = <1>;
136                         #size-cells = <0>;
137
138                         /* funnel output port */
139                         port@0 {
140                                 reg = <0>;
141                                 funnel_out_port0: endpoint {
142                                         remote-endpoint =
143                                                         <&replicator_in_port0>;
144                                 };
145                         };
146
147                         /* funnel input ports */
148                         port@1 {
149                                 reg = <0>;
150                                 funnel_in_port0: endpoint {
151                                         slave-mode;
152                                         remote-endpoint = <&ptm0_out_port>;
153                                 };
154                         };
155
156                         port@2 {
157                                 reg = <1>;
158                                 funnel_in_port1: endpoint {
159                                         slave-mode;
160                                         remote-endpoint = <&ptm1_out_port>;
161                                 };
162                         };
163
164                         port@3 {
165                                 reg = <2>;
166                                 funnel_in_port2: endpoint {
167                                         slave-mode;
168                                         remote-endpoint = <&etm0_out_port>;
169                                 };
170                         };
171
172                 };
173         };
174
175 3. Sources
176         ptm@2201c000 {
177                 compatible = "arm,coresight-etm3x", "arm,primecell";
178                 reg = <0 0x2201c000 0 0x1000>;
179
180                 cpu = <&cpu0>;
181                 clocks = <&oscclk6a>;
182                 clock-names = "apb_pclk";
183                 port {
184                         ptm0_out_port: endpoint {
185                                 remote-endpoint = <&funnel_in_port0>;
186                         };
187                 };
188         };
189
190         ptm@2201d000 {
191                 compatible = "arm,coresight-etm3x", "arm,primecell";
192                 reg = <0 0x2201d000 0 0x1000>;
193
194                 cpu = <&cpu1>;
195                 clocks = <&oscclk6a>;
196                 clock-names = "apb_pclk";
197                 port {
198                         ptm1_out_port: endpoint {
199                                 remote-endpoint = <&funnel_in_port1>;
200                         };
201                 };
202         };