arch/arm/boot/dts/omap4.dtsi

   1 /*
   2  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include <dt-bindings/gpio/gpio.h>
  10 #include <dt-bindings/interrupt-controller/arm-gic.h>
  11 #include <dt-bindings/pinctrl/omap.h>
  12
  13 #include "skeleton.dtsi"
  14
  15 / {
  16         compatible = "ti,omap4430", "ti,omap4";
  17         interrupt-parent = <&wakeupgen>;
  18
  19         aliases {
  20                 i2c0 = &i2c1;
  21                 i2c1 = &i2c2;
  22                 i2c2 = &i2c3;
  23                 i2c3 = &i2c4;
  24                 serial0 = &uart1;
  25                 serial1 = &uart2;
  26                 serial2 = &uart3;
  27                 serial3 = &uart4;
  28         };
  29
  30         cpus {
  31                 #address-cells = <1>;
  32                 #size-cells = <0>;
  33
  34                 cpu@0 {
  35                         compatible = "arm,cortex-a9";
  36                         device_type = "cpu";
  37                         next-level-cache = <&L2>;
  38                         reg = <0x0>;
  39
  40                         clocks = <&dpll_mpu_ck>;
  41                         clock-names = "cpu";
  42
  43                         clock-latency = <300000>; /* From omap-cpufreq driver */
  44                 };
  45                 cpu@1 {
  46                         compatible = "arm,cortex-a9";
  47                         device_type = "cpu";
  48                         next-level-cache = <&L2>;
  49                         reg = <0x1>;
  50                 };
  51         };
  52
  53         gic: interrupt-controller@48241000 {
  54                 compatible = "arm,cortex-a9-gic";
  55                 interrupt-controller;
  56                 #interrupt-cells = <3>;
  57                 reg = <0x48241000 0x1000>,
  58                       <0x48240100 0x0100>;
  59                 interrupt-parent = <&gic>;
  60         };
  61
  62         L2: l2-cache-controller@48242000 {
  63                 compatible = "arm,pl310-cache";
  64                 reg = <0x48242000 0x1000>;
  65                 cache-unified;
  66                 cache-level = <2>;
  67         };
  68
  69         local-timer@48240600 {
  70                 compatible = "arm,cortex-a9-twd-timer";
  71                 clocks = <&mpu_periphclk>;
  72                 reg = <0x48240600 0x20>;
  73                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>;
  74                 interrupt-parent = <&gic>;
  75         };
  76
  77         wakeupgen: interrupt-controller@48281000 {
  78                 compatible = "ti,omap4-wugen-mpu";
  79                 interrupt-controller;
  80                 #interrupt-cells = <3>;
  81                 reg = <0x48281000 0x1000>;
  82                 interrupt-parent = <&gic>;
  83         };
  84
  85         /*
  86          * The soc node represents the soc top level view. It is used for IPs
  87          * that are not memory mapped in the MPU view or for the MPU itself.
  88          */
  89         soc {
  90                 compatible = "ti,omap-infra";
  91                 mpu {
  92                         compatible = "ti,omap4-mpu";
  93                         ti,hwmods = "mpu";
  94                         sram = <&ocmcram>;
  95                 };
  96
  97                 dsp {
  98                         compatible = "ti,omap3-c64";
  99                         ti,hwmods = "dsp";
 100                 };
 101
 102                 iva {
 103                         compatible = "ti,ivahd";
 104                         ti,hwmods = "iva";
 105                 };
 106         };
 107
 108         /*
 109          * XXX: Use a flat representation of the OMAP4 interconnect.
 110          * The real OMAP interconnect network is quite complex.
 111          * Since it will not bring real advantage to represent that in DT for
 112          * the moment, just use a fake OCP bus entry to represent the whole bus
 113          * hierarchy.
 114          */
 115         ocp {
 116                 compatible = "ti,omap4-l3-noc", "simple-bus";
 117                 #address-cells = <1>;
 118                 #size-cells = <1>;
 119                 ranges;
 120                 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
 121                 reg = <0x44000000 0x1000>,
 122                       <0x44800000 0x2000>,
 123                       <0x45000000 0x1000>;
 124                 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
 125                              <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 126
 127                 l4_cfg: l4@4a000000 {
 128                         compatible = "ti,omap4-l4-cfg", "simple-bus";
 129                         #address-cells = <1>;
 130                         #size-cells = <1>;
 131                         ranges = <0 0x4a000000 0x1000000>;
 132
 133                         cm1: cm1@4000 {
 134                                 compatible = "ti,omap4-cm1";
 135                                 reg = <0x4000 0x2000>;
 136
 137                                 cm1_clocks: clocks {
 138                                         #address-cells = <1>;
 139                                         #size-cells = <0>;
 140                                 };
 141
 142                                 cm1_clockdomains: clockdomains {
 143                                 };
 144                         };
 145
 146                         cm2: cm2@8000 {
 147                                 compatible = "ti,omap4-cm2";
 148                                 reg = <0x8000 0x3000>;
 149
 150                                 cm2_clocks: clocks {
 151                                         #address-cells = <1>;
 152                                         #size-cells = <0>;
 153                                 };
 154
 155                                 cm2_clockdomains: clockdomains {
 156                                 };
 157                         };
 158
 159                         omap4_scm_core: scm@2000 {
 160                                 compatible = "ti,omap4-scm-core", "simple-bus";
 161                                 reg = <0x2000 0x1000>;
 162                                 #address-cells = <1>;
 163                                 #size-cells = <1>;
 164                                 ranges = <0 0x2000 0x1000>;
 165
 166                                 scm_conf: scm_conf@0 {
 167                                         compatible = "syscon";
 168                                         reg = <0x0 0x800>;
 169                                         #address-cells = <1>;
 170                                         #size-cells = <1>;
 171                                 };
 172                         };
 173
 174                         omap4_padconf_core: scm@100000 {
 175                                 compatible = "ti,omap4-scm-padconf-core",
 176                                              "simple-bus";
 177                                 #address-cells = <1>;
 178                                 #size-cells = <1>;
 179                                 ranges = <0 0x100000 0x1000>;
 180
 181                                 omap4_pmx_core: pinmux@40 {
 182                                         compatible = "ti,omap4-padconf",
 183                                                      "pinctrl-single";
 184                                         reg = <0x40 0x0196>;
 185                                         #address-cells = <1>;
 186                                         #size-cells = <0>;
 187                                         #interrupt-cells = <1>;
 188                                         interrupt-controller;
 189                                         pinctrl-single,register-width = <16>;
 190                                         pinctrl-single,function-mask = <0x7fff>;
 191                                 };
 192
 193                                 omap4_padconf_global: omap4_padconf_global@5a0 {
 194                                         compatible = "syscon",
 195                                                      "simple-bus";
 196                                         reg = <0x5a0 0x170>;
 197                                         #address-cells = <1>;
 198                                         #size-cells = <1>;
 199
 200                                         pbias_regulator: pbias_regulator {
 201                                                 compatible = "ti,pbias-omap";
 202                                                 reg = <0x60 0x4>;
 203                                                 syscon = <&omap4_padconf_global>;
 204                                                 pbias_mmc_reg: pbias_mmc_omap4 {
 205                                                         regulator-name = "pbias_mmc_omap4";
 206                                                         regulator-min-microvolt = <1800000>;
 207                                                         regulator-max-microvolt = <3000000>;
 208                                                 };
 209                                         };
 210                                 };
 211                         };
 212
 213                         l4_wkup: l4@300000 {
 214                                 compatible = "ti,omap4-l4-wkup", "simple-bus";
 215                                 #address-cells = <1>;
 216                                 #size-cells = <1>;
 217                                 ranges = <0 0x300000 0x40000>;
 218
 219                                 counter32k: counter@4000 {
 220                                         compatible = "ti,omap-counter32k";
 221                                         reg = <0x4000 0x20>;
 222                                         ti,hwmods = "counter_32k";
 223                                 };
 224
 225                                 prm: prm@6000 {
 226                                         compatible = "ti,omap4-prm";
 227                                         reg = <0x6000 0x3000>;
 228                                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 229
 230                                         prm_clocks: clocks {
 231                                                 #address-cells = <1>;
 232                                                 #size-cells = <0>;
 233                                         };
 234
 235                                         prm_clockdomains: clockdomains {
 236                                         };
 237                                 };
 238
 239                                 scrm: scrm@a000 {
 240                                         compatible = "ti,omap4-scrm";
 241                                         reg = <0xa000 0x2000>;
 242
 243                                         scrm_clocks: clocks {
 244                                                 #address-cells = <1>;
 245                                                 #size-cells = <0>;
 246                                         };
 247
 248                                         scrm_clockdomains: clockdomains {
 249                                         };
 250                                 };
 251
 252                                 omap4_pmx_wkup: pinmux@1e040 {
 253                                         compatible = "ti,omap4-padconf",
 254                                                      "pinctrl-single";
 255                                         reg = <0x1e040 0x0038>;
 256                                         #address-cells = <1>;
 257                                         #size-cells = <0>;
 258                                         #interrupt-cells = <1>;
 259                                         interrupt-controller;
 260                                         pinctrl-single,register-width = <16>;
 261                                         pinctrl-single,function-mask = <0x7fff>;
 262                                 };
 263                         };
 264                 };
 265
 266                 ocmcram: ocmcram@40304000 {
 267                         compatible = "mmio-sram";
 268                         reg = <0x40304000 0xa000>; /* 40k */
 269                 };
 270
 271                 sdma: dma-controller@4a056000 {
 272                         compatible = "ti,omap4430-sdma";
 273                         reg = <0x4a056000 0x1000>;
 274                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 275                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 276                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 277                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 278                         #dma-cells = <1>;
 279                         dma-channels = <32>;
 280                         dma-requests = <127>;
 281                 };
 282
 283                 gpio1: gpio@4a310000 {
 284                         compatible = "ti,omap4-gpio";
 285                         reg = <0x4a310000 0x200>;
 286                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 287                         ti,hwmods = "gpio1";
 288                         ti,gpio-always-on;
 289                         gpio-controller;
 290                         #gpio-cells = <2>;
 291                         interrupt-controller;
 292                         #interrupt-cells = <2>;
 293                 };
 294
 295                 gpio2: gpio@48055000 {
 296                         compatible = "ti,omap4-gpio";
 297                         reg = <0x48055000 0x200>;
 298                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 299                         ti,hwmods = "gpio2";
 300                         gpio-controller;
 301                         #gpio-cells = <2>;
 302                         interrupt-controller;
 303                         #interrupt-cells = <2>;
 304                 };
 305
 306                 gpio3: gpio@48057000 {
 307                         compatible = "ti,omap4-gpio";
 308                         reg = <0x48057000 0x200>;
 309                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 310                         ti,hwmods = "gpio3";
 311                         gpio-controller;
 312                         #gpio-cells = <2>;
 313                         interrupt-controller;
 314                         #interrupt-cells = <2>;
 315                 };
 316
 317                 gpio4: gpio@48059000 {
 318                         compatible = "ti,omap4-gpio";
 319                         reg = <0x48059000 0x200>;
 320                         interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 321                         ti,hwmods = "gpio4";
 322                         gpio-controller;
 323                         #gpio-cells = <2>;
 324                         interrupt-controller;
 325                         #interrupt-cells = <2>;
 326                 };
 327
 328                 gpio5: gpio@4805b000 {
 329                         compatible = "ti,omap4-gpio";
 330                         reg = <0x4805b000 0x200>;
 331                         interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 332                         ti,hwmods = "gpio5";
 333                         gpio-controller;
 334                         #gpio-cells = <2>;
 335                         interrupt-controller;
 336                         #interrupt-cells = <2>;
 337                 };
 338
 339                 gpio6: gpio@4805d000 {
 340                         compatible = "ti,omap4-gpio";
 341                         reg = <0x4805d000 0x200>;
 342                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 343                         ti,hwmods = "gpio6";
 344                         gpio-controller;
 345                         #gpio-cells = <2>;
 346                         interrupt-controller;
 347                         #interrupt-cells = <2>;
 348                 };
 349
 350                 gpmc: gpmc@50000000 {
 351                         compatible = "ti,omap4430-gpmc";
 352                         reg = <0x50000000 0x1000>;
 353                         #address-cells = <2>;
 354                         #size-cells = <1>;
 355                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 356                         gpmc,num-cs = <8>;
 357                         gpmc,num-waitpins = <4>;
 358                         ti,hwmods = "gpmc";
 359                         ti,no-idle-on-init;
 360                         clocks = <&l3_div_ck>;
 361                         clock-names = "fck";
 362                 };
 363
 364                 uart1: serial@4806a000 {
 365                         compatible = "ti,omap4-uart";
 366                         reg = <0x4806a000 0x100>;
 367                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
 368                         ti,hwmods = "uart1";
 369                         clock-frequency = <48000000>;
 370                 };
 371
 372                 uart2: serial@4806c000 {
 373                         compatible = "ti,omap4-uart";
 374                         reg = <0x4806c000 0x100>;
 375                         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 376                         ti,hwmods = "uart2";
 377                         clock-frequency = <48000000>;
 378                 };
 379
 380                 uart3: serial@48020000 {
 381                         compatible = "ti,omap4-uart";
 382                         reg = <0x48020000 0x100>;
 383                         interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 384                         ti,hwmods = "uart3";
 385                         clock-frequency = <48000000>;
 386                 };
 387
 388                 uart4: serial@4806e000 {
 389                         compatible = "ti,omap4-uart";
 390                         reg = <0x4806e000 0x100>;
 391                         interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
 392                         ti,hwmods = "uart4";
 393                         clock-frequency = <48000000>;
 394                 };
 395
 396                 hwspinlock: spinlock@4a0f6000 {
 397                         compatible = "ti,omap4-hwspinlock";
 398                         reg = <0x4a0f6000 0x1000>;
 399                         ti,hwmods = "spinlock";
 400                         #hwlock-cells = <1>;
 401                 };
 402
 403                 i2c1: i2c@48070000 {
 404                         compatible = "ti,omap4-i2c";
 405                         reg = <0x48070000 0x100>;
 406                         interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
 407                         #address-cells = <1>;
 408                         #size-cells = <0>;
 409                         ti,hwmods = "i2c1";
 410                 };
 411
 412                 i2c2: i2c@48072000 {
 413                         compatible = "ti,omap4-i2c";
 414                         reg = <0x48072000 0x100>;
 415                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
 416                         #address-cells = <1>;
 417                         #size-cells = <0>;
 418                         ti,hwmods = "i2c2";
 419                 };
 420
 421                 i2c3: i2c@48060000 {
 422                         compatible = "ti,omap4-i2c";
 423                         reg = <0x48060000 0x100>;
 424                         interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
 425                         #address-cells = <1>;
 426                         #size-cells = <0>;
 427                         ti,hwmods = "i2c3";
 428                 };
 429
 430                 i2c4: i2c@48350000 {
 431                         compatible = "ti,omap4-i2c";
 432                         reg = <0x48350000 0x100>;
 433                         interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
 434                         #address-cells = <1>;
 435                         #size-cells = <0>;
 436                         ti,hwmods = "i2c4";
 437                 };
 438
 439                 mcspi1: spi@48098000 {
 440                         compatible = "ti,omap4-mcspi";
 441                         reg = <0x48098000 0x200>;
 442                         interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
 443                         #address-cells = <1>;
 444                         #size-cells = <0>;
 445                         ti,hwmods = "mcspi1";
 446                         ti,spi-num-cs = <4>;
 447                         dmas = <&sdma 35>,
 448                                <&sdma 36>,
 449                                <&sdma 37>,
 450                                <&sdma 38>,
 451                                <&sdma 39>,
 452                                <&sdma 40>,
 453                                <&sdma 41>,
 454                                <&sdma 42>;
 455                         dma-names = "tx0", "rx0", "tx1", "rx1",
 456                                     "tx2", "rx2", "tx3", "rx3";
 457                 };
 458
 459                 mcspi2: spi@4809a000 {
 460                         compatible = "ti,omap4-mcspi";
 461                         reg = <0x4809a000 0x200>;
 462                         interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
 463                         #address-cells = <1>;
 464                         #size-cells = <0>;
 465                         ti,hwmods = "mcspi2";
 466                         ti,spi-num-cs = <2>;
 467                         dmas = <&sdma 43>,
 468                                <&sdma 44>,
 469                                <&sdma 45>,
 470                                <&sdma 46>;
 471                         dma-names = "tx0", "rx0", "tx1", "rx1";
 472                 };
 473
 474                 mcspi3: spi@480b8000 {
 475                         compatible = "ti,omap4-mcspi";
 476                         reg = <0x480b8000 0x200>;
 477                         interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
 478                         #address-cells = <1>;
 479                         #size-cells = <0>;
 480                         ti,hwmods = "mcspi3";
 481                         ti,spi-num-cs = <2>;
 482                         dmas = <&sdma 15>, <&sdma 16>;
 483                         dma-names = "tx0", "rx0";
 484                 };
 485
 486                 mcspi4: spi@480ba000 {
 487                         compatible = "ti,omap4-mcspi";
 488                         reg = <0x480ba000 0x200>;
 489                         interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
 490                         #address-cells = <1>;
 491                         #size-cells = <0>;
 492                         ti,hwmods = "mcspi4";
 493                         ti,spi-num-cs = <1>;
 494                         dmas = <&sdma 70>, <&sdma 71>;
 495                         dma-names = "tx0", "rx0";
 496                 };
 497
 498                 mmc1: mmc@4809c000 {
 499                         compatible = "ti,omap4-hsmmc";
 500                         reg = <0x4809c000 0x400>;
 501                         interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
 502                         ti,hwmods = "mmc1";
 503                         ti,dual-volt;
 504                         ti,needs-special-reset;
 505                         dmas = <&sdma 61>, <&sdma 62>;
 506                         dma-names = "tx", "rx";
 507                         pbias-supply = <&pbias_mmc_reg>;
 508                 };
 509
 510                 mmc2: mmc@480b4000 {
 511                         compatible = "ti,omap4-hsmmc";
 512                         reg = <0x480b4000 0x400>;
 513                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 514                         ti,hwmods = "mmc2";
 515                         ti,needs-special-reset;
 516                         dmas = <&sdma 47>, <&sdma 48>;
 517                         dma-names = "tx", "rx";
 518                 };
 519
 520                 mmc3: mmc@480ad000 {
 521                         compatible = "ti,omap4-hsmmc";
 522                         reg = <0x480ad000 0x400>;
 523                         interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
 524                         ti,hwmods = "mmc3";
 525                         ti,needs-special-reset;
 526                         dmas = <&sdma 77>, <&sdma 78>;
 527                         dma-names = "tx", "rx";
 528                 };
 529
 530                 mmc4: mmc@480d1000 {
 531                         compatible = "ti,omap4-hsmmc";
 532                         reg = <0x480d1000 0x400>;
 533                         interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
 534                         ti,hwmods = "mmc4";
 535                         ti,needs-special-reset;
 536                         dmas = <&sdma 57>, <&sdma 58>;
 537                         dma-names = "tx", "rx";
 538                 };
 539
 540                 mmc5: mmc@480d5000 {
 541                         compatible = "ti,omap4-hsmmc";
 542                         reg = <0x480d5000 0x400>;
 543                         interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
 544                         ti,hwmods = "mmc5";
 545                         ti,needs-special-reset;
 546                         dmas = <&sdma 59>, <&sdma 60>;
 547                         dma-names = "tx", "rx";
 548                 };
 549
 550                 mmu_dsp: mmu@4a066000 {
 551                         compatible = "ti,omap4-iommu";
 552                         reg = <0x4a066000 0x100>;
 553                         interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 554                         ti,hwmods = "mmu_dsp";
 555                         #iommu-cells = <0>;
 556                 };
 557
 558                 mmu_ipu: mmu@55082000 {
 559                         compatible = "ti,omap4-iommu";
 560                         reg = <0x55082000 0x100>;
 561                         interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
 562                         ti,hwmods = "mmu_ipu";
 563                         #iommu-cells = <0>;
 564                         ti,iommu-bus-err-back;
 565                 };
 566
 567                 wdt2: wdt@4a314000 {
 568                         compatible = "ti,omap4-wdt", "ti,omap3-wdt";
 569                         reg = <0x4a314000 0x80>;
 570                         interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 571                         ti,hwmods = "wd_timer2";
 572                 };
 573
 574                 mcpdm: mcpdm@40132000 {
 575                         compatible = "ti,omap4-mcpdm";
 576                         reg = <0x40132000 0x7f>, /* MPU private access */
 577                               <0x49032000 0x7f>; /* L3 Interconnect */
 578                         reg-names = "mpu", "dma";
 579                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
 580                         ti,hwmods = "mcpdm";
 581                         dmas = <&sdma 65>,
 582                                <&sdma 66>;
 583                         dma-names = "up_link", "dn_link";
 584                         status = "disabled";
 585                 };
 586
 587                 dmic: dmic@4012e000 {
 588                         compatible = "ti,omap4-dmic";
 589                         reg = <0x4012e000 0x7f>, /* MPU private access */
 590                               <0x4902e000 0x7f>; /* L3 Interconnect */
 591                         reg-names = "mpu", "dma";
 592                         interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
 593                         ti,hwmods = "dmic";
 594                         dmas = <&sdma 67>;
 595                         dma-names = "up_link";
 596                         status = "disabled";
 597                 };
 598
 599                 mcbsp1: mcbsp@40122000 {
 600                         compatible = "ti,omap4-mcbsp";
 601                         reg = <0x40122000 0xff>, /* MPU private access */
 602                               <0x49022000 0xff>; /* L3 Interconnect */
 603                         reg-names = "mpu", "dma";
 604                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 605                         interrupt-names = "common";
 606                         ti,buffer-size = <128>;
 607                         ti,hwmods = "mcbsp1";
 608                         dmas = <&sdma 33>,
 609                                <&sdma 34>;
 610                         dma-names = "tx", "rx";
 611                         status = "disabled";
 612                 };
 613
 614                 mcbsp2: mcbsp@40124000 {
 615                         compatible = "ti,omap4-mcbsp";
 616                         reg = <0x40124000 0xff>, /* MPU private access */
 617                               <0x49024000 0xff>; /* L3 Interconnect */
 618                         reg-names = "mpu", "dma";
 619                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 620                         interrupt-names = "common";
 621                         ti,buffer-size = <128>;
 622                         ti,hwmods = "mcbsp2";
 623                         dmas = <&sdma 17>,
 624                                <&sdma 18>;
 625                         dma-names = "tx", "rx";
 626                         status = "disabled";
 627                 };
 628
 629                 mcbsp3: mcbsp@40126000 {
 630                         compatible = "ti,omap4-mcbsp";
 631                         reg = <0x40126000 0xff>, /* MPU private access */
 632                               <0x49026000 0xff>; /* L3 Interconnect */
 633                         reg-names = "mpu", "dma";
 634                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 635                         interrupt-names = "common";
 636                         ti,buffer-size = <128>;
 637                         ti,hwmods = "mcbsp3";
 638                         dmas = <&sdma 19>,
 639                                <&sdma 20>;
 640                         dma-names = "tx", "rx";
 641                         status = "disabled";
 642                 };
 643
 644                 mcbsp4: mcbsp@48096000 {
 645                         compatible = "ti,omap4-mcbsp";
 646                         reg = <0x48096000 0xff>; /* L4 Interconnect */
 647                         reg-names = "mpu";
 648                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 649                         interrupt-names = "common";
 650                         ti,buffer-size = <128>;
 651                         ti,hwmods = "mcbsp4";
 652                         dmas = <&sdma 31>,
 653                                <&sdma 32>;
 654                         dma-names = "tx", "rx";
 655                         status = "disabled";
 656                 };
 657
 658                 keypad: keypad@4a31c000 {
 659                         compatible = "ti,omap4-keypad";
 660                         reg = <0x4a31c000 0x80>;
 661                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
 662                         reg-names = "mpu";
 663                         ti,hwmods = "kbd";
 664                 };
 665
 666                 dmm@4e000000 {
 667                         compatible = "ti,omap4-dmm";
 668                         reg = <0x4e000000 0x800>;
 669                         interrupts = <0 113 0x4>;
 670                         ti,hwmods = "dmm";
 671                 };
 672
 673                 emif1: emif@4c000000 {
 674                         compatible = "ti,emif-4d";
 675                         reg = <0x4c000000 0x100>;
 676                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 677                         ti,hwmods = "emif1";
 678                         ti,no-idle-on-init;
 679                         phy-type = <1>;
 680                         hw-caps-read-idle-ctrl;
 681                         hw-caps-ll-interface;
 682                         hw-caps-temp-alert;
 683                 };
 684
 685                 emif2: emif@4d000000 {
 686                         compatible = "ti,emif-4d";
 687                         reg = <0x4d000000 0x100>;
 688                         interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
 689                         ti,hwmods = "emif2";
 690                         ti,no-idle-on-init;
 691                         phy-type = <1>;
 692                         hw-caps-read-idle-ctrl;
 693                         hw-caps-ll-interface;
 694                         hw-caps-temp-alert;
 695                 };
 696
 697                 ocp2scp@4a0ad000 {
 698                         compatible = "ti,omap-ocp2scp";
 699                         reg = <0x4a0ad000 0x1f>;
 700                         #address-cells = <1>;
 701                         #size-cells = <1>;
 702                         ranges;
 703                         ti,hwmods = "ocp2scp_usb_phy";
 704                         usb2_phy: usb2phy@4a0ad080 {
 705                                 compatible = "ti,omap-usb2";
 706                                 reg = <0x4a0ad080 0x58>;
 707                                 ctrl-module = <&omap_control_usb2phy>;
 708                                 clocks = <&usb_phy_cm_clk32k>;
 709                                 clock-names = "wkupclk";
 710                                 #phy-cells = <0>;
 711                         };
 712                 };
 713
 714                 mailbox: mailbox@4a0f4000 {
 715                         compatible = "ti,omap4-mailbox";
 716                         reg = <0x4a0f4000 0x200>;
 717                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 718                         ti,hwmods = "mailbox";
 719                         #mbox-cells = <1>;
 720                         ti,mbox-num-users = <3>;
 721                         ti,mbox-num-fifos = <8>;
 722                         mbox_ipu: mbox_ipu {
 723                                 ti,mbox-tx = <0 0 0>;
 724                                 ti,mbox-rx = <1 0 0>;
 725                         };
 726                         mbox_dsp: mbox_dsp {
 727                                 ti,mbox-tx = <3 0 0>;
 728                                 ti,mbox-rx = <2 0 0>;
 729                         };
 730                 };
 731
 732                 timer1: timer@4a318000 {
 733                         compatible = "ti,omap3430-timer";
 734                         reg = <0x4a318000 0x80>;
 735                         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
 736                         ti,hwmods = "timer1";
 737                         ti,timer-alwon;
 738                 };
 739
 740                 timer2: timer@48032000 {
 741                         compatible = "ti,omap3430-timer";
 742                         reg = <0x48032000 0x80>;
 743                         interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
 744                         ti,hwmods = "timer2";
 745                 };
 746
 747                 timer3: timer@48034000 {
 748                         compatible = "ti,omap4430-timer";
 749                         reg = <0x48034000 0x80>;
 750                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
 751                         ti,hwmods = "timer3";
 752                 };
 753
 754                 timer4: timer@48036000 {
 755                         compatible = "ti,omap4430-timer";
 756                         reg = <0x48036000 0x80>;
 757                         interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
 758                         ti,hwmods = "timer4";
 759                 };
 760
 761                 timer5: timer@40138000 {
 762                         compatible = "ti,omap4430-timer";
 763                         reg = <0x40138000 0x80>,
 764                               <0x49038000 0x80>;
 765                         interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
 766                         ti,hwmods = "timer5";
 767                         ti,timer-dsp;
 768                 };
 769
 770                 timer6: timer@4013a000 {
 771                         compatible = "ti,omap4430-timer";
 772                         reg = <0x4013a000 0x80>,
 773                               <0x4903a000 0x80>;
 774                         interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
 775                         ti,hwmods = "timer6";
 776                         ti,timer-dsp;
 777                 };
 778
 779                 timer7: timer@4013c000 {
 780                         compatible = "ti,omap4430-timer";
 781                         reg = <0x4013c000 0x80>,
 782                               <0x4903c000 0x80>;
 783                         interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
 784                         ti,hwmods = "timer7";
 785                         ti,timer-dsp;
 786                 };
 787
 788                 timer8: timer@4013e000 {
 789                         compatible = "ti,omap4430-timer";
 790                         reg = <0x4013e000 0x80>,
 791                               <0x4903e000 0x80>;
 792                         interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
 793                         ti,hwmods = "timer8";
 794                         ti,timer-pwm;
 795                         ti,timer-dsp;
 796                 };
 797
 798                 timer9: timer@4803e000 {
 799                         compatible = "ti,omap4430-timer";
 800                         reg = <0x4803e000 0x80>;
 801                         interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
 802                         ti,hwmods = "timer9";
 803                         ti,timer-pwm;
 804                 };
 805
 806                 timer10: timer@48086000 {
 807                         compatible = "ti,omap3430-timer";
 808                         reg = <0x48086000 0x80>;
 809                         interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
 810                         ti,hwmods = "timer10";
 811                         ti,timer-pwm;
 812                 };
 813
 814                 timer11: timer@48088000 {
 815                         compatible = "ti,omap4430-timer";
 816                         reg = <0x48088000 0x80>;
 817                         interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
 818                         ti,hwmods = "timer11";
 819                         ti,timer-pwm;
 820                 };
 821
 822                 usbhstll: usbhstll@4a062000 {
 823                         compatible = "ti,usbhs-tll";
 824                         reg = <0x4a062000 0x1000>;
 825                         interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 826                         ti,hwmods = "usb_tll_hs";
 827                 };
 828
 829                 usbhshost: usbhshost@4a064000 {
 830                         compatible = "ti,usbhs-host";
 831                         reg = <0x4a064000 0x800>;
 832                         ti,hwmods = "usb_host_hs";
 833                         #address-cells = <1>;
 834                         #size-cells = <1>;
 835                         ranges;
 836                         clocks = <&init_60m_fclk>,
 837                                  <&xclk60mhsp1_ck>,
 838                                  <&xclk60mhsp2_ck>;
 839                         clock-names = "refclk_60m_int",
 840                                       "refclk_60m_ext_p1",
 841                                       "refclk_60m_ext_p2";
 842
 843                         usbhsohci: ohci@4a064800 {
 844                                 compatible = "ti,ohci-omap3";
 845                                 reg = <0x4a064800 0x400>;
 846                                 interrupt-parent = <&gic>;
 847                                 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 848                         };
 849
 850                         usbhsehci: ehci@4a064c00 {
 851                                 compatible = "ti,ehci-omap";
 852                                 reg = <0x4a064c00 0x400>;
 853                                 interrupt-parent = <&gic>;
 854                                 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 855                         };
 856                 };
 857
 858                 omap_control_usb2phy: control-phy@4a002300 {
 859                         compatible = "ti,control-phy-usb2";
 860                         reg = <0x4a002300 0x4>;
 861                         reg-names = "power";
 862                 };
 863
 864                 omap_control_usbotg: control-phy@4a00233c {
 865                         compatible = "ti,control-phy-otghs";
 866                         reg = <0x4a00233c 0x4>;
 867                         reg-names = "otghs_control";
 868                 };
 869
 870                 usb_otg_hs: usb_otg_hs@4a0ab000 {
 871                         compatible = "ti,omap4-musb";
 872                         reg = <0x4a0ab000 0x7ff>;
 873                         interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 874                         interrupt-names = "mc", "dma";
 875                         ti,hwmods = "usb_otg_hs";
 876                         usb-phy = <&usb2_phy>;
 877                         phys = <&usb2_phy>;
 878                         phy-names = "usb2-phy";
 879                         multipoint = <1>;
 880                         num-eps = <16>;
 881                         ram-bits = <12>;
 882                         ctrl-module = <&omap_control_usbotg>;
 883                 };
 884
 885                 aes: aes@4b501000 {
 886                         compatible = "ti,omap4-aes";
 887                         ti,hwmods = "aes";
 888                         reg = <0x4b501000 0xa0>;
 889                         interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
 890                         dmas = <&sdma 111>, <&sdma 110>;
 891                         dma-names = "tx", "rx";
 892                 };
 893
 894                 des: des@480a5000 {
 895                         compatible = "ti,omap4-des";
 896                         ti,hwmods = "des";
 897                         reg = <0x480a5000 0xa0>;
 898                         interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
 899                         dmas = <&sdma 117>, <&sdma 116>;
 900                         dma-names = "tx", "rx";
 901                 };
 902
 903                 abb_mpu: regulator-abb-mpu {
 904                         compatible = "ti,abb-v2";
 905                         regulator-name = "abb_mpu";
 906                         #address-cells = <0>;
 907                         #size-cells = <0>;
 908                         ti,tranxdone-status-mask = <0x80>;
 909                         clocks = <&sys_clkin_ck>;
 910                         ti,settling-time = <50>;
 911                         ti,clock-cycles = <16>;
 912
 913                         status = "disabled";
 914                 };
 915
 916                 abb_iva: regulator-abb-iva {
 917                         compatible = "ti,abb-v2";
 918                         regulator-name = "abb_iva";
 919                         #address-cells = <0>;
 920                         #size-cells = <0>;
 921                         ti,tranxdone-status-mask = <0x80000000>;
 922                         clocks = <&sys_clkin_ck>;
 923                         ti,settling-time = <50>;
 924                         ti,clock-cycles = <16>;
 925
 926                         status = "disabled";
 927                 };
 928
 929                 dss: dss@58000000 {
 930                         compatible = "ti,omap4-dss";
 931                         reg = <0x58000000 0x80>;
 932                         status = "disabled";
 933                         ti,hwmods = "dss_core";
 934                         clocks = <&dss_dss_clk>;
 935                         clock-names = "fck";
 936                         #address-cells = <1>;
 937                         #size-cells = <1>;
 938                         ranges;
 939
 940                         dispc@58001000 {
 941                                 compatible = "ti,omap4-dispc";
 942                                 reg = <0x58001000 0x1000>;
 943                                 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 944                                 ti,hwmods = "dss_dispc";
 945                                 clocks = <&dss_dss_clk>;
 946                                 clock-names = "fck";
 947                         };
 948
 949                         rfbi: encoder@58002000  {
 950                                 compatible = "ti,omap4-rfbi";
 951                                 reg = <0x58002000 0x1000>;
 952                                 status = "disabled";
 953                                 ti,hwmods = "dss_rfbi";
 954                                 clocks = <&dss_dss_clk>, <&l3_div_ck>;
 955                                 clock-names = "fck", "ick";
 956                         };
 957
 958                         venc: encoder@58003000 {
 959                                 compatible = "ti,omap4-venc";
 960                                 reg = <0x58003000 0x1000>;
 961                                 status = "disabled";
 962                                 ti,hwmods = "dss_venc";
 963                                 clocks = <&dss_tv_clk>;
 964                                 clock-names = "fck";
 965                         };
 966
 967                         dsi1: encoder@58004000 {
 968                                 compatible = "ti,omap4-dsi";
 969                                 reg = <0x58004000 0x200>,
 970                                       <0x58004200 0x40>,
 971                                       <0x58004300 0x20>;
 972                                 reg-names = "proto", "phy", "pll";
 973                                 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
 974                                 status = "disabled";
 975                                 ti,hwmods = "dss_dsi1";
 976                                 clocks = <&dss_dss_clk>, <&dss_sys_clk>;
 977                                 clock-names = "fck", "sys_clk";
 978                         };
 979
 980                         dsi2: encoder@58005000 {
 981                                 compatible = "ti,omap4-dsi";
 982                                 reg = <0x58005000 0x200>,
 983                                       <0x58005200 0x40>,
 984                                       <0x58005300 0x20>;
 985                                 reg-names = "proto", "phy", "pll";
 986                                 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
 987                                 status = "disabled";
 988                                 ti,hwmods = "dss_dsi2";
 989                                 clocks = <&dss_dss_clk>, <&dss_sys_clk>;
 990                                 clock-names = "fck", "sys_clk";
 991                         };
 992
 993                         hdmi: encoder@58006000 {
 994                                 compatible = "ti,omap4-hdmi";
 995                                 reg = <0x58006000 0x200>,
 996                                       <0x58006200 0x100>,
 997                                       <0x58006300 0x100>,
 998                                       <0x58006400 0x1000>;
 999                                 reg-names = "wp", "pll", "phy", "core";
1000                                 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1001                                 status = "disabled";
1002                                 ti,hwmods = "dss_hdmi";
1003                                 clocks = <&dss_48mhz_clk>, <&dss_sys_clk>;
1004                                 clock-names = "fck", "sys_clk";
1005                                 dmas = <&sdma 76>;
1006                                 dma-names = "audio_tx";
1007                         };
1008                 };
1009         };
1010 };
1011
1012 /include/ "omap44xx-clocks.dtsi"