arch/arm/boot/dts/rk3288-veyron.dtsi

   1 /*
   2  * Google Veyron (and derivatives) board device tree source
   3  *
   4  * Copyright 2015 Google, Inc
   5  *
   6  * This file is dual-licensed: you can use it either under the terms
   7  * of the GPL or the X11 license, at your option. Note that this dual
   8  * licensing only applies to this file, and not this project as a
   9  * whole.
  10  *
  11  *  a) This file is free software; you can redistribute it and/or
  12  *     modify it under the terms of the GNU General Public License as
  13  *     published by the Free Software Foundation; either version 2 of the
  14  *     License, or (at your option) any later version.
  15  *
  16  *     This file is distributed in the hope that it will be useful,
  17  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  *     GNU General Public License for more details.
  20  *
  21  *  Or, alternatively,
  22  *
  23  *  b) Permission is hereby granted, free of charge, to any person
  24  *     obtaining a copy of this software and associated documentation
  25  *     files (the "Software"), to deal in the Software without
  26  *     restriction, including without limitation the rights to use,
  27  *     copy, modify, merge, publish, distribute, sublicense, and/or
  28  *     sell copies of the Software, and to permit persons to whom the
  29  *     Software is furnished to do so, subject to the following
  30  *     conditions:
  31  *
  32  *     The above copyright notice and this permission notice shall be
  33  *     included in all copies or substantial portions of the Software.
  34  *
  35  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  36  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  37  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  38  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  39  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  40  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  41  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  42  *     OTHER DEALINGS IN THE SOFTWARE.
  43  */
  44
  45 #include <dt-bindings/clock/rockchip,rk808.h>
  46 #include <dt-bindings/input/input.h>
  47 #include "rk3288.dtsi"
  48
  49 / {
  50         memory {
  51                 device_type = "memory";
  52                 reg = <0x0 0x80000000>;
  53         };
  54
  55         gpio_keys: gpio-keys {
  56                 compatible = "gpio-keys";
  57                 #address-cells = <1>;
  58                 #size-cells = <0>;
  59
  60                 pinctrl-names = "default";
  61                 pinctrl-0 = <&pwr_key_l>;
  62                 power {
  63                         label = "Power";
  64                         gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
  65                         linux,code = <KEY_POWER>;
  66                         debounce-interval = <100>;
  67                         gpio-key,wakeup;
  68                 };
  69         };
  70
  71         gpio-restart {
  72                 compatible = "gpio-restart";
  73                 gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
  74                 pinctrl-names = "default";
  75                 pinctrl-0 = <&ap_warm_reset_h>;
  76                 priority = <200>;
  77         };
  78
  79         emmc_pwrseq: emmc-pwrseq {
  80                 compatible = "mmc-pwrseq-emmc";
  81                 pinctrl-0 = <&emmc_reset>;
  82                 pinctrl-names = "default";
  83                 reset-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>;
  84         };
  85
  86         io_domains: io-domains {
  87                 compatible = "rockchip,rk3288-io-voltage-domain";
  88                 rockchip,grf = <&grf>;
  89
  90                 bb-supply = <&vcc33_io>;
  91                 dvp-supply = <&vcc_18>;
  92                 flash0-supply = <&vcc18_flashio>;
  93                 gpio1830-supply = <&vcc33_io>;
  94                 gpio30-supply = <&vcc33_io>;
  95                 lcdc-supply = <&vcc33_lcd>;
  96                 wifi-supply = <&vcc18_wl>;
  97         };
  98
  99         sdio_pwrseq: sdio-pwrseq {
 100                 compatible = "mmc-pwrseq-simple";
 101                 clocks = <&rk808 RK808_CLKOUT1>;
 102                 clock-names = "ext_clock";
 103                 pinctrl-names = "default";
 104                 pinctrl-0 = <&bt_enable_l>, <&wifi_enable_h>;
 105
 106                 /*
 107                  * On the module itself this is one of these (depending
 108                  * on the actual card populated):
 109                  * - SDIO_RESET_L_WL_REG_ON
 110                  * - PDN (power down when low)
 111                  */
 112                 reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
 113         };
 114
 115         vcc_5v: vcc-5v {
 116                 compatible = "regulator-fixed";
 117                 regulator-name = "vcc_5v";
 118                 regulator-always-on;
 119                 regulator-boot-on;
 120                 regulator-min-microvolt = <5000000>;
 121                 regulator-max-microvolt = <5000000>;
 122         };
 123
 124         vcc33_sys: vcc33-sys {
 125                 compatible = "regulator-fixed";
 126                 regulator-name = "vcc33_sys";
 127                 regulator-always-on;
 128                 regulator-boot-on;
 129                 regulator-min-microvolt = <3300000>;
 130                 regulator-max-microvolt = <3300000>;
 131         };
 132
 133         vcc50_hdmi: vcc50-hdmi {
 134                 compatible = "regulator-fixed";
 135                 regulator-name = "vcc50_hdmi";
 136                 regulator-always-on;
 137                 regulator-boot-on;
 138                 vin-supply = <&vcc_5v>;
 139         };
 140 };
 141
 142 &cpu0 {
 143         cpu0-supply = <&vdd_cpu>;
 144 };
 145
 146 &emmc {
 147         status = "okay";
 148
 149         broken-cd;
 150         bus-width = <8>;
 151         cap-mmc-highspeed;
 152         disable-wp;
 153         mmc-pwrseq = <&emmc_pwrseq>;
 154         non-removable;
 155         num-slots = <1>;
 156         pinctrl-names = "default";
 157         pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
 158 };
 159
 160 &hdmi {
 161         status = "okay";
 162 };
 163
 164 &i2c0 {
 165         status = "okay";
 166
 167         clock-frequency = <400000>;
 168         i2c-scl-falling-time-ns = <50>;         /* 2.5ns measured */
 169         i2c-scl-rising-time-ns = <100>;         /* 45ns measured */
 170
 171         rk808: pmic@1b {
 172                 compatible = "rockchip,rk808";
 173                 reg = <0x1b>;
 174                 clock-output-names = "xin32k", "wifibt_32kin";
 175                 interrupt-parent = <&gpio0>;
 176                 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
 177                 pinctrl-names = "default";
 178                 pinctrl-0 = <&pmic_int_l>;
 179                 rockchip,system-power-controller;
 180                 wakeup-source;
 181                 #clock-cells = <1>;
 182
 183                 vcc1-supply = <&vcc33_sys>;
 184                 vcc2-supply = <&vcc33_sys>;
 185                 vcc3-supply = <&vcc33_sys>;
 186                 vcc4-supply = <&vcc33_sys>;
 187                 vcc6-supply = <&vcc_5v>;
 188                 vcc7-supply = <&vcc33_sys>;
 189                 vcc8-supply = <&vcc33_sys>;
 190                 vcc12-supply = <&vcc_18>;
 191                 vddio-supply = <&vcc33_io>;
 192
 193                 regulators {
 194                         vdd_cpu: DCDC_REG1 {
 195                                 regulator-name = "vdd_arm";
 196                                 regulator-always-on;
 197                                 regulator-boot-on;
 198                                 regulator-min-microvolt = <750000>;
 199                                 regulator-max-microvolt = <1450000>;
 200                                 regulator-ramp-delay = <6001>;
 201                                 regulator-state-mem {
 202                                         regulator-off-in-suspend;
 203                                 };
 204                         };
 205
 206                         vdd_gpu: DCDC_REG2 {
 207                                 regulator-name = "vdd_gpu";
 208                                 regulator-always-on;
 209                                 regulator-boot-on;
 210                                 regulator-min-microvolt = <800000>;
 211                                 regulator-max-microvolt = <1250000>;
 212                                 regulator-ramp-delay = <6001>;
 213                                 regulator-state-mem {
 214                                         regulator-on-in-suspend;
 215                                         regulator-suspend-microvolt = <1000000>;
 216                                 };
 217                         };
 218
 219                         vcc135_ddr: DCDC_REG3 {
 220                                 regulator-name = "vcc135_ddr";
 221                                 regulator-always-on;
 222                                 regulator-boot-on;
 223                                 regulator-state-mem {
 224                                         regulator-on-in-suspend;
 225                                 };
 226                         };
 227
 228                         /*
 229                          * vcc_18 has several aliases.  (vcc18_flashio and
 230                          * vcc18_wl).  We'll add those aliases here just to
 231                          * make it easier to follow the schematic.  The signals
 232                          * are actually hooked together and only separated for
 233                          * power measurement purposes).
 234                          */
 235                         vcc18_wl: vcc18_flashio: vcc_18: DCDC_REG4 {
 236                                 regulator-name = "vcc_18";
 237                                 regulator-always-on;
 238                                 regulator-boot-on;
 239                                 regulator-min-microvolt = <1800000>;
 240                                 regulator-max-microvolt = <1800000>;
 241                                 regulator-state-mem {
 242                                         regulator-on-in-suspend;
 243                                         regulator-suspend-microvolt = <1800000>;
 244                                 };
 245                         };
 246
 247                         /*
 248                          * Note that both vcc33_io and vcc33_pmuio are always
 249                          * powered together. To simplify the logic in the dts
 250                          * we just refer to vcc33_io every time something is
 251                          * powered from vcc33_pmuio. In fact, on later boards
 252                          * (such as danger) they're the same net.
 253                          */
 254                         vcc33_io: LDO_REG1 {
 255                                 regulator-name = "vcc33_io";
 256                                 regulator-always-on;
 257                                 regulator-boot-on;
 258                                 regulator-min-microvolt = <3300000>;
 259                                 regulator-max-microvolt = <3300000>;
 260                                 regulator-state-mem {
 261                                         regulator-on-in-suspend;
 262                                         regulator-suspend-microvolt = <3300000>;
 263                                 };
 264                         };
 265
 266                         vdd_10: LDO_REG3 {
 267                                 regulator-name = "vdd_10";
 268                                 regulator-always-on;
 269                                 regulator-boot-on;
 270                                 regulator-min-microvolt = <1000000>;
 271                                 regulator-max-microvolt = <1000000>;
 272                                 regulator-state-mem {
 273                                         regulator-on-in-suspend;
 274                                         regulator-suspend-microvolt = <1000000>;
 275                                 };
 276                         };
 277
 278                         vdd10_lcd_pwren_h: LDO_REG7 {
 279                                 regulator-name = "vdd10_lcd_pwren_h";
 280                                 regulator-always-on;
 281                                 regulator-boot-on;
 282                                 regulator-min-microvolt = <2500000>;
 283                                 regulator-max-microvolt = <2500000>;
 284                                 regulator-state-mem {
 285                                         regulator-off-in-suspend;
 286                                 };
 287                         };
 288
 289                         vcc33_lcd: SWITCH_REG1 {
 290                                 regulator-name = "vcc33_lcd";
 291                                 regulator-always-on;
 292                                 regulator-boot-on;
 293                                 regulator-state-mem {
 294                                         regulator-off-in-suspend;
 295                                 };
 296                         };
 297                 };
 298         };
 299 };
 300
 301 &i2c1 {
 302         status = "okay";
 303
 304         clock-frequency = <400000>;
 305         i2c-scl-falling-time-ns = <50>;         /* 2.5ns measured */
 306         i2c-scl-rising-time-ns = <100>;         /* 40ns measured */
 307
 308         tpm: tpm@20 {
 309                 compatible = "infineon,slb9645tt";
 310                 reg = <0x20>;
 311                 powered-while-suspended;
 312         };
 313 };
 314
 315 &i2c2 {
 316         status = "okay";
 317
 318         /* 100kHz since 4.7k resistors don't rise fast enough */
 319         clock-frequency = <100000>;
 320         i2c-scl-falling-time-ns = <50>;         /* 10ns measured */
 321         i2c-scl-rising-time-ns = <800>;         /* 600ns measured */
 322 };
 323
 324 &i2c4 {
 325         status = "okay";
 326
 327         clock-frequency = <400000>;
 328         i2c-scl-falling-time-ns = <50>;         /* 11ns measured */
 329         i2c-scl-rising-time-ns = <300>;         /* 225ns measured */
 330 };
 331
 332 &i2c5 {
 333         status = "okay";
 334
 335         clock-frequency = <100000>;
 336         i2c-scl-falling-time-ns = <300>;
 337         i2c-scl-rising-time-ns = <1000>;
 338 };
 339
 340 &pwm1 {
 341         status = "okay";
 342 };
 343
 344 &sdio0 {
 345         status = "okay";
 346
 347         broken-cd;
 348         bus-width = <4>;
 349         cap-sd-highspeed;
 350         cap-sdio-irq;
 351         keep-power-in-suspend;
 352         mmc-pwrseq = <&sdio_pwrseq>;
 353         non-removable;
 354         num-slots = <1>;
 355         pinctrl-names = "default";
 356         pinctrl-0 = <&sdio0_clk &sdio0_cmd &sdio0_bus4>;
 357         vmmc-supply = <&vcc33_sys>;
 358         vqmmc-supply = <&vcc18_wl>;
 359 };
 360
 361 &spi2 {
 362         status = "okay";
 363
 364         rx-sample-delay-ns = <12>;
 365 };
 366
 367 &tsadc {
 368         status = "okay";
 369
 370         rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
 371         rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
 372 };
 373
 374 &uart0 {
 375         status = "okay";
 376
 377         /* We need to go faster than 24MHz, so adjust clock parents / rates */
 378         assigned-clocks = <&cru SCLK_UART0>;
 379         assigned-clock-rates = <48000000>;
 380
 381         /* Pins don't include flow control by default; add that in */
 382         pinctrl-names = "default";
 383         pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
 384 };
 385
 386 &uart1 {
 387         status = "okay";
 388 };
 389
 390 &uart2 {
 391         status = "okay";
 392 };
 393
 394 &usbphy {
 395         status = "okay";
 396 };
 397
 398 &usb_host0_ehci {
 399         status = "okay";
 400
 401         needs-reset-on-resume;
 402 };
 403
 404 &usb_host1 {
 405         status = "okay";
 406 };
 407
 408 &usb_otg {
 409         status = "okay";
 410
 411         assigned-clocks = <&cru SCLK_USBPHY480M_SRC>;
 412         assigned-clock-parents = <&cru SCLK_OTGPHY0>;
 413         dr_mode = "host";
 414 };
 415
 416 &vopb {
 417         status = "okay";
 418 };
 419
 420 &vopb_mmu {
 421         status = "okay";
 422 };
 423
 424 &wdt {
 425         status = "okay";
 426 };
 427
 428 &pinctrl {
 429         pinctrl-names = "default", "sleep";
 430         pinctrl-0 = <
 431                 /* Common for sleep and wake, but no owners */
 432                 &global_pwroff
 433         >;
 434         pinctrl-1 = <
 435                 /* Common for sleep and wake, but no owners */
 436                 &global_pwroff
 437         >;
 438
 439         pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
 440                 bias-disable;
 441                 drive-strength = <8>;
 442         };
 443
 444         pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
 445                 bias-pull-up;
 446                 drive-strength = <8>;
 447         };
 448
 449         pcfg_output_high: pcfg-output-high {
 450                 output-high;
 451         };
 452
 453         pcfg_output_low: pcfg-output-low {
 454                 output-low;
 455         };
 456
 457         buttons {
 458                 pwr_key_l: pwr-key-l {
 459                         rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
 460                 };
 461         };
 462
 463         emmc {
 464                 emmc_reset: emmc-reset {
 465                         rockchip,pins = <2 9 RK_FUNC_GPIO &pcfg_pull_none>;
 466                 };
 467
 468                 /*
 469                  * We run eMMC at max speed; bump up drive strength.
 470                  * We also have external pulls, so disable the internal ones.
 471                  */
 472                 emmc_clk: emmc-clk {
 473                         rockchip,pins = <3 18 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
 474                 };
 475
 476                 emmc_cmd: emmc-cmd {
 477                         rockchip,pins = <3 16 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
 478                 };
 479
 480                 emmc_bus8: emmc-bus8 {
 481                         rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
 482                                         <3 1 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
 483                                         <3 2 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
 484                                         <3 3 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
 485                                         <3 4 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
 486                                         <3 5 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
 487                                         <3 6 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
 488                                         <3 7 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
 489                 };
 490         };
 491
 492         pmic {
 493                 pmic_int_l: pmic-int-l {
 494                         rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
 495                 };
 496         };
 497
 498         reboot {
 499                 ap_warm_reset_h: ap-warm-reset-h {
 500                         rockchip,pins = <RK_GPIO0 13 RK_FUNC_GPIO &pcfg_pull_none>;
 501                 };
 502         };
 503
 504         recovery-switch {
 505                 rec_mode_l: rec-mode-l {
 506                         rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
 507                 };
 508         };
 509
 510         sdio0 {
 511                 wifi_enable_h: wifienable-h {
 512                         rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
 513                 };
 514
 515                 /* NOTE: mislabelled on schematic; should be bt_enable_h */
 516                 bt_enable_l: bt-enable-l {
 517                         rockchip,pins = <4 29 RK_FUNC_GPIO &pcfg_pull_none>;
 518                 };
 519
 520                 /*
 521                  * We run sdio0 at max speed; bump up drive strength.
 522                  * We also have external pulls, so disable the internal ones.
 523                  */
 524                 sdio0_bus4: sdio0-bus4 {
 525                         rockchip,pins = <4 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
 526                                         <4 21 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
 527                                         <4 22 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
 528                                         <4 23 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
 529                 };
 530
 531                 sdio0_cmd: sdio0-cmd {
 532                         rockchip,pins = <4 24 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
 533                 };
 534
 535                 sdio0_clk: sdio0-clk {
 536                         rockchip,pins = <4 25 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
 537                 };
 538         };
 539
 540         tpm {
 541                 tpm_int_h: tpm-int-h {
 542                         rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_none>;
 543                 };
 544         };
 545
 546         /*
 547          * On Marvell-based hardware this is a no-connect.  Make sure we enable
 548          * the pullup so that the line doesn't float.  The pullup shouldn't
 549          * hurt on Broadcom-based hardware since the other side is actively
 550          * driving this signal.  As proof: we've already got a pullup on RX.
 551          */
 552         uart0 {
 553                 uart0_cts: uart0-cts {
 554                         rockchip,pins = <4 18 RK_FUNC_1 &pcfg_pull_up>;
 555                 };
 556         };
 557
 558         write-protect {
 559                 fw_wp_ap: fw-wp-ap {
 560                         rockchip,pins = <7 6 RK_FUNC_GPIO &pcfg_pull_none>;
 561                 };
 562         };
 563 };