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blackfin idle: delete pm_idle
[karo-tx-linux.git] / arch / blackfin / kernel / process.c
1 /*
2  * Blackfin architecture-dependent process handling
3  *
4  * Copyright 2004-2009 Analog Devices Inc.
5  *
6  * Licensed under the GPL-2 or later
7  */
8
9 #include <linux/module.h>
10 #include <linux/unistd.h>
11 #include <linux/user.h>
12 #include <linux/uaccess.h>
13 #include <linux/slab.h>
14 #include <linux/sched.h>
15 #include <linux/tick.h>
16 #include <linux/fs.h>
17 #include <linux/err.h>
18
19 #include <asm/blackfin.h>
20 #include <asm/fixed_code.h>
21 #include <asm/mem_map.h>
22 #include <asm/irq.h>
23
24 asmlinkage void ret_from_fork(void);
25
26 /* Points to the SDRAM backup memory for the stack that is currently in
27  * L1 scratchpad memory.
28  */
29 void *current_l1_stack_save;
30
31 /* The number of tasks currently using a L1 stack area.  The SRAM is
32  * allocated/deallocated whenever this changes from/to zero.
33  */
34 int nr_l1stack_tasks;
35
36 /* Start and length of the area in L1 scratchpad memory which we've allocated
37  * for process stacks.
38  */
39 void *l1_stack_base;
40 unsigned long l1_stack_len;
41
42 void (*pm_power_off)(void) = NULL;
43 EXPORT_SYMBOL(pm_power_off);
44
45 /*
46  * The idle loop on BFIN
47  */
48 #ifdef CONFIG_IDLE_L1
49 static void default_idle(void)__attribute__((l1_text));
50 void cpu_idle(void)__attribute__((l1_text));
51 #endif
52
53 /*
54  * This is our default idle handler.  We need to disable
55  * interrupts here to ensure we don't miss a wakeup call.
56  */
57 static void default_idle(void)
58 {
59 #ifdef CONFIG_IPIPE
60         ipipe_suspend_domain();
61 #endif
62         hard_local_irq_disable();
63         if (!need_resched())
64                 idle_with_irq_disabled();
65
66         hard_local_irq_enable();
67 }
68
69 /*
70  * The idle thread.  We try to conserve power, while trying to keep
71  * overall latency low.  The architecture specific idle is passed
72  * a value to indicate the level of "idleness" of the system.
73  */
74 void cpu_idle(void)
75 {
76         /* endless idle loop with no priority at all */
77         while (1) {
78
79 #ifdef CONFIG_HOTPLUG_CPU
80                 if (cpu_is_offline(smp_processor_id()))
81                         cpu_die();
82 #endif
83                 if (!idle)
84                         idle = default_idle;
85                 tick_nohz_idle_enter();
86                 rcu_idle_enter();
87                 while (!need_resched())
88                         idle();
89                 rcu_idle_exit();
90                 tick_nohz_idle_exit();
91                 preempt_enable_no_resched();
92                 schedule();
93                 preempt_disable();
94         }
95 }
96
97 /*
98  * Do necessary setup to start up a newly executed thread.
99  *
100  * pass the data segment into user programs if it exists,
101  * it can't hurt anything as far as I can tell
102  */
103 void start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
104 {
105         regs->pc = new_ip;
106         if (current->mm)
107                 regs->p5 = current->mm->start_data;
108 #ifndef CONFIG_SMP
109         task_thread_info(current)->l1_task_info.stack_start =
110                 (void *)current->mm->context.stack_start;
111         task_thread_info(current)->l1_task_info.lowest_sp = (void *)new_sp;
112         memcpy(L1_SCRATCH_TASK_INFO, &task_thread_info(current)->l1_task_info,
113                sizeof(*L1_SCRATCH_TASK_INFO));
114 #endif
115         wrusp(new_sp);
116 }
117 EXPORT_SYMBOL_GPL(start_thread);
118
119 void flush_thread(void)
120 {
121 }
122
123 asmlinkage int bfin_clone(unsigned long clone_flags, unsigned long newsp)
124 {
125 #ifdef __ARCH_SYNC_CORE_DCACHE
126         if (current->nr_cpus_allowed == num_possible_cpus())
127                 set_cpus_allowed_ptr(current, cpumask_of(smp_processor_id()));
128 #endif
129         if (newsp)
130                 newsp -= 12;
131         return do_fork(clone_flags, newsp, 0, NULL, NULL);
132 }
133
134 int
135 copy_thread(unsigned long clone_flags,
136             unsigned long usp, unsigned long topstk,
137             struct task_struct *p)
138 {
139         struct pt_regs *childregs;
140         unsigned long *v;
141
142         childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE) - 1;
143         v = ((unsigned long *)childregs) - 2;
144         if (unlikely(p->flags & PF_KTHREAD)) {
145                 memset(childregs, 0, sizeof(struct pt_regs));
146                 v[0] = usp;
147                 v[1] = topstk;
148                 childregs->orig_p0 = -1;
149                 childregs->ipend = 0x8000;
150                 __asm__ __volatile__("%0 = syscfg;":"=da"(childregs->syscfg):);
151                 p->thread.usp = 0;
152         } else {
153                 *childregs = *current_pt_regs();
154                 childregs->r0 = 0;
155                 p->thread.usp = usp ? : rdusp();
156                 v[0] = v[1] = 0;
157         }
158
159         p->thread.ksp = (unsigned long)v;
160         p->thread.pc = (unsigned long)ret_from_fork;
161
162         return 0;
163 }
164
165 unsigned long get_wchan(struct task_struct *p)
166 {
167         unsigned long fp, pc;
168         unsigned long stack_page;
169         int count = 0;
170         if (!p || p == current || p->state == TASK_RUNNING)
171                 return 0;
172
173         stack_page = (unsigned long)p;
174         fp = p->thread.usp;
175         do {
176                 if (fp < stack_page + sizeof(struct thread_info) ||
177                     fp >= 8184 + stack_page)
178                         return 0;
179                 pc = ((unsigned long *)fp)[1];
180                 if (!in_sched_functions(pc))
181                         return pc;
182                 fp = *(unsigned long *)fp;
183         }
184         while (count++ < 16);
185         return 0;
186 }
187
188 void finish_atomic_sections (struct pt_regs *regs)
189 {
190         int __user *up0 = (int __user *)regs->p0;
191
192         switch (regs->pc) {
193         default:
194                 /* not in middle of an atomic step, so resume like normal */
195                 return;
196
197         case ATOMIC_XCHG32 + 2:
198                 put_user(regs->r1, up0);
199                 break;
200
201         case ATOMIC_CAS32 + 2:
202         case ATOMIC_CAS32 + 4:
203                 if (regs->r0 == regs->r1)
204         case ATOMIC_CAS32 + 6:
205                         put_user(regs->r2, up0);
206                 break;
207
208         case ATOMIC_ADD32 + 2:
209                 regs->r0 = regs->r1 + regs->r0;
210                 /* fall through */
211         case ATOMIC_ADD32 + 4:
212                 put_user(regs->r0, up0);
213                 break;
214
215         case ATOMIC_SUB32 + 2:
216                 regs->r0 = regs->r1 - regs->r0;
217                 /* fall through */
218         case ATOMIC_SUB32 + 4:
219                 put_user(regs->r0, up0);
220                 break;
221
222         case ATOMIC_IOR32 + 2:
223                 regs->r0 = regs->r1 | regs->r0;
224                 /* fall through */
225         case ATOMIC_IOR32 + 4:
226                 put_user(regs->r0, up0);
227                 break;
228
229         case ATOMIC_AND32 + 2:
230                 regs->r0 = regs->r1 & regs->r0;
231                 /* fall through */
232         case ATOMIC_AND32 + 4:
233                 put_user(regs->r0, up0);
234                 break;
235
236         case ATOMIC_XOR32 + 2:
237                 regs->r0 = regs->r1 ^ regs->r0;
238                 /* fall through */
239         case ATOMIC_XOR32 + 4:
240                 put_user(regs->r0, up0);
241                 break;
242         }
243
244         /*
245          * We've finished the atomic section, and the only thing left for
246          * userspace is to do a RTS, so we might as well handle that too
247          * since we need to update the PC anyways.
248          */
249         regs->pc = regs->rets;
250 }
251
252 static inline
253 int in_mem(unsigned long addr, unsigned long size,
254            unsigned long start, unsigned long end)
255 {
256         return addr >= start && addr + size <= end;
257 }
258 static inline
259 int in_mem_const_off(unsigned long addr, unsigned long size, unsigned long off,
260                      unsigned long const_addr, unsigned long const_size)
261 {
262         return const_size &&
263                in_mem(addr, size, const_addr + off, const_addr + const_size);
264 }
265 static inline
266 int in_mem_const(unsigned long addr, unsigned long size,
267                  unsigned long const_addr, unsigned long const_size)
268 {
269         return in_mem_const_off(addr, size, 0, const_addr, const_size);
270 }
271 #ifdef CONFIG_BF60x
272 #define ASYNC_ENABLED(bnum, bctlnum)    1
273 #else
274 #define ASYNC_ENABLED(bnum, bctlnum) \
275 ({ \
276         (bfin_read_EBIU_AMGCTL() & 0xe) < ((bnum + 1) << 1) ? 0 : \
277         bfin_read_EBIU_AMBCTL##bctlnum() & B##bnum##RDYEN ? 0 : \
278         1; \
279 })
280 #endif
281 /*
282  * We can't read EBIU banks that aren't enabled or we end up hanging
283  * on the access to the async space.  Make sure we validate accesses
284  * that cross async banks too.
285  *      0 - found, but unusable
286  *      1 - found & usable
287  *      2 - not found
288  */
289 static
290 int in_async(unsigned long addr, unsigned long size)
291 {
292         if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE) {
293                 if (!ASYNC_ENABLED(0, 0))
294                         return 0;
295                 if (addr + size <= ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE)
296                         return 1;
297                 size -= ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE - addr;
298                 addr = ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE;
299         }
300         if (addr >= ASYNC_BANK1_BASE && addr < ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE) {
301                 if (!ASYNC_ENABLED(1, 0))
302                         return 0;
303                 if (addr + size <= ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE)
304                         return 1;
305                 size -= ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE - addr;
306                 addr = ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE;
307         }
308         if (addr >= ASYNC_BANK2_BASE && addr < ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE) {
309                 if (!ASYNC_ENABLED(2, 1))
310                         return 0;
311                 if (addr + size <= ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE)
312                         return 1;
313                 size -= ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE - addr;
314                 addr = ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE;
315         }
316         if (addr >= ASYNC_BANK3_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) {
317                 if (ASYNC_ENABLED(3, 1))
318                         return 0;
319                 if (addr + size <= ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE)
320                         return 1;
321                 return 0;
322         }
323
324         /* not within async bounds */
325         return 2;
326 }
327
328 int bfin_mem_access_type(unsigned long addr, unsigned long size)
329 {
330         int cpu = raw_smp_processor_id();
331
332         /* Check that things do not wrap around */
333         if (addr > ULONG_MAX - size)
334                 return -EFAULT;
335
336         if (in_mem(addr, size, FIXED_CODE_START, physical_mem_end))
337                 return BFIN_MEM_ACCESS_CORE;
338
339         if (in_mem_const(addr, size, L1_CODE_START, L1_CODE_LENGTH))
340                 return cpu == 0 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA;
341         if (in_mem_const(addr, size, L1_SCRATCH_START, L1_SCRATCH_LENGTH))
342                 return cpu == 0 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT;
343         if (in_mem_const(addr, size, L1_DATA_A_START, L1_DATA_A_LENGTH))
344                 return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
345         if (in_mem_const(addr, size, L1_DATA_B_START, L1_DATA_B_LENGTH))
346                 return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
347 #ifdef COREB_L1_CODE_START
348         if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH))
349                 return cpu == 1 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA;
350         if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
351                 return cpu == 1 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT;
352         if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH))
353                 return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
354         if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH))
355                 return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
356 #endif
357         if (in_mem_const(addr, size, L2_START, L2_LENGTH))
358                 return BFIN_MEM_ACCESS_CORE;
359
360         if (addr >= SYSMMR_BASE)
361                 return BFIN_MEM_ACCESS_CORE_ONLY;
362
363         switch (in_async(addr, size)) {
364         case 0: return -EFAULT;
365         case 1: return BFIN_MEM_ACCESS_CORE;
366         case 2: /* fall through */;
367         }
368
369         if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH))
370                 return BFIN_MEM_ACCESS_CORE;
371         if (in_mem_const(addr, size, L1_ROM_START, L1_ROM_LENGTH))
372                 return BFIN_MEM_ACCESS_DMA;
373
374         return -EFAULT;
375 }
376
377 #if defined(CONFIG_ACCESS_CHECK)
378 #ifdef CONFIG_ACCESS_OK_L1
379 __attribute__((l1_text))
380 #endif
381 /* Return 1 if access to memory range is OK, 0 otherwise */
382 int _access_ok(unsigned long addr, unsigned long size)
383 {
384         int aret;
385
386         if (size == 0)
387                 return 1;
388         /* Check that things do not wrap around */
389         if (addr > ULONG_MAX - size)
390                 return 0;
391         if (segment_eq(get_fs(), KERNEL_DS))
392                 return 1;
393 #ifdef CONFIG_MTD_UCLINUX
394         if (1)
395 #else
396         if (0)
397 #endif
398         {
399                 if (in_mem(addr, size, memory_start, memory_end))
400                         return 1;
401                 if (in_mem(addr, size, memory_mtd_end, physical_mem_end))
402                         return 1;
403 # ifndef CONFIG_ROMFS_ON_MTD
404                 if (0)
405 # endif
406                         /* For XIP, allow user space to use pointers within the ROMFS.  */
407                         if (in_mem(addr, size, memory_mtd_start, memory_mtd_end))
408                                 return 1;
409         } else {
410                 if (in_mem(addr, size, memory_start, physical_mem_end))
411                         return 1;
412         }
413
414         if (in_mem(addr, size, (unsigned long)__init_begin, (unsigned long)__init_end))
415                 return 1;
416
417         if (in_mem_const(addr, size, L1_CODE_START, L1_CODE_LENGTH))
418                 return 1;
419         if (in_mem_const_off(addr, size, _etext_l1 - _stext_l1, L1_CODE_START, L1_CODE_LENGTH))
420                 return 1;
421         if (in_mem_const_off(addr, size, _ebss_l1 - _sdata_l1, L1_DATA_A_START, L1_DATA_A_LENGTH))
422                 return 1;
423         if (in_mem_const_off(addr, size, _ebss_b_l1 - _sdata_b_l1, L1_DATA_B_START, L1_DATA_B_LENGTH))
424                 return 1;
425 #ifdef COREB_L1_CODE_START
426         if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH))
427                 return 1;
428         if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
429                 return 1;
430         if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH))
431                 return 1;
432         if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH))
433                 return 1;
434 #endif
435
436 #ifndef CONFIG_EXCEPTION_L1_SCRATCH
437         if (in_mem_const(addr, size, (unsigned long)l1_stack_base, l1_stack_len))
438                 return 1;
439 #endif
440
441         aret = in_async(addr, size);
442         if (aret < 2)
443                 return aret;
444
445         if (in_mem_const_off(addr, size, _ebss_l2 - _stext_l2, L2_START, L2_LENGTH))
446                 return 1;
447
448         if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH))
449                 return 1;
450         if (in_mem_const(addr, size, L1_ROM_START, L1_ROM_LENGTH))
451                 return 1;
452
453         return 0;
454 }
455 EXPORT_SYMBOL(_access_ok);
456 #endif /* CONFIG_ACCESS_CHECK */