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1 /*
2  * P5040DS Device Tree Source
3  *
4  * Copyright 2012 - 2014 Freescale Semiconductor Inc.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions are met:
8  *     * Redistributions of source code must retain the above copyright
9  *       notice, this list of conditions and the following disclaimer.
10  *     * Redistributions in binary form must reproduce the above copyright
11  *       notice, this list of conditions and the following disclaimer in the
12  *       documentation and/or other materials provided with the distribution.
13  *     * Neither the name of Freescale Semiconductor nor the
14  *       names of its contributors may be used to endorse or promote products
15  *       derived from this software without specific prior written permission.
16  *
17  *
18  * ALTERNATIVELY, this software may be distributed under the terms of the
19  * GNU General Public License ("GPL") as published by the Free Software
20  * Foundation, either version 2 of that License or (at your option) any
21  * later version.
22  *
23  * This software is provided by Freescale Semiconductor "as is" and any
24  * express or implied warranties, including, but not limited to, the implied
25  * warranties of merchantability and fitness for a particular purpose are
26  * disclaimed. In no event shall Freescale Semiconductor be liable for any
27  * direct, indirect, incidental, special, exemplary, or consequential damages
28  * (including, but not limited to, procurement of substitute goods or services;
29  * loss of use, data, or profits; or business interruption) however caused and
30  * on any theory of liability, whether in contract, strict liability, or tort
31  * (including negligence or otherwise) arising in any way out of the use of this
32  * software, even if advised of the possibility of such damage.
33  */
34
35 /include/ "p5040si-pre.dtsi"
36
37 / {
38         model = "fsl,P5040DS";
39         compatible = "fsl,P5040DS";
40         #address-cells = <2>;
41         #size-cells = <2>;
42         interrupt-parent = <&mpic>;
43
44         memory {
45                 device_type = "memory";
46         };
47
48         reserved-memory {
49                 #address-cells = <2>;
50                 #size-cells = <2>;
51                 ranges;
52
53                 bman_fbpr: bman-fbpr {
54                         size = <0 0x1000000>;
55                         alignment = <0 0x1000000>;
56                 };
57                 qman_fqd: qman-fqd {
58                         size = <0 0x400000>;
59                         alignment = <0 0x400000>;
60                 };
61                 qman_pfdr: qman-pfdr {
62                         size = <0 0x2000000>;
63                         alignment = <0 0x2000000>;
64                 };
65         };
66
67         dcsr: dcsr@f00000000 {
68                 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
69         };
70
71         bportals: bman-portals@ff4000000 {
72                 ranges = <0x0 0xf 0xf4000000 0x200000>;
73         };
74
75         qportals: qman-portals@ff4200000 {
76                 ranges = <0x0 0xf 0xf4200000 0x200000>;
77         };
78
79         soc: soc@ffe000000 {
80                 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
81                 reg = <0xf 0xfe000000 0 0x00001000>;
82                 spi@110000 {
83                         flash@0 {
84                                 #address-cells = <1>;
85                                 #size-cells = <1>;
86                                 compatible = "spansion,s25sl12801";
87                                 reg = <0>;
88                                 spi-max-frequency = <40000000>; /* input clock */
89                                 partition@u-boot {
90                                         label = "u-boot";
91                                         reg = <0x00000000 0x00100000>;
92                                 };
93                                 partition@kernel {
94                                         label = "kernel";
95                                         reg = <0x00100000 0x00500000>;
96                                 };
97                                 partition@dtb {
98                                         label = "dtb";
99                                         reg = <0x00600000 0x00100000>;
100                                 };
101                                 partition@fs {
102                                         label = "file system";
103                                         reg = <0x00700000 0x00900000>;
104                                 };
105                         };
106                 };
107
108                 i2c@118100 {
109                         eeprom@51 {
110                                 compatible = "at24,24c256";
111                                 reg = <0x51>;
112                         };
113                         eeprom@52 {
114                                 compatible = "at24,24c256";
115                                 reg = <0x52>;
116                         };
117                 };
118
119                 i2c@119100 {
120                         rtc@68 {
121                                 compatible = "dallas,ds3232";
122                                 reg = <0x68>;
123                                 interrupts = <0x1 0x1 0 0>;
124                         };
125                         ina220@40 {
126                                 compatible = "ti,ina220";
127                                 reg = <0x40>;
128                                 shunt-resistor = <1000>;
129                         };
130                         ina220@41 {
131                                 compatible = "ti,ina220";
132                                 reg = <0x41>;
133                                 shunt-resistor = <1000>;
134                         };
135                         ina220@44 {
136                                 compatible = "ti,ina220";
137                                 reg = <0x44>;
138                                 shunt-resistor = <1000>;
139                         };
140                         ina220@45 {
141                                 compatible = "ti,ina220";
142                                 reg = <0x45>;
143                                 shunt-resistor = <1000>;
144                         };
145                         adt7461@4c {
146                                 compatible = "adi,adt7461";
147                                 reg = <0x4c>;
148                         };
149                 };
150         };
151
152         lbc: localbus@ffe124000 {
153                 reg = <0xf 0xfe124000 0 0x1000>;
154                 ranges = <0 0 0xf 0xe8000000 0x08000000
155                           2 0 0xf 0xffa00000 0x00040000
156                           3 0 0xf 0xffdf0000 0x00008000>;
157
158                 flash@0,0 {
159                         compatible = "cfi-flash";
160                         reg = <0 0 0x08000000>;
161                         bank-width = <2>;
162                         device-width = <2>;
163                 };
164
165                 nand@2,0 {
166                         #address-cells = <1>;
167                         #size-cells = <1>;
168                         compatible = "fsl,elbc-fcm-nand";
169                         reg = <0x2 0x0 0x40000>;
170
171                         partition@0 {
172                                 label = "NAND U-Boot Image";
173                                 reg = <0x0 0x02000000>;
174                         };
175
176                         partition@2000000 {
177                                 label = "NAND Root File System";
178                                 reg = <0x02000000 0x10000000>;
179                         };
180
181                         partition@12000000 {
182                                 label = "NAND Compressed RFS Image";
183                                 reg = <0x12000000 0x08000000>;
184                         };
185
186                         partition@1a000000 {
187                                 label = "NAND Linux Kernel Image";
188                                 reg = <0x1a000000 0x04000000>;
189                         };
190
191                         partition@1e000000 {
192                                 label = "NAND DTB Image";
193                                 reg = <0x1e000000 0x01000000>;
194                         };
195
196                         partition@1f000000 {
197                                 label = "NAND Writable User area";
198                                 reg = <0x1f000000 0x01000000>;
199                         };
200                 };
201
202                 board-control@3,0 {
203                         compatible = "fsl,p5040ds-fpga", "fsl,fpga-ngpixis";
204                         reg = <3 0 0x40>;
205                 };
206         };
207
208         pci0: pcie@ffe200000 {
209                 reg = <0xf 0xfe200000 0 0x1000>;
210                 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
211                           0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
212                 pcie@0 {
213                         ranges = <0x02000000 0 0xe0000000
214                                   0x02000000 0 0xe0000000
215                                   0 0x20000000
216
217                                   0x01000000 0 0x00000000
218                                   0x01000000 0 0x00000000
219                                   0 0x00010000>;
220                 };
221         };
222
223         pci1: pcie@ffe201000 {
224                 reg = <0xf 0xfe201000 0 0x1000>;
225                 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
226                           0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
227                 pcie@0 {
228                         ranges = <0x02000000 0 0xe0000000
229                                   0x02000000 0 0xe0000000
230                                   0 0x20000000
231
232                                   0x01000000 0 0x00000000
233                                   0x01000000 0 0x00000000
234                                   0 0x00010000>;
235                 };
236         };
237
238         pci2: pcie@ffe202000 {
239                 reg = <0xf 0xfe202000 0 0x1000>;
240                 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
241                           0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
242                 pcie@0 {
243                         ranges = <0x02000000 0 0xe0000000
244                                   0x02000000 0 0xe0000000
245                                   0 0x20000000
246
247                                   0x01000000 0 0x00000000
248                                   0x01000000 0 0x00000000
249                                   0 0x00010000>;
250                 };
251         };
252 };
253
254 /include/ "p5040si-post.dtsi"