arch/powerpc/platforms/iseries/setup.c

   1 /*
   2  *    Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
   3  *    Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
   4  *
   5  *    Description:
   6  *      Architecture- / platform-specific boot-time initialization code for
   7  *      the IBM iSeries LPAR.  Adapted from original code by Grant Erickson and
   8  *      code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
   9  *      <dan@net4x.com>.
  10  *
  11  *      This program is free software; you can redistribute it and/or
  12  *      modify it under the terms of the GNU General Public License
  13  *      as published by the Free Software Foundation; either version
  14  *      2 of the License, or (at your option) any later version.
  15  */
  16
  17 #undef DEBUG
  18
  19 #include <linux/config.h>
  20 #include <linux/init.h>
  21 #include <linux/threads.h>
  22 #include <linux/smp.h>
  23 #include <linux/param.h>
  24 #include <linux/string.h>
  25 #include <linux/initrd.h>
  26 #include <linux/seq_file.h>
  27 #include <linux/kdev_t.h>
  28 #include <linux/major.h>
  29 #include <linux/root_dev.h>
  30 #include <linux/kernel.h>
  31
  32 #include <asm/processor.h>
  33 #include <asm/machdep.h>
  34 #include <asm/page.h>
  35 #include <asm/mmu.h>
  36 #include <asm/pgtable.h>
  37 #include <asm/mmu_context.h>
  38 #include <asm/cputable.h>
  39 #include <asm/sections.h>
  40 #include <asm/iommu.h>
  41 #include <asm/firmware.h>
  42 #include <asm/systemcfg.h>
  43
  44 #include <asm/time.h>
  45 #include <asm/paca.h>
  46 #include <asm/cache.h>
  47 #include <asm/sections.h>
  48 #include <asm/abs_addr.h>
  49 #include <asm/iseries/hv_lp_config.h>
  50 #include <asm/iseries/hv_call_event.h>
  51 #include <asm/iseries/hv_call_xm.h>
  52 #include <asm/iseries/it_lp_queue.h>
  53 #include <asm/iseries/mf.h>
  54 #include <asm/iseries/hv_lp_event.h>
  55 #include <asm/iseries/lpar_map.h>
  56
  57 #include "naca.h"
  58 #include "setup.h"
  59 #include "irq.h"
  60 #include "vpd_areas.h"
  61 #include "processor_vpd.h"
  62 #include "main_store.h"
  63 #include "call_sm.h"
  64 #include "call_hpt.h"
  65
  66 extern void hvlog(char *fmt, ...);
  67
  68 #ifdef DEBUG
  69 #define DBG(fmt...) hvlog(fmt)
  70 #else
  71 #define DBG(fmt...)
  72 #endif
  73
  74 /* Function Prototypes */
  75 static unsigned long build_iSeries_Memory_Map(void);
  76 static void iseries_shared_idle(void);
  77 static void iseries_dedicated_idle(void);
  78 #ifdef CONFIG_PCI
  79 extern void iSeries_pci_final_fixup(void);
  80 #else
  81 static void iSeries_pci_final_fixup(void) { }
  82 #endif
  83
  84 /* Global Variables */
  85 int piranha_simulator;
  86
  87 extern int rd_size;             /* Defined in drivers/block/rd.c */
  88 extern unsigned long klimit;
  89 extern unsigned long embedded_sysmap_start;
  90 extern unsigned long embedded_sysmap_end;
  91
  92 extern unsigned long iSeries_recal_tb;
  93 extern unsigned long iSeries_recal_titan;
  94
  95 static int mf_initialized;
  96
  97 static unsigned long cmd_mem_limit;
  98
  99 struct MemoryBlock {
 100         unsigned long absStart;
 101         unsigned long absEnd;
 102         unsigned long logicalStart;
 103         unsigned long logicalEnd;
 104 };
 105
 106 /*
 107  * Process the main store vpd to determine where the holes in memory are
 108  * and return the number of physical blocks and fill in the array of
 109  * block data.
 110  */
 111 static unsigned long iSeries_process_Condor_mainstore_vpd(
 112                 struct MemoryBlock *mb_array, unsigned long max_entries)
 113 {
 114         unsigned long holeFirstChunk, holeSizeChunks;
 115         unsigned long numMemoryBlocks = 1;
 116         struct IoHriMainStoreSegment4 *msVpd =
 117                 (struct IoHriMainStoreSegment4 *)xMsVpd;
 118         unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
 119         unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
 120         unsigned long holeSize = holeEnd - holeStart;
 121
 122         printk("Mainstore_VPD: Condor\n");
 123         /*
 124          * Determine if absolute memory has any
 125          * holes so that we can interpret the
 126          * access map we get back from the hypervisor
 127          * correctly.
 128          */
 129         mb_array[0].logicalStart = 0;
 130         mb_array[0].logicalEnd = 0x100000000;
 131         mb_array[0].absStart = 0;
 132         mb_array[0].absEnd = 0x100000000;
 133
 134         if (holeSize) {
 135                 numMemoryBlocks = 2;
 136                 holeStart = holeStart & 0x000fffffffffffff;
 137                 holeStart = addr_to_chunk(holeStart);
 138                 holeFirstChunk = holeStart;
 139                 holeSize = addr_to_chunk(holeSize);
 140                 holeSizeChunks = holeSize;
 141                 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
 142                                 holeFirstChunk, holeSizeChunks );
 143                 mb_array[0].logicalEnd = holeFirstChunk;
 144                 mb_array[0].absEnd = holeFirstChunk;
 145                 mb_array[1].logicalStart = holeFirstChunk;
 146                 mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
 147                 mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
 148                 mb_array[1].absEnd = 0x100000000;
 149         }
 150         return numMemoryBlocks;
 151 }
 152
 153 #define MaxSegmentAreas                 32
 154 #define MaxSegmentAdrRangeBlocks        128
 155 #define MaxAreaRangeBlocks              4
 156
 157 static unsigned long iSeries_process_Regatta_mainstore_vpd(
 158                 struct MemoryBlock *mb_array, unsigned long max_entries)
 159 {
 160         struct IoHriMainStoreSegment5 *msVpdP =
 161                 (struct IoHriMainStoreSegment5 *)xMsVpd;
 162         unsigned long numSegmentBlocks = 0;
 163         u32 existsBits = msVpdP->msAreaExists;
 164         unsigned long area_num;
 165
 166         printk("Mainstore_VPD: Regatta\n");
 167
 168         for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
 169                 unsigned long numAreaBlocks;
 170                 struct IoHriMainStoreArea4 *currentArea;
 171
 172                 if (existsBits & 0x80000000) {
 173                         unsigned long block_num;
 174
 175                         currentArea = &msVpdP->msAreaArray[area_num];
 176                         numAreaBlocks = currentArea->numAdrRangeBlocks;
 177                         printk("ms_vpd: processing area %2ld  blocks=%ld",
 178                                         area_num, numAreaBlocks);
 179                         for (block_num = 0; block_num < numAreaBlocks;
 180                                         ++block_num ) {
 181                                 /* Process an address range block */
 182                                 struct MemoryBlock tempBlock;
 183                                 unsigned long i;
 184
 185                                 tempBlock.absStart =
 186                                         (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
 187                                 tempBlock.absEnd =
 188                                         (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
 189                                 tempBlock.logicalStart = 0;
 190                                 tempBlock.logicalEnd   = 0;
 191                                 printk("\n          block %ld absStart=%016lx absEnd=%016lx",
 192                                                 block_num, tempBlock.absStart,
 193                                                 tempBlock.absEnd);
 194
 195                                 for (i = 0; i < numSegmentBlocks; ++i) {
 196                                         if (mb_array[i].absStart ==
 197                                                         tempBlock.absStart)
 198                                                 break;
 199                                 }
 200                                 if (i == numSegmentBlocks) {
 201                                         if (numSegmentBlocks == max_entries)
 202                                                 panic("iSeries_process_mainstore_vpd: too many memory blocks");
 203                                         mb_array[numSegmentBlocks] = tempBlock;
 204                                         ++numSegmentBlocks;
 205                                 } else
 206                                         printk(" (duplicate)");
 207                         }
 208                         printk("\n");
 209                 }
 210                 existsBits <<= 1;
 211         }
 212         /* Now sort the blocks found into ascending sequence */
 213         if (numSegmentBlocks > 1) {
 214                 unsigned long m, n;
 215
 216                 for (m = 0; m < numSegmentBlocks - 1; ++m) {
 217                         for (n = numSegmentBlocks - 1; m < n; --n) {
 218                                 if (mb_array[n].absStart <
 219                                                 mb_array[n-1].absStart) {
 220                                         struct MemoryBlock tempBlock;
 221
 222                                         tempBlock = mb_array[n];
 223                                         mb_array[n] = mb_array[n-1];
 224                                         mb_array[n-1] = tempBlock;
 225                                 }
 226                         }
 227                 }
 228         }
 229         /*
 230          * Assign "logical" addresses to each block.  These
 231          * addresses correspond to the hypervisor "bitmap" space.
 232          * Convert all addresses into units of 256K chunks.
 233          */
 234         {
 235         unsigned long i, nextBitmapAddress;
 236
 237         printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
 238         nextBitmapAddress = 0;
 239         for (i = 0; i < numSegmentBlocks; ++i) {
 240                 unsigned long length = mb_array[i].absEnd -
 241                         mb_array[i].absStart;
 242
 243                 mb_array[i].logicalStart = nextBitmapAddress;
 244                 mb_array[i].logicalEnd = nextBitmapAddress + length;
 245                 nextBitmapAddress += length;
 246                 printk("          Bitmap range: %016lx - %016lx\n"
 247                                 "        Absolute range: %016lx - %016lx\n",
 248                                 mb_array[i].logicalStart,
 249                                 mb_array[i].logicalEnd,
 250                                 mb_array[i].absStart, mb_array[i].absEnd);
 251                 mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
 252                                 0x000fffffffffffff);
 253                 mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
 254                                 0x000fffffffffffff);
 255                 mb_array[i].logicalStart =
 256                         addr_to_chunk(mb_array[i].logicalStart);
 257                 mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
 258         }
 259         }
 260
 261         return numSegmentBlocks;
 262 }
 263
 264 static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
 265                 unsigned long max_entries)
 266 {
 267         unsigned long i;
 268         unsigned long mem_blocks = 0;
 269
 270         if (cpu_has_feature(CPU_FTR_SLB))
 271                 mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
 272                                 max_entries);
 273         else
 274                 mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
 275                                 max_entries);
 276
 277         printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
 278         for (i = 0; i < mem_blocks; ++i) {
 279                 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
 280                        "                             abs chunks %016lx - %016lx\n",
 281                         i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
 282                         mb_array[i].absStart, mb_array[i].absEnd);
 283         }
 284         return mem_blocks;
 285 }
 286
 287 static void __init iSeries_get_cmdline(void)
 288 {
 289         char *p, *q;
 290
 291         /* copy the command line parameter from the primary VSP  */
 292         HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
 293                         HvLpDma_Direction_RemoteToLocal);
 294
 295         p = cmd_line;
 296         q = cmd_line + 255;
 297         while(p < q) {
 298                 if (!*p || *p == '\n')
 299                         break;
 300                 ++p;
 301         }
 302         *p = 0;
 303 }
 304
 305 static void __init iSeries_init_early(void)
 306 {
 307         DBG(" -> iSeries_init_early()\n");
 308
 309         ppc64_firmware_features = FW_FEATURE_ISERIES;
 310
 311         ppc64_interrupt_controller = IC_ISERIES;
 312
 313 #if defined(CONFIG_BLK_DEV_INITRD)
 314         /*
 315          * If the init RAM disk has been configured and there is
 316          * a non-zero starting address for it, set it up
 317          */
 318         if (naca.xRamDisk) {
 319                 initrd_start = (unsigned long)__va(naca.xRamDisk);
 320                 initrd_end = initrd_start + naca.xRamDiskSize * HW_PAGE_SIZE;
 321                 initrd_below_start_ok = 1;      // ramdisk in kernel space
 322                 ROOT_DEV = Root_RAM0;
 323                 if (((rd_size * 1024) / HW_PAGE_SIZE) < naca.xRamDiskSize)
 324                         rd_size = (naca.xRamDiskSize * HW_PAGE_SIZE) / 1024;
 325         } else
 326 #endif /* CONFIG_BLK_DEV_INITRD */
 327         {
 328             /* ROOT_DEV = MKDEV(VIODASD_MAJOR, 1); */
 329         }
 330
 331         iSeries_recal_tb = get_tb();
 332         iSeries_recal_titan = HvCallXm_loadTod();
 333
 334         /*
 335          * Initialize the hash table management pointers
 336          */
 337         hpte_init_iSeries();
 338
 339         /*
 340          * Initialize the DMA/TCE management
 341          */
 342         iommu_init_early_iSeries();
 343
 344         /* Initialize machine-dependency vectors */
 345 #ifdef CONFIG_SMP
 346         smp_init_iSeries();
 347 #endif
 348         if (itLpNaca.xPirEnvironMode == 0)
 349                 piranha_simulator = 1;
 350
 351         /* Associate Lp Event Queue 0 with processor 0 */
 352         HvCallEvent_setLpEventQueueInterruptProc(0, 0);
 353
 354         mf_init();
 355         mf_initialized = 1;
 356         mb();
 357
 358         /* If we were passed an initrd, set the ROOT_DEV properly if the values
 359          * look sensible. If not, clear initrd reference.
 360          */
 361 #ifdef CONFIG_BLK_DEV_INITRD
 362         if (initrd_start >= KERNELBASE && initrd_end >= KERNELBASE &&
 363             initrd_end > initrd_start)
 364                 ROOT_DEV = Root_RAM0;
 365         else
 366                 initrd_start = initrd_end = 0;
 367 #endif /* CONFIG_BLK_DEV_INITRD */
 368
 369         DBG(" <- iSeries_init_early()\n");
 370 }
 371
 372 struct mschunks_map mschunks_map = {
 373         /* XXX We don't use these, but Piranha might need them. */
 374         .chunk_size  = MSCHUNKS_CHUNK_SIZE,
 375         .chunk_shift = MSCHUNKS_CHUNK_SHIFT,
 376         .chunk_mask  = MSCHUNKS_OFFSET_MASK,
 377 };
 378 EXPORT_SYMBOL(mschunks_map);
 379
 380 void mschunks_alloc(unsigned long num_chunks)
 381 {
 382         klimit = _ALIGN(klimit, sizeof(u32));
 383         mschunks_map.mapping = (u32 *)klimit;
 384         klimit += num_chunks * sizeof(u32);
 385         mschunks_map.num_chunks = num_chunks;
 386 }
 387
 388 /*
 389  * The iSeries may have very large memories ( > 128 GB ) and a partition
 390  * may get memory in "chunks" that may be anywhere in the 2**52 real
 391  * address space.  The chunks are 256K in size.  To map this to the
 392  * memory model Linux expects, the AS/400 specific code builds a
 393  * translation table to translate what Linux thinks are "physical"
 394  * addresses to the actual real addresses.  This allows us to make
 395  * it appear to Linux that we have contiguous memory starting at
 396  * physical address zero while in fact this could be far from the truth.
 397  * To avoid confusion, I'll let the words physical and/or real address
 398  * apply to the Linux addresses while I'll use "absolute address" to
 399  * refer to the actual hardware real address.
 400  *
 401  * build_iSeries_Memory_Map gets information from the Hypervisor and
 402  * looks at the Main Store VPD to determine the absolute addresses
 403  * of the memory that has been assigned to our partition and builds
 404  * a table used to translate Linux's physical addresses to these
 405  * absolute addresses.  Absolute addresses are needed when
 406  * communicating with the hypervisor (e.g. to build HPT entries)
 407  *
 408  * Returns the physical memory size
 409  */
 410
 411 static unsigned long __init build_iSeries_Memory_Map(void)
 412 {
 413         u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
 414         u32 nextPhysChunk;
 415         u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
 416         u32 totalChunks,moreChunks;
 417         u32 currChunk, thisChunk, absChunk;
 418         u32 currDword;
 419         u32 chunkBit;
 420         u64 map;
 421         struct MemoryBlock mb[32];
 422         unsigned long numMemoryBlocks, curBlock;
 423
 424         /* Chunk size on iSeries is 256K bytes */
 425         totalChunks = (u32)HvLpConfig_getMsChunks();
 426         mschunks_alloc(totalChunks);
 427
 428         /*
 429          * Get absolute address of our load area
 430          * and map it to physical address 0
 431          * This guarantees that the loadarea ends up at physical 0
 432          * otherwise, it might not be returned by PLIC as the first
 433          * chunks
 434          */
 435
 436         loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
 437         loadAreaSize =  itLpNaca.xLoadAreaChunks;
 438
 439         /*
 440          * Only add the pages already mapped here.
 441          * Otherwise we might add the hpt pages
 442          * The rest of the pages of the load area
 443          * aren't in the HPT yet and can still
 444          * be assigned an arbitrary physical address
 445          */
 446         if ((loadAreaSize * 64) > HvPagesToMap)
 447                 loadAreaSize = HvPagesToMap / 64;
 448
 449         loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
 450
 451         /*
 452          * TODO Do we need to do something if the HPT is in the 64MB load area?
 453          * This would be required if the itLpNaca.xLoadAreaChunks includes
 454          * the HPT size
 455          */
 456
 457         printk("Mapping load area - physical addr = 0000000000000000\n"
 458                 "                    absolute addr = %016lx\n",
 459                 chunk_to_addr(loadAreaFirstChunk));
 460         printk("Load area size %dK\n", loadAreaSize * 256);
 461
 462         for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
 463                 mschunks_map.mapping[nextPhysChunk] =
 464                         loadAreaFirstChunk + nextPhysChunk;
 465
 466         /*
 467          * Get absolute address of our HPT and remember it so
 468          * we won't map it to any physical address
 469          */
 470         hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
 471         hptSizePages = (u32)HvCallHpt_getHptPages();
 472         hptSizeChunks = hptSizePages >>
 473                 (MSCHUNKS_CHUNK_SHIFT - HW_PAGE_SHIFT);
 474         hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
 475
 476         printk("HPT absolute addr = %016lx, size = %dK\n",
 477                         chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
 478
 479         ppc64_pft_size = __ilog2(hptSizePages * HW_PAGE_SIZE);
 480
 481         /*
 482          * The actual hashed page table is in the hypervisor,
 483          * we have no direct access
 484          */
 485         htab_address = NULL;
 486
 487         /*
 488          * Determine if absolute memory has any
 489          * holes so that we can interpret the
 490          * access map we get back from the hypervisor
 491          * correctly.
 492          */
 493         numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
 494
 495         /*
 496          * Process the main store access map from the hypervisor
 497          * to build up our physical -> absolute translation table
 498          */
 499         curBlock = 0;
 500         currChunk = 0;
 501         currDword = 0;
 502         moreChunks = totalChunks;
 503
 504         while (moreChunks) {
 505                 map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
 506                                 currDword);
 507                 thisChunk = currChunk;
 508                 while (map) {
 509                         chunkBit = map >> 63;
 510                         map <<= 1;
 511                         if (chunkBit) {
 512                                 --moreChunks;
 513                                 while (thisChunk >= mb[curBlock].logicalEnd) {
 514                                         ++curBlock;
 515                                         if (curBlock >= numMemoryBlocks)
 516                                                 panic("out of memory blocks");
 517                                 }
 518                                 if (thisChunk < mb[curBlock].logicalStart)
 519                                         panic("memory block error");
 520
 521                                 absChunk = mb[curBlock].absStart +
 522                                         (thisChunk - mb[curBlock].logicalStart);
 523                                 if (((absChunk < hptFirstChunk) ||
 524                                      (absChunk > hptLastChunk)) &&
 525                                     ((absChunk < loadAreaFirstChunk) ||
 526                                      (absChunk > loadAreaLastChunk))) {
 527                                         mschunks_map.mapping[nextPhysChunk] =
 528                                                 absChunk;
 529                                         ++nextPhysChunk;
 530                                 }
 531                         }
 532                         ++thisChunk;
 533                 }
 534                 ++currDword;
 535                 currChunk += 64;
 536         }
 537
 538         /*
 539          * main store size (in chunks) is
 540          *   totalChunks - hptSizeChunks
 541          * which should be equal to
 542          *   nextPhysChunk
 543          */
 544         return chunk_to_addr(nextPhysChunk);
 545 }
 546
 547 /*
 548  * Document me.
 549  */
 550 static void __init iSeries_setup_arch(void)
 551 {
 552         unsigned procIx = get_paca()->lppaca.dyn_hv_phys_proc_index;
 553
 554         if (get_paca()->lppaca.shared_proc) {
 555                 ppc_md.idle_loop = iseries_shared_idle;
 556                 printk(KERN_INFO "Using shared processor idle loop\n");
 557         } else {
 558                 ppc_md.idle_loop = iseries_dedicated_idle;
 559                 printk(KERN_INFO "Using dedicated idle loop\n");
 560         }
 561
 562         /* Setup the Lp Event Queue */
 563         setup_hvlpevent_queue();
 564
 565         printk("Max  logical processors = %d\n",
 566                         itVpdAreas.xSlicMaxLogicalProcs);
 567         printk("Max physical processors = %d\n",
 568                         itVpdAreas.xSlicMaxPhysicalProcs);
 569
 570         _systemcfg->processor = xIoHriProcessorVpd[procIx].xPVR;
 571         printk("Processor version = %x\n", _systemcfg->processor);
 572 }
 573
 574 static void iSeries_show_cpuinfo(struct seq_file *m)
 575 {
 576         seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
 577 }
 578
 579 /*
 580  * Document me.
 581  * and Implement me.
 582  */
 583 static int iSeries_get_irq(struct pt_regs *regs)
 584 {
 585         /* -2 means ignore this interrupt */
 586         return -2;
 587 }
 588
 589 /*
 590  * Document me.
 591  */
 592 static void iSeries_restart(char *cmd)
 593 {
 594         mf_reboot();
 595 }
 596
 597 /*
 598  * Document me.
 599  */
 600 static void iSeries_power_off(void)
 601 {
 602         mf_power_off();
 603 }
 604
 605 /*
 606  * Document me.
 607  */
 608 static void iSeries_halt(void)
 609 {
 610         mf_power_off();
 611 }
 612
 613 static void __init iSeries_progress(char * st, unsigned short code)
 614 {
 615         printk("Progress: [%04x] - %s\n", (unsigned)code, st);
 616         if (!piranha_simulator && mf_initialized) {
 617                 if (code != 0xffff)
 618                         mf_display_progress(code);
 619                 else
 620                         mf_clear_src();
 621         }
 622 }
 623
 624 static void __init iSeries_fixup_klimit(void)
 625 {
 626         /*
 627          * Change klimit to take into account any ram disk
 628          * that may be included
 629          */
 630         if (naca.xRamDisk)
 631                 klimit = KERNELBASE + (u64)naca.xRamDisk +
 632                         (naca.xRamDiskSize * HW_PAGE_SIZE);
 633         else {
 634                 /*
 635                  * No ram disk was included - check and see if there
 636                  * was an embedded system map.  Change klimit to take
 637                  * into account any embedded system map
 638                  */
 639                 if (embedded_sysmap_end)
 640                         klimit = KERNELBASE + ((embedded_sysmap_end + 4095) &
 641                                         0xfffffffffffff000);
 642         }
 643 }
 644
 645 static int __init iSeries_src_init(void)
 646 {
 647         /* clear the progress line */
 648         ppc_md.progress(" ", 0xffff);
 649         return 0;
 650 }
 651
 652 late_initcall(iSeries_src_init);
 653
 654 static inline void process_iSeries_events(void)
 655 {
 656         asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
 657 }
 658
 659 static void yield_shared_processor(void)
 660 {
 661         unsigned long tb;
 662
 663         HvCall_setEnabledInterrupts(HvCall_MaskIPI |
 664                                     HvCall_MaskLpEvent |
 665                                     HvCall_MaskLpProd |
 666                                     HvCall_MaskTimeout);
 667
 668         tb = get_tb();
 669         /* Compute future tb value when yield should expire */
 670         HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
 671
 672         /*
 673          * The decrementer stops during the yield.  Force a fake decrementer
 674          * here and let the timer_interrupt code sort out the actual time.
 675          */
 676         get_paca()->lppaca.int_dword.fields.decr_int = 1;
 677         process_iSeries_events();
 678 }
 679
 680 static void iseries_shared_idle(void)
 681 {
 682         while (1) {
 683                 while (!need_resched() && !hvlpevent_is_pending()) {
 684                         local_irq_disable();
 685                         ppc64_runlatch_off();
 686
 687                         /* Recheck with irqs off */
 688                         if (!need_resched() && !hvlpevent_is_pending())
 689                                 yield_shared_processor();
 690
 691                         HMT_medium();
 692                         local_irq_enable();
 693                 }
 694
 695                 ppc64_runlatch_on();
 696
 697                 if (hvlpevent_is_pending())
 698                         process_iSeries_events();
 699
 700                 preempt_enable_no_resched();
 701                 schedule();
 702                 preempt_disable();
 703         }
 704 }
 705
 706 static void iseries_dedicated_idle(void)
 707 {
 708         long oldval;
 709         set_thread_flag(TIF_POLLING_NRFLAG);
 710
 711         while (1) {
 712                 if (!need_resched()) {
 713                         while (!need_resched()) {
 714                                 ppc64_runlatch_off();
 715                                 HMT_low();
 716
 717                                 if (hvlpevent_is_pending()) {
 718                                         HMT_medium();
 719                                         ppc64_runlatch_on();
 720                                         process_iSeries_events();
 721                                 }
 722                         }
 723
 724                         HMT_medium();
 725                 }
 726
 727                 ppc64_runlatch_on();
 728                 preempt_enable_no_resched();
 729                 schedule();
 730                 preempt_disable();
 731         }
 732 }
 733
 734 #ifndef CONFIG_PCI
 735 void __init iSeries_init_IRQ(void) { }
 736 #endif
 737
 738 static int __init iseries_probe(int platform)
 739 {
 740         return PLATFORM_ISERIES_LPAR == platform;
 741 }
 742
 743 struct machdep_calls __initdata iseries_md = {
 744         .setup_arch     = iSeries_setup_arch,
 745         .show_cpuinfo   = iSeries_show_cpuinfo,
 746         .init_IRQ       = iSeries_init_IRQ,
 747         .get_irq        = iSeries_get_irq,
 748         .init_early     = iSeries_init_early,
 749         .pcibios_fixup  = iSeries_pci_final_fixup,
 750         .restart        = iSeries_restart,
 751         .power_off      = iSeries_power_off,
 752         .halt           = iSeries_halt,
 753         .get_boot_time  = iSeries_get_boot_time,
 754         .set_rtc_time   = iSeries_set_rtc_time,
 755         .get_rtc_time   = iSeries_get_rtc_time,
 756         .calibrate_decr = generic_calibrate_decr,
 757         .progress       = iSeries_progress,
 758         .probe          = iseries_probe,
 759         /* XXX Implement enable_pmcs for iSeries */
 760 };
 761
 762 struct blob {
 763         unsigned char data[PAGE_SIZE];
 764         unsigned long next;
 765 };
 766
 767 struct iseries_flat_dt {
 768         struct boot_param_header header;
 769         u64 reserve_map[2];
 770         struct blob dt;
 771         struct blob strings;
 772 };
 773
 774 struct iseries_flat_dt iseries_dt;
 775
 776 void dt_init(struct iseries_flat_dt *dt)
 777 {
 778         dt->header.off_mem_rsvmap =
 779                 offsetof(struct iseries_flat_dt, reserve_map);
 780         dt->header.off_dt_struct = offsetof(struct iseries_flat_dt, dt);
 781         dt->header.off_dt_strings = offsetof(struct iseries_flat_dt, strings);
 782         dt->header.totalsize = sizeof(struct iseries_flat_dt);
 783         dt->header.dt_strings_size = sizeof(struct blob);
 784
 785         /* There is no notion of hardware cpu id on iSeries */
 786         dt->header.boot_cpuid_phys = smp_processor_id();
 787
 788         dt->dt.next = (unsigned long)&dt->dt.data;
 789         dt->strings.next = (unsigned long)&dt->strings.data;
 790
 791         dt->header.magic = OF_DT_HEADER;
 792         dt->header.version = 0x10;
 793         dt->header.last_comp_version = 0x10;
 794
 795         dt->reserve_map[0] = 0;
 796         dt->reserve_map[1] = 0;
 797 }
 798
 799 void dt_check_blob(struct blob *b)
 800 {
 801         if (b->next >= (unsigned long)&b->next) {
 802                 DBG("Ran out of space in flat device tree blob!\n");
 803                 BUG();
 804         }
 805 }
 806
 807 void dt_push_u32(struct iseries_flat_dt *dt, u32 value)
 808 {
 809         *((u32*)dt->dt.next) = value;
 810         dt->dt.next += sizeof(u32);
 811
 812         dt_check_blob(&dt->dt);
 813 }
 814
 815 void dt_push_u64(struct iseries_flat_dt *dt, u64 value)
 816 {
 817         *((u64*)dt->dt.next) = value;
 818         dt->dt.next += sizeof(u64);
 819
 820         dt_check_blob(&dt->dt);
 821 }
 822
 823 unsigned long dt_push_bytes(struct blob *blob, char *data, int len)
 824 {
 825         unsigned long start = blob->next - (unsigned long)blob->data;
 826
 827         memcpy((char *)blob->next, data, len);
 828         blob->next = _ALIGN(blob->next + len, 4);
 829
 830         dt_check_blob(blob);
 831
 832         return start;
 833 }
 834
 835 void dt_start_node(struct iseries_flat_dt *dt, char *name)
 836 {
 837         dt_push_u32(dt, OF_DT_BEGIN_NODE);
 838         dt_push_bytes(&dt->dt, name, strlen(name) + 1);
 839 }
 840
 841 #define dt_end_node(dt) dt_push_u32(dt, OF_DT_END_NODE)
 842
 843 void dt_prop(struct iseries_flat_dt *dt, char *name, char *data, int len)
 844 {
 845         unsigned long offset;
 846
 847         dt_push_u32(dt, OF_DT_PROP);
 848
 849         /* Length of the data */
 850         dt_push_u32(dt, len);
 851
 852         /* Put the property name in the string blob. */
 853         offset = dt_push_bytes(&dt->strings, name, strlen(name) + 1);
 854
 855         /* The offset of the properties name in the string blob. */
 856         dt_push_u32(dt, (u32)offset);
 857
 858         /* The actual data. */
 859         dt_push_bytes(&dt->dt, data, len);
 860 }
 861
 862 void dt_prop_str(struct iseries_flat_dt *dt, char *name, char *data)
 863 {
 864         dt_prop(dt, name, data, strlen(data) + 1); /* + 1 for NULL */
 865 }
 866
 867 void dt_prop_u32(struct iseries_flat_dt *dt, char *name, u32 data)
 868 {
 869         dt_prop(dt, name, (char *)&data, sizeof(u32));
 870 }
 871
 872 void dt_prop_u64(struct iseries_flat_dt *dt, char *name, u64 data)
 873 {
 874         dt_prop(dt, name, (char *)&data, sizeof(u64));
 875 }
 876
 877 void dt_prop_u64_list(struct iseries_flat_dt *dt, char *name, u64 *data, int n)
 878 {
 879         dt_prop(dt, name, (char *)data, sizeof(u64) * n);
 880 }
 881
 882 void dt_prop_empty(struct iseries_flat_dt *dt, char *name)
 883 {
 884         dt_prop(dt, name, NULL, 0);
 885 }
 886
 887 void dt_cpus(struct iseries_flat_dt *dt)
 888 {
 889         unsigned char buf[32];
 890         unsigned char *p;
 891         unsigned int i, index;
 892         struct IoHriProcessorVpd *d;
 893
 894         /* yuck */
 895         snprintf(buf, 32, "PowerPC,%s", cur_cpu_spec->cpu_name);
 896         p = strchr(buf, ' ');
 897         if (!p) p = buf + strlen(buf);
 898
 899         dt_start_node(dt, "cpus");
 900         dt_prop_u32(dt, "#address-cells", 1);
 901         dt_prop_u32(dt, "#size-cells", 0);
 902
 903         for (i = 0; i < NR_CPUS; i++) {
 904                 if (paca[i].lppaca.dyn_proc_status >= 2)
 905                         continue;
 906
 907                 snprintf(p, 32 - (p - buf), "@%d", i);
 908                 dt_start_node(dt, buf);
 909
 910                 dt_prop_str(dt, "device_type", "cpu");
 911
 912                 index = paca[i].lppaca.dyn_hv_phys_proc_index;
 913                 d = &xIoHriProcessorVpd[index];
 914
 915                 dt_prop_u32(dt, "i-cache-size", d->xInstCacheSize * 1024);
 916                 dt_prop_u32(dt, "i-cache-line-size", d->xInstCacheOperandSize);
 917
 918                 dt_prop_u32(dt, "d-cache-size", d->xDataL1CacheSizeKB * 1024);
 919                 dt_prop_u32(dt, "d-cache-line-size", d->xDataCacheOperandSize);
 920
 921                 /* magic conversions to Hz copied from old code */
 922                 dt_prop_u32(dt, "clock-frequency",
 923                         ((1UL << 34) * 1000000) / d->xProcFreq);
 924                 dt_prop_u32(dt, "timebase-frequency",
 925                         ((1UL << 32) * 1000000) / d->xTimeBaseFreq);
 926
 927                 dt_prop_u32(dt, "reg", i);
 928
 929                 dt_end_node(dt);
 930         }
 931
 932         dt_end_node(dt);
 933 }
 934
 935 void build_flat_dt(struct iseries_flat_dt *dt, unsigned long phys_mem_size)
 936 {
 937         u64 tmp[2];
 938
 939         dt_init(dt);
 940
 941         dt_start_node(dt, "");
 942
 943         dt_prop_u32(dt, "#address-cells", 2);
 944         dt_prop_u32(dt, "#size-cells", 2);
 945
 946         /* /memory */
 947         dt_start_node(dt, "memory@0");
 948         dt_prop_str(dt, "name", "memory");
 949         dt_prop_str(dt, "device_type", "memory");
 950         tmp[0] = 0;
 951         tmp[1] = phys_mem_size;
 952         dt_prop_u64_list(dt, "reg", tmp, 2);
 953         dt_end_node(dt);
 954
 955         /* /chosen */
 956         dt_start_node(dt, "chosen");
 957         dt_prop_u32(dt, "linux,platform", PLATFORM_ISERIES_LPAR);
 958         if (cmd_mem_limit)
 959                 dt_prop_u64(dt, "linux,memory-limit", cmd_mem_limit);
 960         dt_end_node(dt);
 961
 962         dt_cpus(dt);
 963
 964         dt_end_node(dt);
 965
 966         dt_push_u32(dt, OF_DT_END);
 967 }
 968
 969 void * __init iSeries_early_setup(void)
 970 {
 971         unsigned long phys_mem_size;
 972
 973         iSeries_fixup_klimit();
 974
 975         /*
 976          * Initialize the table which translate Linux physical addresses to
 977          * AS/400 absolute addresses
 978          */
 979         phys_mem_size = build_iSeries_Memory_Map();
 980
 981         iSeries_get_cmdline();
 982
 983         /* Save unparsed command line copy for /proc/cmdline */
 984         strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE);
 985
 986         /* Parse early parameters, in particular mem=x */
 987         parse_early_param();
 988
 989         build_flat_dt(&iseries_dt, phys_mem_size);
 990
 991         return (void *) __pa(&iseries_dt);
 992 }
 993
 994 /*
 995  * On iSeries we just parse the mem=X option from the command line.
 996  * On pSeries it's a bit more complicated, see prom_init_mem()
 997  */
 998 static int __init early_parsemem(char *p)
 999 {
1000         if (p)
1001                 cmd_mem_limit = ALIGN(memparse(p, &p), PAGE_SIZE);
1002         return 0;
1003 }
1004 early_param("mem", early_parsemem);