Consolidate of_get_parent
[karo-tx-linux.git] / arch / sparc64 / kernel / prom.c
1 /*
2  * Procedures for creating, accessing and interpreting the device tree.
3  *
4  * Paul Mackerras       August 1996.
5  * Copyright (C) 1996-2005 Paul Mackerras.
6  * 
7  *  Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
8  *    {engebret|bergner}@us.ibm.com 
9  *
10  *  Adapted for sparc64 by David S. Miller davem@davemloft.net
11  *
12  *      This program is free software; you can redistribute it and/or
13  *      modify it under the terms of the GNU General Public License
14  *      as published by the Free Software Foundation; either version
15  *      2 of the License, or (at your option) any later version.
16  */
17
18 #include <linux/kernel.h>
19 #include <linux/types.h>
20 #include <linux/string.h>
21 #include <linux/mm.h>
22 #include <linux/bootmem.h>
23 #include <linux/module.h>
24
25 #include <asm/prom.h>
26 #include <asm/of_device.h>
27 #include <asm/oplib.h>
28 #include <asm/irq.h>
29 #include <asm/asi.h>
30 #include <asm/upa.h>
31 #include <asm/smp.h>
32
33 static struct device_node *allnodes;
34
35 extern rwlock_t devtree_lock;   /* temporary while merging */
36
37 struct device_node *of_get_next_child(const struct device_node *node,
38         struct device_node *prev)
39 {
40         struct device_node *next;
41
42         next = prev ? prev->sibling : node->child;
43         for (; next != 0; next = next->sibling) {
44                 break;
45         }
46
47         return next;
48 }
49 EXPORT_SYMBOL(of_get_next_child);
50
51 struct device_node *of_find_node_by_path(const char *path)
52 {
53         struct device_node *np = allnodes;
54
55         for (; np != 0; np = np->allnext) {
56                 if (np->full_name != 0 && strcmp(np->full_name, path) == 0)
57                         break;
58         }
59
60         return np;
61 }
62 EXPORT_SYMBOL(of_find_node_by_path);
63
64 struct device_node *of_find_node_by_phandle(phandle handle)
65 {
66         struct device_node *np;
67
68         for (np = allnodes; np != 0; np = np->allnext)
69                 if (np->node == handle)
70                         break;
71
72         return np;
73 }
74 EXPORT_SYMBOL(of_find_node_by_phandle);
75
76 struct device_node *of_find_node_by_name(struct device_node *from,
77         const char *name)
78 {
79         struct device_node *np;
80
81         np = from ? from->allnext : allnodes;
82         for (; np != NULL; np = np->allnext)
83                 if (np->name != NULL && strcmp(np->name, name) == 0)
84                         break;
85
86         return np;
87 }
88 EXPORT_SYMBOL(of_find_node_by_name);
89
90 struct device_node *of_find_node_by_type(struct device_node *from,
91         const char *type)
92 {
93         struct device_node *np;
94
95         np = from ? from->allnext : allnodes;
96         for (; np != 0; np = np->allnext)
97                 if (np->type != 0 && strcmp(np->type, type) == 0)
98                         break;
99
100         return np;
101 }
102 EXPORT_SYMBOL(of_find_node_by_type);
103
104 struct device_node *of_find_compatible_node(struct device_node *from,
105         const char *type, const char *compatible)
106 {
107         struct device_node *np;
108
109         np = from ? from->allnext : allnodes;
110         for (; np != 0; np = np->allnext) {
111                 if (type != NULL
112                     && !(np->type != 0 && strcmp(np->type, type) == 0))
113                         continue;
114                 if (of_device_is_compatible(np, compatible))
115                         break;
116         }
117
118         return np;
119 }
120 EXPORT_SYMBOL(of_find_compatible_node);
121
122 int of_getintprop_default(struct device_node *np, const char *name, int def)
123 {
124         struct property *prop;
125         int len;
126
127         prop = of_find_property(np, name, &len);
128         if (!prop || len != 4)
129                 return def;
130
131         return *(int *) prop->value;
132 }
133 EXPORT_SYMBOL(of_getintprop_default);
134
135 int of_set_property(struct device_node *dp, const char *name, void *val, int len)
136 {
137         struct property **prevp;
138         void *new_val;
139         int err;
140
141         new_val = kmalloc(len, GFP_KERNEL);
142         if (!new_val)
143                 return -ENOMEM;
144
145         memcpy(new_val, val, len);
146
147         err = -ENODEV;
148
149         write_lock(&devtree_lock);
150         prevp = &dp->properties;
151         while (*prevp) {
152                 struct property *prop = *prevp;
153
154                 if (!strcasecmp(prop->name, name)) {
155                         void *old_val = prop->value;
156                         int ret;
157
158                         ret = prom_setprop(dp->node, name, val, len);
159                         err = -EINVAL;
160                         if (ret >= 0) {
161                                 prop->value = new_val;
162                                 prop->length = len;
163
164                                 if (OF_IS_DYNAMIC(prop))
165                                         kfree(old_val);
166
167                                 OF_MARK_DYNAMIC(prop);
168
169                                 err = 0;
170                         }
171                         break;
172                 }
173                 prevp = &(*prevp)->next;
174         }
175         write_unlock(&devtree_lock);
176
177         /* XXX Upate procfs if necessary... */
178
179         return err;
180 }
181 EXPORT_SYMBOL(of_set_property);
182
183 static unsigned int prom_early_allocated;
184
185 static void * __init prom_early_alloc(unsigned long size)
186 {
187         void *ret;
188
189         ret = __alloc_bootmem(size, SMP_CACHE_BYTES, 0UL);
190         if (ret != NULL)
191                 memset(ret, 0, size);
192
193         prom_early_allocated += size;
194
195         return ret;
196 }
197
198 #ifdef CONFIG_PCI
199 /* PSYCHO interrupt mapping support. */
200 #define PSYCHO_IMAP_A_SLOT0     0x0c00UL
201 #define PSYCHO_IMAP_B_SLOT0     0x0c20UL
202 static unsigned long psycho_pcislot_imap_offset(unsigned long ino)
203 {
204         unsigned int bus =  (ino & 0x10) >> 4;
205         unsigned int slot = (ino & 0x0c) >> 2;
206
207         if (bus == 0)
208                 return PSYCHO_IMAP_A_SLOT0 + (slot * 8);
209         else
210                 return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
211 }
212
213 #define PSYCHO_IMAP_SCSI        0x1000UL
214 #define PSYCHO_IMAP_ETH         0x1008UL
215 #define PSYCHO_IMAP_BPP         0x1010UL
216 #define PSYCHO_IMAP_AU_REC      0x1018UL
217 #define PSYCHO_IMAP_AU_PLAY     0x1020UL
218 #define PSYCHO_IMAP_PFAIL       0x1028UL
219 #define PSYCHO_IMAP_KMS         0x1030UL
220 #define PSYCHO_IMAP_FLPY        0x1038UL
221 #define PSYCHO_IMAP_SHW         0x1040UL
222 #define PSYCHO_IMAP_KBD         0x1048UL
223 #define PSYCHO_IMAP_MS          0x1050UL
224 #define PSYCHO_IMAP_SER         0x1058UL
225 #define PSYCHO_IMAP_TIM0        0x1060UL
226 #define PSYCHO_IMAP_TIM1        0x1068UL
227 #define PSYCHO_IMAP_UE          0x1070UL
228 #define PSYCHO_IMAP_CE          0x1078UL
229 #define PSYCHO_IMAP_A_ERR       0x1080UL
230 #define PSYCHO_IMAP_B_ERR       0x1088UL
231 #define PSYCHO_IMAP_PMGMT       0x1090UL
232 #define PSYCHO_IMAP_GFX         0x1098UL
233 #define PSYCHO_IMAP_EUPA        0x10a0UL
234
235 static unsigned long __psycho_onboard_imap_off[] = {
236 /*0x20*/        PSYCHO_IMAP_SCSI,
237 /*0x21*/        PSYCHO_IMAP_ETH,
238 /*0x22*/        PSYCHO_IMAP_BPP,
239 /*0x23*/        PSYCHO_IMAP_AU_REC,
240 /*0x24*/        PSYCHO_IMAP_AU_PLAY,
241 /*0x25*/        PSYCHO_IMAP_PFAIL,
242 /*0x26*/        PSYCHO_IMAP_KMS,
243 /*0x27*/        PSYCHO_IMAP_FLPY,
244 /*0x28*/        PSYCHO_IMAP_SHW,
245 /*0x29*/        PSYCHO_IMAP_KBD,
246 /*0x2a*/        PSYCHO_IMAP_MS,
247 /*0x2b*/        PSYCHO_IMAP_SER,
248 /*0x2c*/        PSYCHO_IMAP_TIM0,
249 /*0x2d*/        PSYCHO_IMAP_TIM1,
250 /*0x2e*/        PSYCHO_IMAP_UE,
251 /*0x2f*/        PSYCHO_IMAP_CE,
252 /*0x30*/        PSYCHO_IMAP_A_ERR,
253 /*0x31*/        PSYCHO_IMAP_B_ERR,
254 /*0x32*/        PSYCHO_IMAP_PMGMT,
255 /*0x33*/        PSYCHO_IMAP_GFX,
256 /*0x34*/        PSYCHO_IMAP_EUPA,
257 };
258 #define PSYCHO_ONBOARD_IRQ_BASE         0x20
259 #define PSYCHO_ONBOARD_IRQ_LAST         0x34
260 #define psycho_onboard_imap_offset(__ino) \
261         __psycho_onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
262
263 #define PSYCHO_ICLR_A_SLOT0     0x1400UL
264 #define PSYCHO_ICLR_SCSI        0x1800UL
265
266 #define psycho_iclr_offset(ino)                                       \
267         ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
268                         (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
269
270 static unsigned int psycho_irq_build(struct device_node *dp,
271                                      unsigned int ino,
272                                      void *_data)
273 {
274         unsigned long controller_regs = (unsigned long) _data;
275         unsigned long imap, iclr;
276         unsigned long imap_off, iclr_off;
277         int inofixup = 0;
278
279         ino &= 0x3f;
280         if (ino < PSYCHO_ONBOARD_IRQ_BASE) {
281                 /* PCI slot */
282                 imap_off = psycho_pcislot_imap_offset(ino);
283         } else {
284                 /* Onboard device */
285                 if (ino > PSYCHO_ONBOARD_IRQ_LAST) {
286                         prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino);
287                         prom_halt();
288                 }
289                 imap_off = psycho_onboard_imap_offset(ino);
290         }
291
292         /* Now build the IRQ bucket. */
293         imap = controller_regs + imap_off;
294
295         iclr_off = psycho_iclr_offset(ino);
296         iclr = controller_regs + iclr_off;
297
298         if ((ino & 0x20) == 0)
299                 inofixup = ino & 0x03;
300
301         return build_irq(inofixup, iclr, imap);
302 }
303
304 static void __init psycho_irq_trans_init(struct device_node *dp)
305 {
306         const struct linux_prom64_registers *regs;
307
308         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
309         dp->irq_trans->irq_build = psycho_irq_build;
310
311         regs = of_get_property(dp, "reg", NULL);
312         dp->irq_trans->data = (void *) regs[2].phys_addr;
313 }
314
315 #define sabre_read(__reg) \
316 ({      u64 __ret; \
317         __asm__ __volatile__("ldxa [%1] %2, %0" \
318                              : "=r" (__ret) \
319                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
320                              : "memory"); \
321         __ret; \
322 })
323
324 struct sabre_irq_data {
325         unsigned long controller_regs;
326         unsigned int pci_first_busno;
327 };
328 #define SABRE_CONFIGSPACE       0x001000000UL
329 #define SABRE_WRSYNC            0x1c20UL
330
331 #define SABRE_CONFIG_BASE(CONFIG_SPACE) \
332         (CONFIG_SPACE | (1UL << 24))
333 #define SABRE_CONFIG_ENCODE(BUS, DEVFN, REG)    \
334         (((unsigned long)(BUS)   << 16) |       \
335          ((unsigned long)(DEVFN) << 8)  |       \
336          ((unsigned long)(REG)))
337
338 /* When a device lives behind a bridge deeper in the PCI bus topology
339  * than APB, a special sequence must run to make sure all pending DMA
340  * transfers at the time of IRQ delivery are visible in the coherency
341  * domain by the cpu.  This sequence is to perform a read on the far
342  * side of the non-APB bridge, then perform a read of Sabre's DMA
343  * write-sync register.
344  */
345 static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
346 {
347         unsigned int phys_hi = (unsigned int) (unsigned long) _arg1;
348         struct sabre_irq_data *irq_data = _arg2;
349         unsigned long controller_regs = irq_data->controller_regs;
350         unsigned long sync_reg = controller_regs + SABRE_WRSYNC;
351         unsigned long config_space = controller_regs + SABRE_CONFIGSPACE;
352         unsigned int bus, devfn;
353         u16 _unused;
354
355         config_space = SABRE_CONFIG_BASE(config_space);
356
357         bus = (phys_hi >> 16) & 0xff;
358         devfn = (phys_hi >> 8) & 0xff;
359
360         config_space |= SABRE_CONFIG_ENCODE(bus, devfn, 0x00);
361
362         __asm__ __volatile__("membar #Sync\n\t"
363                              "lduha [%1] %2, %0\n\t"
364                              "membar #Sync"
365                              : "=r" (_unused)
366                              : "r" ((u16 *) config_space),
367                                "i" (ASI_PHYS_BYPASS_EC_E_L)
368                              : "memory");
369
370         sabre_read(sync_reg);
371 }
372
373 #define SABRE_IMAP_A_SLOT0      0x0c00UL
374 #define SABRE_IMAP_B_SLOT0      0x0c20UL
375 #define SABRE_IMAP_SCSI         0x1000UL
376 #define SABRE_IMAP_ETH          0x1008UL
377 #define SABRE_IMAP_BPP          0x1010UL
378 #define SABRE_IMAP_AU_REC       0x1018UL
379 #define SABRE_IMAP_AU_PLAY      0x1020UL
380 #define SABRE_IMAP_PFAIL        0x1028UL
381 #define SABRE_IMAP_KMS          0x1030UL
382 #define SABRE_IMAP_FLPY         0x1038UL
383 #define SABRE_IMAP_SHW          0x1040UL
384 #define SABRE_IMAP_KBD          0x1048UL
385 #define SABRE_IMAP_MS           0x1050UL
386 #define SABRE_IMAP_SER          0x1058UL
387 #define SABRE_IMAP_UE           0x1070UL
388 #define SABRE_IMAP_CE           0x1078UL
389 #define SABRE_IMAP_PCIERR       0x1080UL
390 #define SABRE_IMAP_GFX          0x1098UL
391 #define SABRE_IMAP_EUPA         0x10a0UL
392 #define SABRE_ICLR_A_SLOT0      0x1400UL
393 #define SABRE_ICLR_B_SLOT0      0x1480UL
394 #define SABRE_ICLR_SCSI         0x1800UL
395 #define SABRE_ICLR_ETH          0x1808UL
396 #define SABRE_ICLR_BPP          0x1810UL
397 #define SABRE_ICLR_AU_REC       0x1818UL
398 #define SABRE_ICLR_AU_PLAY      0x1820UL
399 #define SABRE_ICLR_PFAIL        0x1828UL
400 #define SABRE_ICLR_KMS          0x1830UL
401 #define SABRE_ICLR_FLPY         0x1838UL
402 #define SABRE_ICLR_SHW          0x1840UL
403 #define SABRE_ICLR_KBD          0x1848UL
404 #define SABRE_ICLR_MS           0x1850UL
405 #define SABRE_ICLR_SER          0x1858UL
406 #define SABRE_ICLR_UE           0x1870UL
407 #define SABRE_ICLR_CE           0x1878UL
408 #define SABRE_ICLR_PCIERR       0x1880UL
409
410 static unsigned long sabre_pcislot_imap_offset(unsigned long ino)
411 {
412         unsigned int bus =  (ino & 0x10) >> 4;
413         unsigned int slot = (ino & 0x0c) >> 2;
414
415         if (bus == 0)
416                 return SABRE_IMAP_A_SLOT0 + (slot * 8);
417         else
418                 return SABRE_IMAP_B_SLOT0 + (slot * 8);
419 }
420
421 static unsigned long __sabre_onboard_imap_off[] = {
422 /*0x20*/        SABRE_IMAP_SCSI,
423 /*0x21*/        SABRE_IMAP_ETH,
424 /*0x22*/        SABRE_IMAP_BPP,
425 /*0x23*/        SABRE_IMAP_AU_REC,
426 /*0x24*/        SABRE_IMAP_AU_PLAY,
427 /*0x25*/        SABRE_IMAP_PFAIL,
428 /*0x26*/        SABRE_IMAP_KMS,
429 /*0x27*/        SABRE_IMAP_FLPY,
430 /*0x28*/        SABRE_IMAP_SHW,
431 /*0x29*/        SABRE_IMAP_KBD,
432 /*0x2a*/        SABRE_IMAP_MS,
433 /*0x2b*/        SABRE_IMAP_SER,
434 /*0x2c*/        0 /* reserved */,
435 /*0x2d*/        0 /* reserved */,
436 /*0x2e*/        SABRE_IMAP_UE,
437 /*0x2f*/        SABRE_IMAP_CE,
438 /*0x30*/        SABRE_IMAP_PCIERR,
439 /*0x31*/        0 /* reserved */,
440 /*0x32*/        0 /* reserved */,
441 /*0x33*/        SABRE_IMAP_GFX,
442 /*0x34*/        SABRE_IMAP_EUPA,
443 };
444 #define SABRE_ONBOARD_IRQ_BASE          0x20
445 #define SABRE_ONBOARD_IRQ_LAST          0x30
446 #define sabre_onboard_imap_offset(__ino) \
447         __sabre_onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
448
449 #define sabre_iclr_offset(ino)                                        \
450         ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
451                         (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
452
453 static int sabre_device_needs_wsync(struct device_node *dp)
454 {
455         struct device_node *parent = dp->parent;
456         const char *parent_model, *parent_compat;
457
458         /* This traversal up towards the root is meant to
459          * handle two cases:
460          *
461          * 1) non-PCI bus sitting under PCI, such as 'ebus'
462          * 2) the PCI controller interrupts themselves, which
463          *    will use the sabre_irq_build but do not need
464          *    the DMA synchronization handling
465          */
466         while (parent) {
467                 if (!strcmp(parent->type, "pci"))
468                         break;
469                 parent = parent->parent;
470         }
471
472         if (!parent)
473                 return 0;
474
475         parent_model = of_get_property(parent,
476                                        "model", NULL);
477         if (parent_model &&
478             (!strcmp(parent_model, "SUNW,sabre") ||
479              !strcmp(parent_model, "SUNW,simba")))
480                 return 0;
481
482         parent_compat = of_get_property(parent,
483                                         "compatible", NULL);
484         if (parent_compat &&
485             (!strcmp(parent_compat, "pci108e,a000") ||
486              !strcmp(parent_compat, "pci108e,a001")))
487                 return 0;
488
489         return 1;
490 }
491
492 static unsigned int sabre_irq_build(struct device_node *dp,
493                                     unsigned int ino,
494                                     void *_data)
495 {
496         struct sabre_irq_data *irq_data = _data;
497         unsigned long controller_regs = irq_data->controller_regs;
498         const struct linux_prom_pci_registers *regs;
499         unsigned long imap, iclr;
500         unsigned long imap_off, iclr_off;
501         int inofixup = 0;
502         int virt_irq;
503
504         ino &= 0x3f;
505         if (ino < SABRE_ONBOARD_IRQ_BASE) {
506                 /* PCI slot */
507                 imap_off = sabre_pcislot_imap_offset(ino);
508         } else {
509                 /* onboard device */
510                 if (ino > SABRE_ONBOARD_IRQ_LAST) {
511                         prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino);
512                         prom_halt();
513                 }
514                 imap_off = sabre_onboard_imap_offset(ino);
515         }
516
517         /* Now build the IRQ bucket. */
518         imap = controller_regs + imap_off;
519
520         iclr_off = sabre_iclr_offset(ino);
521         iclr = controller_regs + iclr_off;
522
523         if ((ino & 0x20) == 0)
524                 inofixup = ino & 0x03;
525
526         virt_irq = build_irq(inofixup, iclr, imap);
527
528         /* If the parent device is a PCI<->PCI bridge other than
529          * APB, we have to install a pre-handler to ensure that
530          * all pending DMA is drained before the interrupt handler
531          * is run.
532          */
533         regs = of_get_property(dp, "reg", NULL);
534         if (regs && sabre_device_needs_wsync(dp)) {
535                 irq_install_pre_handler(virt_irq,
536                                         sabre_wsync_handler,
537                                         (void *) (long) regs->phys_hi,
538                                         (void *) irq_data);
539         }
540
541         return virt_irq;
542 }
543
544 static void __init sabre_irq_trans_init(struct device_node *dp)
545 {
546         const struct linux_prom64_registers *regs;
547         struct sabre_irq_data *irq_data;
548         const u32 *busrange;
549
550         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
551         dp->irq_trans->irq_build = sabre_irq_build;
552
553         irq_data = prom_early_alloc(sizeof(struct sabre_irq_data));
554
555         regs = of_get_property(dp, "reg", NULL);
556         irq_data->controller_regs = regs[0].phys_addr;
557
558         busrange = of_get_property(dp, "bus-range", NULL);
559         irq_data->pci_first_busno = busrange[0];
560
561         dp->irq_trans->data = irq_data;
562 }
563
564 /* SCHIZO interrupt mapping support.  Unlike Psycho, for this controller the
565  * imap/iclr registers are per-PBM.
566  */
567 #define SCHIZO_IMAP_BASE        0x1000UL
568 #define SCHIZO_ICLR_BASE        0x1400UL
569
570 static unsigned long schizo_imap_offset(unsigned long ino)
571 {
572         return SCHIZO_IMAP_BASE + (ino * 8UL);
573 }
574
575 static unsigned long schizo_iclr_offset(unsigned long ino)
576 {
577         return SCHIZO_ICLR_BASE + (ino * 8UL);
578 }
579
580 static unsigned long schizo_ino_to_iclr(unsigned long pbm_regs,
581                                         unsigned int ino)
582 {
583
584         return pbm_regs + schizo_iclr_offset(ino);
585 }
586
587 static unsigned long schizo_ino_to_imap(unsigned long pbm_regs,
588                                         unsigned int ino)
589 {
590         return pbm_regs + schizo_imap_offset(ino);
591 }
592
593 #define schizo_read(__reg) \
594 ({      u64 __ret; \
595         __asm__ __volatile__("ldxa [%1] %2, %0" \
596                              : "=r" (__ret) \
597                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
598                              : "memory"); \
599         __ret; \
600 })
601 #define schizo_write(__reg, __val) \
602         __asm__ __volatile__("stxa %0, [%1] %2" \
603                              : /* no outputs */ \
604                              : "r" (__val), "r" (__reg), \
605                                "i" (ASI_PHYS_BYPASS_EC_E) \
606                              : "memory")
607
608 static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
609 {
610         unsigned long sync_reg = (unsigned long) _arg2;
611         u64 mask = 1UL << (ino & IMAP_INO);
612         u64 val;
613         int limit;
614
615         schizo_write(sync_reg, mask);
616
617         limit = 100000;
618         val = 0;
619         while (--limit) {
620                 val = schizo_read(sync_reg);
621                 if (!(val & mask))
622                         break;
623         }
624         if (limit <= 0) {
625                 printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",
626                        val, mask);
627         }
628
629         if (_arg1) {
630                 static unsigned char cacheline[64]
631                         __attribute__ ((aligned (64)));
632
633                 __asm__ __volatile__("rd %%fprs, %0\n\t"
634                                      "or %0, %4, %1\n\t"
635                                      "wr %1, 0x0, %%fprs\n\t"
636                                      "stda %%f0, [%5] %6\n\t"
637                                      "wr %0, 0x0, %%fprs\n\t"
638                                      "membar #Sync"
639                                      : "=&r" (mask), "=&r" (val)
640                                      : "0" (mask), "1" (val),
641                                      "i" (FPRS_FEF), "r" (&cacheline[0]),
642                                      "i" (ASI_BLK_COMMIT_P));
643         }
644 }
645
646 struct schizo_irq_data {
647         unsigned long pbm_regs;
648         unsigned long sync_reg;
649         u32 portid;
650         int chip_version;
651 };
652
653 static unsigned int schizo_irq_build(struct device_node *dp,
654                                      unsigned int ino,
655                                      void *_data)
656 {
657         struct schizo_irq_data *irq_data = _data;
658         unsigned long pbm_regs = irq_data->pbm_regs;
659         unsigned long imap, iclr;
660         int ign_fixup;
661         int virt_irq;
662         int is_tomatillo;
663
664         ino &= 0x3f;
665
666         /* Now build the IRQ bucket. */
667         imap = schizo_ino_to_imap(pbm_regs, ino);
668         iclr = schizo_ino_to_iclr(pbm_regs, ino);
669
670         /* On Schizo, no inofixup occurs.  This is because each
671          * INO has it's own IMAP register.  On Psycho and Sabre
672          * there is only one IMAP register for each PCI slot even
673          * though four different INOs can be generated by each
674          * PCI slot.
675          *
676          * But, for JBUS variants (essentially, Tomatillo), we have
677          * to fixup the lowest bit of the interrupt group number.
678          */
679         ign_fixup = 0;
680
681         is_tomatillo = (irq_data->sync_reg != 0UL);
682
683         if (is_tomatillo) {
684                 if (irq_data->portid & 1)
685                         ign_fixup = (1 << 6);
686         }
687
688         virt_irq = build_irq(ign_fixup, iclr, imap);
689
690         if (is_tomatillo) {
691                 irq_install_pre_handler(virt_irq,
692                                         tomatillo_wsync_handler,
693                                         ((irq_data->chip_version <= 4) ?
694                                          (void *) 1 : (void *) 0),
695                                         (void *) irq_data->sync_reg);
696         }
697
698         return virt_irq;
699 }
700
701 static void __init __schizo_irq_trans_init(struct device_node *dp,
702                                            int is_tomatillo)
703 {
704         const struct linux_prom64_registers *regs;
705         struct schizo_irq_data *irq_data;
706
707         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
708         dp->irq_trans->irq_build = schizo_irq_build;
709
710         irq_data = prom_early_alloc(sizeof(struct schizo_irq_data));
711
712         regs = of_get_property(dp, "reg", NULL);
713         dp->irq_trans->data = irq_data;
714
715         irq_data->pbm_regs = regs[0].phys_addr;
716         if (is_tomatillo)
717                 irq_data->sync_reg = regs[3].phys_addr + 0x1a18UL;
718         else
719                 irq_data->sync_reg = 0UL;
720         irq_data->portid = of_getintprop_default(dp, "portid", 0);
721         irq_data->chip_version = of_getintprop_default(dp, "version#", 0);
722 }
723
724 static void __init schizo_irq_trans_init(struct device_node *dp)
725 {
726         __schizo_irq_trans_init(dp, 0);
727 }
728
729 static void __init tomatillo_irq_trans_init(struct device_node *dp)
730 {
731         __schizo_irq_trans_init(dp, 1);
732 }
733
734 static unsigned int pci_sun4v_irq_build(struct device_node *dp,
735                                         unsigned int devino,
736                                         void *_data)
737 {
738         u32 devhandle = (u32) (unsigned long) _data;
739
740         return sun4v_build_irq(devhandle, devino);
741 }
742
743 static void __init pci_sun4v_irq_trans_init(struct device_node *dp)
744 {
745         const struct linux_prom64_registers *regs;
746
747         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
748         dp->irq_trans->irq_build = pci_sun4v_irq_build;
749
750         regs = of_get_property(dp, "reg", NULL);
751         dp->irq_trans->data = (void *) (unsigned long)
752                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
753 }
754
755 struct fire_irq_data {
756         unsigned long pbm_regs;
757         u32 portid;
758 };
759
760 #define FIRE_IMAP_BASE  0x001000
761 #define FIRE_ICLR_BASE  0x001400
762
763 static unsigned long fire_imap_offset(unsigned long ino)
764 {
765         return FIRE_IMAP_BASE + (ino * 8UL);
766 }
767
768 static unsigned long fire_iclr_offset(unsigned long ino)
769 {
770         return FIRE_ICLR_BASE + (ino * 8UL);
771 }
772
773 static unsigned long fire_ino_to_iclr(unsigned long pbm_regs,
774                                             unsigned int ino)
775 {
776         return pbm_regs + fire_iclr_offset(ino);
777 }
778
779 static unsigned long fire_ino_to_imap(unsigned long pbm_regs,
780                                             unsigned int ino)
781 {
782         return pbm_regs + fire_imap_offset(ino);
783 }
784
785 static unsigned int fire_irq_build(struct device_node *dp,
786                                          unsigned int ino,
787                                          void *_data)
788 {
789         struct fire_irq_data *irq_data = _data;
790         unsigned long pbm_regs = irq_data->pbm_regs;
791         unsigned long imap, iclr;
792         unsigned long int_ctrlr;
793
794         ino &= 0x3f;
795
796         /* Now build the IRQ bucket. */
797         imap = fire_ino_to_imap(pbm_regs, ino);
798         iclr = fire_ino_to_iclr(pbm_regs, ino);
799
800         /* Set the interrupt controller number.  */
801         int_ctrlr = 1 << 6;
802         upa_writeq(int_ctrlr, imap);
803
804         /* The interrupt map registers do not have an INO field
805          * like other chips do.  They return zero in the INO
806          * field, and the interrupt controller number is controlled
807          * in bits 6 to 9.  So in order for build_irq() to get
808          * the INO right we pass it in as part of the fixup
809          * which will get added to the map register zero value
810          * read by build_irq().
811          */
812         ino |= (irq_data->portid << 6);
813         ino -= int_ctrlr;
814         return build_irq(ino, iclr, imap);
815 }
816
817 static void __init fire_irq_trans_init(struct device_node *dp)
818 {
819         const struct linux_prom64_registers *regs;
820         struct fire_irq_data *irq_data;
821
822         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
823         dp->irq_trans->irq_build = fire_irq_build;
824
825         irq_data = prom_early_alloc(sizeof(struct fire_irq_data));
826
827         regs = of_get_property(dp, "reg", NULL);
828         dp->irq_trans->data = irq_data;
829
830         irq_data->pbm_regs = regs[0].phys_addr;
831         irq_data->portid = of_getintprop_default(dp, "portid", 0);
832 }
833 #endif /* CONFIG_PCI */
834
835 #ifdef CONFIG_SBUS
836 /* INO number to IMAP register offset for SYSIO external IRQ's.
837  * This should conform to both Sunfire/Wildfire server and Fusion
838  * desktop designs.
839  */
840 #define SYSIO_IMAP_SLOT0        0x2c00UL
841 #define SYSIO_IMAP_SLOT1        0x2c08UL
842 #define SYSIO_IMAP_SLOT2        0x2c10UL
843 #define SYSIO_IMAP_SLOT3        0x2c18UL
844 #define SYSIO_IMAP_SCSI         0x3000UL
845 #define SYSIO_IMAP_ETH          0x3008UL
846 #define SYSIO_IMAP_BPP          0x3010UL
847 #define SYSIO_IMAP_AUDIO        0x3018UL
848 #define SYSIO_IMAP_PFAIL        0x3020UL
849 #define SYSIO_IMAP_KMS          0x3028UL
850 #define SYSIO_IMAP_FLPY         0x3030UL
851 #define SYSIO_IMAP_SHW          0x3038UL
852 #define SYSIO_IMAP_KBD          0x3040UL
853 #define SYSIO_IMAP_MS           0x3048UL
854 #define SYSIO_IMAP_SER          0x3050UL
855 #define SYSIO_IMAP_TIM0         0x3060UL
856 #define SYSIO_IMAP_TIM1         0x3068UL
857 #define SYSIO_IMAP_UE           0x3070UL
858 #define SYSIO_IMAP_CE           0x3078UL
859 #define SYSIO_IMAP_SBERR        0x3080UL
860 #define SYSIO_IMAP_PMGMT        0x3088UL
861 #define SYSIO_IMAP_GFX          0x3090UL
862 #define SYSIO_IMAP_EUPA         0x3098UL
863
864 #define bogon     ((unsigned long) -1)
865 static unsigned long sysio_irq_offsets[] = {
866         /* SBUS Slot 0 --> 3, level 1 --> 7 */
867         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
868         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
869         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
870         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
871         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
872         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
873         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
874         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
875
876         /* Onboard devices (not relevant/used on SunFire). */
877         SYSIO_IMAP_SCSI,
878         SYSIO_IMAP_ETH,
879         SYSIO_IMAP_BPP,
880         bogon,
881         SYSIO_IMAP_AUDIO,
882         SYSIO_IMAP_PFAIL,
883         bogon,
884         bogon,
885         SYSIO_IMAP_KMS,
886         SYSIO_IMAP_FLPY,
887         SYSIO_IMAP_SHW,
888         SYSIO_IMAP_KBD,
889         SYSIO_IMAP_MS,
890         SYSIO_IMAP_SER,
891         bogon,
892         bogon,
893         SYSIO_IMAP_TIM0,
894         SYSIO_IMAP_TIM1,
895         bogon,
896         bogon,
897         SYSIO_IMAP_UE,
898         SYSIO_IMAP_CE,
899         SYSIO_IMAP_SBERR,
900         SYSIO_IMAP_PMGMT,
901         SYSIO_IMAP_GFX,
902         SYSIO_IMAP_EUPA,
903 };
904
905 #undef bogon
906
907 #define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets)
908
909 /* Convert Interrupt Mapping register pointer to associated
910  * Interrupt Clear register pointer, SYSIO specific version.
911  */
912 #define SYSIO_ICLR_UNUSED0      0x3400UL
913 #define SYSIO_ICLR_SLOT0        0x3408UL
914 #define SYSIO_ICLR_SLOT1        0x3448UL
915 #define SYSIO_ICLR_SLOT2        0x3488UL
916 #define SYSIO_ICLR_SLOT3        0x34c8UL
917 static unsigned long sysio_imap_to_iclr(unsigned long imap)
918 {
919         unsigned long diff = SYSIO_ICLR_UNUSED0 - SYSIO_IMAP_SLOT0;
920         return imap + diff;
921 }
922
923 static unsigned int sbus_of_build_irq(struct device_node *dp,
924                                       unsigned int ino,
925                                       void *_data)
926 {
927         unsigned long reg_base = (unsigned long) _data;
928         const struct linux_prom_registers *regs;
929         unsigned long imap, iclr;
930         int sbus_slot = 0;
931         int sbus_level = 0;
932
933         ino &= 0x3f;
934
935         regs = of_get_property(dp, "reg", NULL);
936         if (regs)
937                 sbus_slot = regs->which_io;
938
939         if (ino < 0x20)
940                 ino += (sbus_slot * 8);
941
942         imap = sysio_irq_offsets[ino];
943         if (imap == ((unsigned long)-1)) {
944                 prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n",
945                             ino);
946                 prom_halt();
947         }
948         imap += reg_base;
949
950         /* SYSIO inconsistency.  For external SLOTS, we have to select
951          * the right ICLR register based upon the lower SBUS irq level
952          * bits.
953          */
954         if (ino >= 0x20) {
955                 iclr = sysio_imap_to_iclr(imap);
956         } else {
957                 sbus_level = ino & 0x7;
958
959                 switch(sbus_slot) {
960                 case 0:
961                         iclr = reg_base + SYSIO_ICLR_SLOT0;
962                         break;
963                 case 1:
964                         iclr = reg_base + SYSIO_ICLR_SLOT1;
965                         break;
966                 case 2:
967                         iclr = reg_base + SYSIO_ICLR_SLOT2;
968                         break;
969                 default:
970                 case 3:
971                         iclr = reg_base + SYSIO_ICLR_SLOT3;
972                         break;
973                 };
974
975                 iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
976         }
977         return build_irq(sbus_level, iclr, imap);
978 }
979
980 static void __init sbus_irq_trans_init(struct device_node *dp)
981 {
982         const struct linux_prom64_registers *regs;
983
984         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
985         dp->irq_trans->irq_build = sbus_of_build_irq;
986
987         regs = of_get_property(dp, "reg", NULL);
988         dp->irq_trans->data = (void *) (unsigned long) regs->phys_addr;
989 }
990 #endif /* CONFIG_SBUS */
991
992
993 static unsigned int central_build_irq(struct device_node *dp,
994                                       unsigned int ino,
995                                       void *_data)
996 {
997         struct device_node *central_dp = _data;
998         struct of_device *central_op = of_find_device_by_node(central_dp);
999         struct resource *res;
1000         unsigned long imap, iclr;
1001         u32 tmp;
1002
1003         if (!strcmp(dp->name, "eeprom")) {
1004                 res = &central_op->resource[5];
1005         } else if (!strcmp(dp->name, "zs")) {
1006                 res = &central_op->resource[4];
1007         } else if (!strcmp(dp->name, "clock-board")) {
1008                 res = &central_op->resource[3];
1009         } else {
1010                 return ino;
1011         }
1012
1013         imap = res->start + 0x00UL;
1014         iclr = res->start + 0x10UL;
1015
1016         /* Set the INO state to idle, and disable.  */
1017         upa_writel(0, iclr);
1018         upa_readl(iclr);
1019
1020         tmp = upa_readl(imap);
1021         tmp &= ~0x80000000;
1022         upa_writel(tmp, imap);
1023
1024         return build_irq(0, iclr, imap);
1025 }
1026
1027 static void __init central_irq_trans_init(struct device_node *dp)
1028 {
1029         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1030         dp->irq_trans->irq_build = central_build_irq;
1031
1032         dp->irq_trans->data = dp;
1033 }
1034
1035 struct irq_trans {
1036         const char *name;
1037         void (*init)(struct device_node *);
1038 };
1039
1040 #ifdef CONFIG_PCI
1041 static struct irq_trans __initdata pci_irq_trans_table[] = {
1042         { "SUNW,sabre", sabre_irq_trans_init },
1043         { "pci108e,a000", sabre_irq_trans_init },
1044         { "pci108e,a001", sabre_irq_trans_init },
1045         { "SUNW,psycho", psycho_irq_trans_init },
1046         { "pci108e,8000", psycho_irq_trans_init },
1047         { "SUNW,schizo", schizo_irq_trans_init },
1048         { "pci108e,8001", schizo_irq_trans_init },
1049         { "SUNW,schizo+", schizo_irq_trans_init },
1050         { "pci108e,8002", schizo_irq_trans_init },
1051         { "SUNW,tomatillo", tomatillo_irq_trans_init },
1052         { "pci108e,a801", tomatillo_irq_trans_init },
1053         { "SUNW,sun4v-pci", pci_sun4v_irq_trans_init },
1054         { "pciex108e,80f0", fire_irq_trans_init },
1055 };
1056 #endif
1057
1058 static unsigned int sun4v_vdev_irq_build(struct device_node *dp,
1059                                          unsigned int devino,
1060                                          void *_data)
1061 {
1062         u32 devhandle = (u32) (unsigned long) _data;
1063
1064         return sun4v_build_irq(devhandle, devino);
1065 }
1066
1067 static void __init sun4v_vdev_irq_trans_init(struct device_node *dp)
1068 {
1069         const struct linux_prom64_registers *regs;
1070
1071         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1072         dp->irq_trans->irq_build = sun4v_vdev_irq_build;
1073
1074         regs = of_get_property(dp, "reg", NULL);
1075         dp->irq_trans->data = (void *) (unsigned long)
1076                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
1077 }
1078
1079 static void __init irq_trans_init(struct device_node *dp)
1080 {
1081 #ifdef CONFIG_PCI
1082         const char *model;
1083         int i;
1084 #endif
1085
1086 #ifdef CONFIG_PCI
1087         model = of_get_property(dp, "model", NULL);
1088         if (!model)
1089                 model = of_get_property(dp, "compatible", NULL);
1090         if (model) {
1091                 for (i = 0; i < ARRAY_SIZE(pci_irq_trans_table); i++) {
1092                         struct irq_trans *t = &pci_irq_trans_table[i];
1093
1094                         if (!strcmp(model, t->name))
1095                                 return t->init(dp);
1096                 }
1097         }
1098 #endif
1099 #ifdef CONFIG_SBUS
1100         if (!strcmp(dp->name, "sbus") ||
1101             !strcmp(dp->name, "sbi"))
1102                 return sbus_irq_trans_init(dp);
1103 #endif
1104         if (!strcmp(dp->name, "fhc") &&
1105             !strcmp(dp->parent->name, "central"))
1106                 return central_irq_trans_init(dp);
1107         if (!strcmp(dp->name, "virtual-devices"))
1108                 return sun4v_vdev_irq_trans_init(dp);
1109 }
1110
1111 static int is_root_node(const struct device_node *dp)
1112 {
1113         if (!dp)
1114                 return 0;
1115
1116         return (dp->parent == NULL);
1117 }
1118
1119 /* The following routines deal with the black magic of fully naming a
1120  * node.
1121  *
1122  * Certain well known named nodes are just the simple name string.
1123  *
1124  * Actual devices have an address specifier appended to the base name
1125  * string, like this "foo@addr".  The "addr" can be in any number of
1126  * formats, and the platform plus the type of the node determine the
1127  * format and how it is constructed.
1128  *
1129  * For children of the ROOT node, the naming convention is fixed and
1130  * determined by whether this is a sun4u or sun4v system.
1131  *
1132  * For children of other nodes, it is bus type specific.  So
1133  * we walk up the tree until we discover a "device_type" property
1134  * we recognize and we go from there.
1135  *
1136  * As an example, the boot device on my workstation has a full path:
1137  *
1138  *      /pci@1e,600000/ide@d/disk@0,0:c
1139  */
1140 static void __init sun4v_path_component(struct device_node *dp, char *tmp_buf)
1141 {
1142         struct linux_prom64_registers *regs;
1143         struct property *rprop;
1144         u32 high_bits, low_bits, type;
1145
1146         rprop = of_find_property(dp, "reg", NULL);
1147         if (!rprop)
1148                 return;
1149
1150         regs = rprop->value;
1151         if (!is_root_node(dp->parent)) {
1152                 sprintf(tmp_buf, "%s@%x,%x",
1153                         dp->name,
1154                         (unsigned int) (regs->phys_addr >> 32UL),
1155                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1156                 return;
1157         }
1158
1159         type = regs->phys_addr >> 60UL;
1160         high_bits = (regs->phys_addr >> 32UL) & 0x0fffffffUL;
1161         low_bits = (regs->phys_addr & 0xffffffffUL);
1162
1163         if (type == 0 || type == 8) {
1164                 const char *prefix = (type == 0) ? "m" : "i";
1165
1166                 if (low_bits)
1167                         sprintf(tmp_buf, "%s@%s%x,%x",
1168                                 dp->name, prefix,
1169                                 high_bits, low_bits);
1170                 else
1171                         sprintf(tmp_buf, "%s@%s%x",
1172                                 dp->name,
1173                                 prefix,
1174                                 high_bits);
1175         } else if (type == 12) {
1176                 sprintf(tmp_buf, "%s@%x",
1177                         dp->name, high_bits);
1178         }
1179 }
1180
1181 static void __init sun4u_path_component(struct device_node *dp, char *tmp_buf)
1182 {
1183         struct linux_prom64_registers *regs;
1184         struct property *prop;
1185
1186         prop = of_find_property(dp, "reg", NULL);
1187         if (!prop)
1188                 return;
1189
1190         regs = prop->value;
1191         if (!is_root_node(dp->parent)) {
1192                 sprintf(tmp_buf, "%s@%x,%x",
1193                         dp->name,
1194                         (unsigned int) (regs->phys_addr >> 32UL),
1195                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1196                 return;
1197         }
1198
1199         prop = of_find_property(dp, "upa-portid", NULL);
1200         if (!prop)
1201                 prop = of_find_property(dp, "portid", NULL);
1202         if (prop) {
1203                 unsigned long mask = 0xffffffffUL;
1204
1205                 if (tlb_type >= cheetah)
1206                         mask = 0x7fffff;
1207
1208                 sprintf(tmp_buf, "%s@%x,%x",
1209                         dp->name,
1210                         *(u32 *)prop->value,
1211                         (unsigned int) (regs->phys_addr & mask));
1212         }
1213 }
1214
1215 /* "name@slot,offset"  */
1216 static void __init sbus_path_component(struct device_node *dp, char *tmp_buf)
1217 {
1218         struct linux_prom_registers *regs;
1219         struct property *prop;
1220
1221         prop = of_find_property(dp, "reg", NULL);
1222         if (!prop)
1223                 return;
1224
1225         regs = prop->value;
1226         sprintf(tmp_buf, "%s@%x,%x",
1227                 dp->name,
1228                 regs->which_io,
1229                 regs->phys_addr);
1230 }
1231
1232 /* "name@devnum[,func]" */
1233 static void __init pci_path_component(struct device_node *dp, char *tmp_buf)
1234 {
1235         struct linux_prom_pci_registers *regs;
1236         struct property *prop;
1237         unsigned int devfn;
1238
1239         prop = of_find_property(dp, "reg", NULL);
1240         if (!prop)
1241                 return;
1242
1243         regs = prop->value;
1244         devfn = (regs->phys_hi >> 8) & 0xff;
1245         if (devfn & 0x07) {
1246                 sprintf(tmp_buf, "%s@%x,%x",
1247                         dp->name,
1248                         devfn >> 3,
1249                         devfn & 0x07);
1250         } else {
1251                 sprintf(tmp_buf, "%s@%x",
1252                         dp->name,
1253                         devfn >> 3);
1254         }
1255 }
1256
1257 /* "name@UPA_PORTID,offset" */
1258 static void __init upa_path_component(struct device_node *dp, char *tmp_buf)
1259 {
1260         struct linux_prom64_registers *regs;
1261         struct property *prop;
1262
1263         prop = of_find_property(dp, "reg", NULL);
1264         if (!prop)
1265                 return;
1266
1267         regs = prop->value;
1268
1269         prop = of_find_property(dp, "upa-portid", NULL);
1270         if (!prop)
1271                 return;
1272
1273         sprintf(tmp_buf, "%s@%x,%x",
1274                 dp->name,
1275                 *(u32 *) prop->value,
1276                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1277 }
1278
1279 /* "name@reg" */
1280 static void __init vdev_path_component(struct device_node *dp, char *tmp_buf)
1281 {
1282         struct property *prop;
1283         u32 *regs;
1284
1285         prop = of_find_property(dp, "reg", NULL);
1286         if (!prop)
1287                 return;
1288
1289         regs = prop->value;
1290
1291         sprintf(tmp_buf, "%s@%x", dp->name, *regs);
1292 }
1293
1294 /* "name@addrhi,addrlo" */
1295 static void __init ebus_path_component(struct device_node *dp, char *tmp_buf)
1296 {
1297         struct linux_prom64_registers *regs;
1298         struct property *prop;
1299
1300         prop = of_find_property(dp, "reg", NULL);
1301         if (!prop)
1302                 return;
1303
1304         regs = prop->value;
1305
1306         sprintf(tmp_buf, "%s@%x,%x",
1307                 dp->name,
1308                 (unsigned int) (regs->phys_addr >> 32UL),
1309                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1310 }
1311
1312 /* "name@bus,addr" */
1313 static void __init i2c_path_component(struct device_node *dp, char *tmp_buf)
1314 {
1315         struct property *prop;
1316         u32 *regs;
1317
1318         prop = of_find_property(dp, "reg", NULL);
1319         if (!prop)
1320                 return;
1321
1322         regs = prop->value;
1323
1324         /* This actually isn't right... should look at the #address-cells
1325          * property of the i2c bus node etc. etc.
1326          */
1327         sprintf(tmp_buf, "%s@%x,%x",
1328                 dp->name, regs[0], regs[1]);
1329 }
1330
1331 /* "name@reg0[,reg1]" */
1332 static void __init usb_path_component(struct device_node *dp, char *tmp_buf)
1333 {
1334         struct property *prop;
1335         u32 *regs;
1336
1337         prop = of_find_property(dp, "reg", NULL);
1338         if (!prop)
1339                 return;
1340
1341         regs = prop->value;
1342
1343         if (prop->length == sizeof(u32) || regs[1] == 1) {
1344                 sprintf(tmp_buf, "%s@%x",
1345                         dp->name, regs[0]);
1346         } else {
1347                 sprintf(tmp_buf, "%s@%x,%x",
1348                         dp->name, regs[0], regs[1]);
1349         }
1350 }
1351
1352 /* "name@reg0reg1[,reg2reg3]" */
1353 static void __init ieee1394_path_component(struct device_node *dp, char *tmp_buf)
1354 {
1355         struct property *prop;
1356         u32 *regs;
1357
1358         prop = of_find_property(dp, "reg", NULL);
1359         if (!prop)
1360                 return;
1361
1362         regs = prop->value;
1363
1364         if (regs[2] || regs[3]) {
1365                 sprintf(tmp_buf, "%s@%08x%08x,%04x%08x",
1366                         dp->name, regs[0], regs[1], regs[2], regs[3]);
1367         } else {
1368                 sprintf(tmp_buf, "%s@%08x%08x",
1369                         dp->name, regs[0], regs[1]);
1370         }
1371 }
1372
1373 static void __init __build_path_component(struct device_node *dp, char *tmp_buf)
1374 {
1375         struct device_node *parent = dp->parent;
1376
1377         if (parent != NULL) {
1378                 if (!strcmp(parent->type, "pci") ||
1379                     !strcmp(parent->type, "pciex"))
1380                         return pci_path_component(dp, tmp_buf);
1381                 if (!strcmp(parent->type, "sbus"))
1382                         return sbus_path_component(dp, tmp_buf);
1383                 if (!strcmp(parent->type, "upa"))
1384                         return upa_path_component(dp, tmp_buf);
1385                 if (!strcmp(parent->type, "ebus"))
1386                         return ebus_path_component(dp, tmp_buf);
1387                 if (!strcmp(parent->name, "usb") ||
1388                     !strcmp(parent->name, "hub"))
1389                         return usb_path_component(dp, tmp_buf);
1390                 if (!strcmp(parent->type, "i2c"))
1391                         return i2c_path_component(dp, tmp_buf);
1392                 if (!strcmp(parent->type, "firewire"))
1393                         return ieee1394_path_component(dp, tmp_buf);
1394                 if (!strcmp(parent->type, "virtual-devices"))
1395                         return vdev_path_component(dp, tmp_buf);
1396
1397                 /* "isa" is handled with platform naming */
1398         }
1399
1400         /* Use platform naming convention.  */
1401         if (tlb_type == hypervisor)
1402                 return sun4v_path_component(dp, tmp_buf);
1403         else
1404                 return sun4u_path_component(dp, tmp_buf);
1405 }
1406
1407 static char * __init build_path_component(struct device_node *dp)
1408 {
1409         char tmp_buf[64], *n;
1410
1411         tmp_buf[0] = '\0';
1412         __build_path_component(dp, tmp_buf);
1413         if (tmp_buf[0] == '\0')
1414                 strcpy(tmp_buf, dp->name);
1415
1416         n = prom_early_alloc(strlen(tmp_buf) + 1);
1417         strcpy(n, tmp_buf);
1418
1419         return n;
1420 }
1421
1422 static char * __init build_full_name(struct device_node *dp)
1423 {
1424         int len, ourlen, plen;
1425         char *n;
1426
1427         plen = strlen(dp->parent->full_name);
1428         ourlen = strlen(dp->path_component_name);
1429         len = ourlen + plen + 2;
1430
1431         n = prom_early_alloc(len);
1432         strcpy(n, dp->parent->full_name);
1433         if (!is_root_node(dp->parent)) {
1434                 strcpy(n + plen, "/");
1435                 plen++;
1436         }
1437         strcpy(n + plen, dp->path_component_name);
1438
1439         return n;
1440 }
1441
1442 static unsigned int unique_id;
1443
1444 static struct property * __init build_one_prop(phandle node, char *prev, char *special_name, void *special_val, int special_len)
1445 {
1446         static struct property *tmp = NULL;
1447         struct property *p;
1448
1449         if (tmp) {
1450                 p = tmp;
1451                 memset(p, 0, sizeof(*p) + 32);
1452                 tmp = NULL;
1453         } else {
1454                 p = prom_early_alloc(sizeof(struct property) + 32);
1455                 p->unique_id = unique_id++;
1456         }
1457
1458         p->name = (char *) (p + 1);
1459         if (special_name) {
1460                 strcpy(p->name, special_name);
1461                 p->length = special_len;
1462                 p->value = prom_early_alloc(special_len);
1463                 memcpy(p->value, special_val, special_len);
1464         } else {
1465                 if (prev == NULL) {
1466                         prom_firstprop(node, p->name);
1467                 } else {
1468                         prom_nextprop(node, prev, p->name);
1469                 }
1470                 if (strlen(p->name) == 0) {
1471                         tmp = p;
1472                         return NULL;
1473                 }
1474                 p->length = prom_getproplen(node, p->name);
1475                 if (p->length <= 0) {
1476                         p->length = 0;
1477                 } else {
1478                         p->value = prom_early_alloc(p->length + 1);
1479                         prom_getproperty(node, p->name, p->value, p->length);
1480                         ((unsigned char *)p->value)[p->length] = '\0';
1481                 }
1482         }
1483         return p;
1484 }
1485
1486 static struct property * __init build_prop_list(phandle node)
1487 {
1488         struct property *head, *tail;
1489
1490         head = tail = build_one_prop(node, NULL,
1491                                      ".node", &node, sizeof(node));
1492
1493         tail->next = build_one_prop(node, NULL, NULL, NULL, 0);
1494         tail = tail->next;
1495         while(tail) {
1496                 tail->next = build_one_prop(node, tail->name,
1497                                             NULL, NULL, 0);
1498                 tail = tail->next;
1499         }
1500
1501         return head;
1502 }
1503
1504 static char * __init get_one_property(phandle node, const char *name)
1505 {
1506         char *buf = "<NULL>";
1507         int len;
1508
1509         len = prom_getproplen(node, name);
1510         if (len > 0) {
1511                 buf = prom_early_alloc(len);
1512                 prom_getproperty(node, name, buf, len);
1513         }
1514
1515         return buf;
1516 }
1517
1518 static struct device_node * __init create_node(phandle node, struct device_node *parent)
1519 {
1520         struct device_node *dp;
1521
1522         if (!node)
1523                 return NULL;
1524
1525         dp = prom_early_alloc(sizeof(*dp));
1526         dp->unique_id = unique_id++;
1527         dp->parent = parent;
1528
1529         kref_init(&dp->kref);
1530
1531         dp->name = get_one_property(node, "name");
1532         dp->type = get_one_property(node, "device_type");
1533         dp->node = node;
1534
1535         dp->properties = build_prop_list(node);
1536
1537         irq_trans_init(dp);
1538
1539         return dp;
1540 }
1541
1542 static struct device_node * __init build_tree(struct device_node *parent, phandle node, struct device_node ***nextp)
1543 {
1544         struct device_node *ret = NULL, *prev_sibling = NULL;
1545         struct device_node *dp;
1546
1547         while (1) {
1548                 dp = create_node(node, parent);
1549                 if (!dp)
1550                         break;
1551
1552                 if (prev_sibling)
1553                         prev_sibling->sibling = dp;
1554
1555                 if (!ret)
1556                         ret = dp;
1557                 prev_sibling = dp;
1558
1559                 *(*nextp) = dp;
1560                 *nextp = &dp->allnext;
1561
1562                 dp->path_component_name = build_path_component(dp);
1563                 dp->full_name = build_full_name(dp);
1564
1565                 dp->child = build_tree(dp, prom_getchild(node), nextp);
1566
1567                 node = prom_getsibling(node);
1568         }
1569
1570         return ret;
1571 }
1572
1573 static const char *get_mid_prop(void)
1574 {
1575         return (tlb_type == spitfire ? "upa-portid" : "portid");
1576 }
1577
1578 struct device_node *of_find_node_by_cpuid(int cpuid)
1579 {
1580         struct device_node *dp;
1581         const char *mid_prop = get_mid_prop();
1582
1583         for_each_node_by_type(dp, "cpu") {
1584                 int id = of_getintprop_default(dp, mid_prop, -1);
1585                 const char *this_mid_prop = mid_prop;
1586
1587                 if (id < 0) {
1588                         this_mid_prop = "cpuid";
1589                         id = of_getintprop_default(dp, this_mid_prop, -1);
1590                 }
1591
1592                 if (id < 0) {
1593                         prom_printf("OF: Serious problem, cpu lacks "
1594                                     "%s property", this_mid_prop);
1595                         prom_halt();
1596                 }
1597                 if (cpuid == id)
1598                         return dp;
1599         }
1600         return NULL;
1601 }
1602
1603 static void __init of_fill_in_cpu_data(void)
1604 {
1605         struct device_node *dp;
1606         const char *mid_prop = get_mid_prop();
1607
1608         ncpus_probed = 0;
1609         for_each_node_by_type(dp, "cpu") {
1610                 int cpuid = of_getintprop_default(dp, mid_prop, -1);
1611                 const char *this_mid_prop = mid_prop;
1612                 struct device_node *portid_parent;
1613                 int portid = -1;
1614
1615                 portid_parent = NULL;
1616                 if (cpuid < 0) {
1617                         this_mid_prop = "cpuid";
1618                         cpuid = of_getintprop_default(dp, this_mid_prop, -1);
1619                         if (cpuid >= 0) {
1620                                 int limit = 2;
1621
1622                                 portid_parent = dp;
1623                                 while (limit--) {
1624                                         portid_parent = portid_parent->parent;
1625                                         if (!portid_parent)
1626                                                 break;
1627                                         portid = of_getintprop_default(portid_parent,
1628                                                                        "portid", -1);
1629                                         if (portid >= 0)
1630                                                 break;
1631                                 }
1632                         }
1633                 }
1634
1635                 if (cpuid < 0) {
1636                         prom_printf("OF: Serious problem, cpu lacks "
1637                                     "%s property", this_mid_prop);
1638                         prom_halt();
1639                 }
1640
1641                 ncpus_probed++;
1642
1643 #ifdef CONFIG_SMP
1644                 if (cpuid >= NR_CPUS)
1645                         continue;
1646 #else
1647                 /* On uniprocessor we only want the values for the
1648                  * real physical cpu the kernel booted onto, however
1649                  * cpu_data() only has one entry at index 0.
1650                  */
1651                 if (cpuid != real_hard_smp_processor_id())
1652                         continue;
1653                 cpuid = 0;
1654 #endif
1655
1656                 cpu_data(cpuid).clock_tick =
1657                         of_getintprop_default(dp, "clock-frequency", 0);
1658
1659                 if (portid_parent) {
1660                         cpu_data(cpuid).dcache_size =
1661                                 of_getintprop_default(dp, "l1-dcache-size",
1662                                                       16 * 1024);
1663                         cpu_data(cpuid).dcache_line_size =
1664                                 of_getintprop_default(dp, "l1-dcache-line-size",
1665                                                       32);
1666                         cpu_data(cpuid).icache_size =
1667                                 of_getintprop_default(dp, "l1-icache-size",
1668                                                       8 * 1024);
1669                         cpu_data(cpuid).icache_line_size =
1670                                 of_getintprop_default(dp, "l1-icache-line-size",
1671                                                       32);
1672                         cpu_data(cpuid).ecache_size =
1673                                 of_getintprop_default(dp, "l2-cache-size", 0);
1674                         cpu_data(cpuid).ecache_line_size =
1675                                 of_getintprop_default(dp, "l2-cache-line-size", 0);
1676                         if (!cpu_data(cpuid).ecache_size ||
1677                             !cpu_data(cpuid).ecache_line_size) {
1678                                 cpu_data(cpuid).ecache_size =
1679                                         of_getintprop_default(portid_parent,
1680                                                               "l2-cache-size",
1681                                                               (4 * 1024 * 1024));
1682                                 cpu_data(cpuid).ecache_line_size =
1683                                         of_getintprop_default(portid_parent,
1684                                                               "l2-cache-line-size", 64);
1685                         }
1686
1687                         cpu_data(cpuid).core_id = portid + 1;
1688                         cpu_data(cpuid).proc_id = portid;
1689 #ifdef CONFIG_SMP
1690                         sparc64_multi_core = 1;
1691 #endif
1692                 } else {
1693                         cpu_data(cpuid).dcache_size =
1694                                 of_getintprop_default(dp, "dcache-size", 16 * 1024);
1695                         cpu_data(cpuid).dcache_line_size =
1696                                 of_getintprop_default(dp, "dcache-line-size", 32);
1697
1698                         cpu_data(cpuid).icache_size =
1699                                 of_getintprop_default(dp, "icache-size", 16 * 1024);
1700                         cpu_data(cpuid).icache_line_size =
1701                                 of_getintprop_default(dp, "icache-line-size", 32);
1702
1703                         cpu_data(cpuid).ecache_size =
1704                                 of_getintprop_default(dp, "ecache-size",
1705                                                       (4 * 1024 * 1024));
1706                         cpu_data(cpuid).ecache_line_size =
1707                                 of_getintprop_default(dp, "ecache-line-size", 64);
1708
1709                         cpu_data(cpuid).core_id = 0;
1710                         cpu_data(cpuid).proc_id = -1;
1711                 }
1712
1713 #ifdef CONFIG_SMP
1714                 cpu_set(cpuid, cpu_present_map);
1715                 cpu_set(cpuid, cpu_possible_map);
1716 #endif
1717         }
1718
1719         smp_fill_in_sib_core_maps();
1720 }
1721
1722 void __init prom_build_devicetree(void)
1723 {
1724         struct device_node **nextp;
1725
1726         allnodes = create_node(prom_root_node, NULL);
1727         allnodes->path_component_name = "";
1728         allnodes->full_name = "/";
1729
1730         nextp = &allnodes->allnext;
1731         allnodes->child = build_tree(allnodes,
1732                                      prom_getchild(allnodes->node),
1733                                      &nextp);
1734         printk("PROM: Built device tree with %u bytes of memory.\n",
1735                prom_early_allocated);
1736
1737         if (tlb_type != hypervisor)
1738                 of_fill_in_cpu_data();
1739 }