arch/sparc64/kernel/prom.c

   1 /*
   2  * Procedures for creating, accessing and interpreting the device tree.
   3  *
   4  * Paul Mackerras       August 1996.
   5  * Copyright (C) 1996-2005 Paul Mackerras.
   6  *
   7  *  Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
   8  *    {engebret|bergner}@us.ibm.com
   9  *
  10  *  Adapted for sparc64 by David S. Miller davem@davemloft.net
  11  *
  12  *      This program is free software; you can redistribute it and/or
  13  *      modify it under the terms of the GNU General Public License
  14  *      as published by the Free Software Foundation; either version
  15  *      2 of the License, or (at your option) any later version.
  16  */
  17
  18 #include <linux/kernel.h>
  19 #include <linux/types.h>
  20 #include <linux/string.h>
  21 #include <linux/mm.h>
  22 #include <linux/bootmem.h>
  23 #include <linux/module.h>
  24
  25 #include <asm/prom.h>
  26 #include <asm/of_device.h>
  27 #include <asm/oplib.h>
  28 #include <asm/irq.h>
  29 #include <asm/asi.h>
  30 #include <asm/upa.h>
  31 #include <asm/smp.h>
  32
  33 static struct device_node *allnodes;
  34
  35 extern rwlock_t devtree_lock;   /* temporary while merging */
  36
  37 struct device_node *of_get_parent(const struct device_node *node)
  38 {
  39         struct device_node *np;
  40
  41         if (!node)
  42                 return NULL;
  43
  44         np = node->parent;
  45
  46         return np;
  47 }
  48 EXPORT_SYMBOL(of_get_parent);
  49
  50 struct device_node *of_get_next_child(const struct device_node *node,
  51         struct device_node *prev)
  52 {
  53         struct device_node *next;
  54
  55         next = prev ? prev->sibling : node->child;
  56         for (; next != 0; next = next->sibling) {
  57                 break;
  58         }
  59
  60         return next;
  61 }
  62 EXPORT_SYMBOL(of_get_next_child);
  63
  64 struct device_node *of_find_node_by_path(const char *path)
  65 {
  66         struct device_node *np = allnodes;
  67
  68         for (; np != 0; np = np->allnext) {
  69                 if (np->full_name != 0 && strcmp(np->full_name, path) == 0)
  70                         break;
  71         }
  72
  73         return np;
  74 }
  75 EXPORT_SYMBOL(of_find_node_by_path);
  76
  77 struct device_node *of_find_node_by_phandle(phandle handle)
  78 {
  79         struct device_node *np;
  80
  81         for (np = allnodes; np != 0; np = np->allnext)
  82                 if (np->node == handle)
  83                         break;
  84
  85         return np;
  86 }
  87 EXPORT_SYMBOL(of_find_node_by_phandle);
  88
  89 struct device_node *of_find_node_by_name(struct device_node *from,
  90         const char *name)
  91 {
  92         struct device_node *np;
  93
  94         np = from ? from->allnext : allnodes;
  95         for (; np != NULL; np = np->allnext)
  96                 if (np->name != NULL && strcmp(np->name, name) == 0)
  97                         break;
  98
  99         return np;
 100 }
 101 EXPORT_SYMBOL(of_find_node_by_name);
 102
 103 struct device_node *of_find_node_by_type(struct device_node *from,
 104         const char *type)
 105 {
 106         struct device_node *np;
 107
 108         np = from ? from->allnext : allnodes;
 109         for (; np != 0; np = np->allnext)
 110                 if (np->type != 0 && strcmp(np->type, type) == 0)
 111                         break;
 112
 113         return np;
 114 }
 115 EXPORT_SYMBOL(of_find_node_by_type);
 116
 117 struct device_node *of_find_compatible_node(struct device_node *from,
 118         const char *type, const char *compatible)
 119 {
 120         struct device_node *np;
 121
 122         np = from ? from->allnext : allnodes;
 123         for (; np != 0; np = np->allnext) {
 124                 if (type != NULL
 125                     && !(np->type != 0 && strcmp(np->type, type) == 0))
 126                         continue;
 127                 if (of_device_is_compatible(np, compatible))
 128                         break;
 129         }
 130
 131         return np;
 132 }
 133 EXPORT_SYMBOL(of_find_compatible_node);
 134
 135 int of_getintprop_default(struct device_node *np, const char *name, int def)
 136 {
 137         struct property *prop;
 138         int len;
 139
 140         prop = of_find_property(np, name, &len);
 141         if (!prop || len != 4)
 142                 return def;
 143
 144         return *(int *) prop->value;
 145 }
 146 EXPORT_SYMBOL(of_getintprop_default);
 147
 148 int of_set_property(struct device_node *dp, const char *name, void *val, int len)
 149 {
 150         struct property **prevp;
 151         void *new_val;
 152         int err;
 153
 154         new_val = kmalloc(len, GFP_KERNEL);
 155         if (!new_val)
 156                 return -ENOMEM;
 157
 158         memcpy(new_val, val, len);
 159
 160         err = -ENODEV;
 161
 162         write_lock(&devtree_lock);
 163         prevp = &dp->properties;
 164         while (*prevp) {
 165                 struct property *prop = *prevp;
 166
 167                 if (!strcasecmp(prop->name, name)) {
 168                         void *old_val = prop->value;
 169                         int ret;
 170
 171                         ret = prom_setprop(dp->node, name, val, len);
 172                         err = -EINVAL;
 173                         if (ret >= 0) {
 174                                 prop->value = new_val;
 175                                 prop->length = len;
 176
 177                                 if (OF_IS_DYNAMIC(prop))
 178                                         kfree(old_val);
 179
 180                                 OF_MARK_DYNAMIC(prop);
 181
 182                                 err = 0;
 183                         }
 184                         break;
 185                 }
 186                 prevp = &(*prevp)->next;
 187         }
 188         write_unlock(&devtree_lock);
 189
 190         /* XXX Upate procfs if necessary... */
 191
 192         return err;
 193 }
 194 EXPORT_SYMBOL(of_set_property);
 195
 196 static unsigned int prom_early_allocated;
 197
 198 static void * __init prom_early_alloc(unsigned long size)
 199 {
 200         void *ret;
 201
 202         ret = __alloc_bootmem(size, SMP_CACHE_BYTES, 0UL);
 203         if (ret != NULL)
 204                 memset(ret, 0, size);
 205
 206         prom_early_allocated += size;
 207
 208         return ret;
 209 }
 210
 211 #ifdef CONFIG_PCI
 212 /* PSYCHO interrupt mapping support. */
 213 #define PSYCHO_IMAP_A_SLOT0     0x0c00UL
 214 #define PSYCHO_IMAP_B_SLOT0     0x0c20UL
 215 static unsigned long psycho_pcislot_imap_offset(unsigned long ino)
 216 {
 217         unsigned int bus =  (ino & 0x10) >> 4;
 218         unsigned int slot = (ino & 0x0c) >> 2;
 219
 220         if (bus == 0)
 221                 return PSYCHO_IMAP_A_SLOT0 + (slot * 8);
 222         else
 223                 return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
 224 }
 225
 226 #define PSYCHO_IMAP_SCSI        0x1000UL
 227 #define PSYCHO_IMAP_ETH         0x1008UL
 228 #define PSYCHO_IMAP_BPP         0x1010UL
 229 #define PSYCHO_IMAP_AU_REC      0x1018UL
 230 #define PSYCHO_IMAP_AU_PLAY     0x1020UL
 231 #define PSYCHO_IMAP_PFAIL       0x1028UL
 232 #define PSYCHO_IMAP_KMS         0x1030UL
 233 #define PSYCHO_IMAP_FLPY        0x1038UL
 234 #define PSYCHO_IMAP_SHW         0x1040UL
 235 #define PSYCHO_IMAP_KBD         0x1048UL
 236 #define PSYCHO_IMAP_MS          0x1050UL
 237 #define PSYCHO_IMAP_SER         0x1058UL
 238 #define PSYCHO_IMAP_TIM0        0x1060UL
 239 #define PSYCHO_IMAP_TIM1        0x1068UL
 240 #define PSYCHO_IMAP_UE          0x1070UL
 241 #define PSYCHO_IMAP_CE          0x1078UL
 242 #define PSYCHO_IMAP_A_ERR       0x1080UL
 243 #define PSYCHO_IMAP_B_ERR       0x1088UL
 244 #define PSYCHO_IMAP_PMGMT       0x1090UL
 245 #define PSYCHO_IMAP_GFX         0x1098UL
 246 #define PSYCHO_IMAP_EUPA        0x10a0UL
 247
 248 static unsigned long __psycho_onboard_imap_off[] = {
 249 /*0x20*/        PSYCHO_IMAP_SCSI,
 250 /*0x21*/        PSYCHO_IMAP_ETH,
 251 /*0x22*/        PSYCHO_IMAP_BPP,
 252 /*0x23*/        PSYCHO_IMAP_AU_REC,
 253 /*0x24*/        PSYCHO_IMAP_AU_PLAY,
 254 /*0x25*/        PSYCHO_IMAP_PFAIL,
 255 /*0x26*/        PSYCHO_IMAP_KMS,
 256 /*0x27*/        PSYCHO_IMAP_FLPY,
 257 /*0x28*/        PSYCHO_IMAP_SHW,
 258 /*0x29*/        PSYCHO_IMAP_KBD,
 259 /*0x2a*/        PSYCHO_IMAP_MS,
 260 /*0x2b*/        PSYCHO_IMAP_SER,
 261 /*0x2c*/        PSYCHO_IMAP_TIM0,
 262 /*0x2d*/        PSYCHO_IMAP_TIM1,
 263 /*0x2e*/        PSYCHO_IMAP_UE,
 264 /*0x2f*/        PSYCHO_IMAP_CE,
 265 /*0x30*/        PSYCHO_IMAP_A_ERR,
 266 /*0x31*/        PSYCHO_IMAP_B_ERR,
 267 /*0x32*/        PSYCHO_IMAP_PMGMT,
 268 /*0x33*/        PSYCHO_IMAP_GFX,
 269 /*0x34*/        PSYCHO_IMAP_EUPA,
 270 };
 271 #define PSYCHO_ONBOARD_IRQ_BASE         0x20
 272 #define PSYCHO_ONBOARD_IRQ_LAST         0x34
 273 #define psycho_onboard_imap_offset(__ino) \
 274         __psycho_onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
 275
 276 #define PSYCHO_ICLR_A_SLOT0     0x1400UL
 277 #define PSYCHO_ICLR_SCSI        0x1800UL
 278
 279 #define psycho_iclr_offset(ino)                                       \
 280         ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
 281                         (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
 282
 283 static unsigned int psycho_irq_build(struct device_node *dp,
 284                                      unsigned int ino,
 285                                      void *_data)
 286 {
 287         unsigned long controller_regs = (unsigned long) _data;
 288         unsigned long imap, iclr;
 289         unsigned long imap_off, iclr_off;
 290         int inofixup = 0;
 291
 292         ino &= 0x3f;
 293         if (ino < PSYCHO_ONBOARD_IRQ_BASE) {
 294                 /* PCI slot */
 295                 imap_off = psycho_pcislot_imap_offset(ino);
 296         } else {
 297                 /* Onboard device */
 298                 if (ino > PSYCHO_ONBOARD_IRQ_LAST) {
 299                         prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino);
 300                         prom_halt();
 301                 }
 302                 imap_off = psycho_onboard_imap_offset(ino);
 303         }
 304
 305         /* Now build the IRQ bucket. */
 306         imap = controller_regs + imap_off;
 307
 308         iclr_off = psycho_iclr_offset(ino);
 309         iclr = controller_regs + iclr_off;
 310
 311         if ((ino & 0x20) == 0)
 312                 inofixup = ino & 0x03;
 313
 314         return build_irq(inofixup, iclr, imap);
 315 }
 316
 317 static void __init psycho_irq_trans_init(struct device_node *dp)
 318 {
 319         const struct linux_prom64_registers *regs;
 320
 321         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 322         dp->irq_trans->irq_build = psycho_irq_build;
 323
 324         regs = of_get_property(dp, "reg", NULL);
 325         dp->irq_trans->data = (void *) regs[2].phys_addr;
 326 }
 327
 328 #define sabre_read(__reg) \
 329 ({      u64 __ret; \
 330         __asm__ __volatile__("ldxa [%1] %2, %0" \
 331                              : "=r" (__ret) \
 332                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
 333                              : "memory"); \
 334         __ret; \
 335 })
 336
 337 struct sabre_irq_data {
 338         unsigned long controller_regs;
 339         unsigned int pci_first_busno;
 340 };
 341 #define SABRE_CONFIGSPACE       0x001000000UL
 342 #define SABRE_WRSYNC            0x1c20UL
 343
 344 #define SABRE_CONFIG_BASE(CONFIG_SPACE) \
 345         (CONFIG_SPACE | (1UL << 24))
 346 #define SABRE_CONFIG_ENCODE(BUS, DEVFN, REG)    \
 347         (((unsigned long)(BUS)   << 16) |       \
 348          ((unsigned long)(DEVFN) << 8)  |       \
 349          ((unsigned long)(REG)))
 350
 351 /* When a device lives behind a bridge deeper in the PCI bus topology
 352  * than APB, a special sequence must run to make sure all pending DMA
 353  * transfers at the time of IRQ delivery are visible in the coherency
 354  * domain by the cpu.  This sequence is to perform a read on the far
 355  * side of the non-APB bridge, then perform a read of Sabre's DMA
 356  * write-sync register.
 357  */
 358 static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
 359 {
 360         unsigned int phys_hi = (unsigned int) (unsigned long) _arg1;
 361         struct sabre_irq_data *irq_data = _arg2;
 362         unsigned long controller_regs = irq_data->controller_regs;
 363         unsigned long sync_reg = controller_regs + SABRE_WRSYNC;
 364         unsigned long config_space = controller_regs + SABRE_CONFIGSPACE;
 365         unsigned int bus, devfn;
 366         u16 _unused;
 367
 368         config_space = SABRE_CONFIG_BASE(config_space);
 369
 370         bus = (phys_hi >> 16) & 0xff;
 371         devfn = (phys_hi >> 8) & 0xff;
 372
 373         config_space |= SABRE_CONFIG_ENCODE(bus, devfn, 0x00);
 374
 375         __asm__ __volatile__("membar #Sync\n\t"
 376                              "lduha [%1] %2, %0\n\t"
 377                              "membar #Sync"
 378                              : "=r" (_unused)
 379                              : "r" ((u16 *) config_space),
 380                                "i" (ASI_PHYS_BYPASS_EC_E_L)
 381                              : "memory");
 382
 383         sabre_read(sync_reg);
 384 }
 385
 386 #define SABRE_IMAP_A_SLOT0      0x0c00UL
 387 #define SABRE_IMAP_B_SLOT0      0x0c20UL
 388 #define SABRE_IMAP_SCSI         0x1000UL
 389 #define SABRE_IMAP_ETH          0x1008UL
 390 #define SABRE_IMAP_BPP          0x1010UL
 391 #define SABRE_IMAP_AU_REC       0x1018UL
 392 #define SABRE_IMAP_AU_PLAY      0x1020UL
 393 #define SABRE_IMAP_PFAIL        0x1028UL
 394 #define SABRE_IMAP_KMS          0x1030UL
 395 #define SABRE_IMAP_FLPY         0x1038UL
 396 #define SABRE_IMAP_SHW          0x1040UL
 397 #define SABRE_IMAP_KBD          0x1048UL
 398 #define SABRE_IMAP_MS           0x1050UL
 399 #define SABRE_IMAP_SER          0x1058UL
 400 #define SABRE_IMAP_UE           0x1070UL
 401 #define SABRE_IMAP_CE           0x1078UL
 402 #define SABRE_IMAP_PCIERR       0x1080UL
 403 #define SABRE_IMAP_GFX          0x1098UL
 404 #define SABRE_IMAP_EUPA         0x10a0UL
 405 #define SABRE_ICLR_A_SLOT0      0x1400UL
 406 #define SABRE_ICLR_B_SLOT0      0x1480UL
 407 #define SABRE_ICLR_SCSI         0x1800UL
 408 #define SABRE_ICLR_ETH          0x1808UL
 409 #define SABRE_ICLR_BPP          0x1810UL
 410 #define SABRE_ICLR_AU_REC       0x1818UL
 411 #define SABRE_ICLR_AU_PLAY      0x1820UL
 412 #define SABRE_ICLR_PFAIL        0x1828UL
 413 #define SABRE_ICLR_KMS          0x1830UL
 414 #define SABRE_ICLR_FLPY         0x1838UL
 415 #define SABRE_ICLR_SHW          0x1840UL
 416 #define SABRE_ICLR_KBD          0x1848UL
 417 #define SABRE_ICLR_MS           0x1850UL
 418 #define SABRE_ICLR_SER          0x1858UL
 419 #define SABRE_ICLR_UE           0x1870UL
 420 #define SABRE_ICLR_CE           0x1878UL
 421 #define SABRE_ICLR_PCIERR       0x1880UL
 422
 423 static unsigned long sabre_pcislot_imap_offset(unsigned long ino)
 424 {
 425         unsigned int bus =  (ino & 0x10) >> 4;
 426         unsigned int slot = (ino & 0x0c) >> 2;
 427
 428         if (bus == 0)
 429                 return SABRE_IMAP_A_SLOT0 + (slot * 8);
 430         else
 431                 return SABRE_IMAP_B_SLOT0 + (slot * 8);
 432 }
 433
 434 static unsigned long __sabre_onboard_imap_off[] = {
 435 /*0x20*/        SABRE_IMAP_SCSI,
 436 /*0x21*/        SABRE_IMAP_ETH,
 437 /*0x22*/        SABRE_IMAP_BPP,
 438 /*0x23*/        SABRE_IMAP_AU_REC,
 439 /*0x24*/        SABRE_IMAP_AU_PLAY,
 440 /*0x25*/        SABRE_IMAP_PFAIL,
 441 /*0x26*/        SABRE_IMAP_KMS,
 442 /*0x27*/        SABRE_IMAP_FLPY,
 443 /*0x28*/        SABRE_IMAP_SHW,
 444 /*0x29*/        SABRE_IMAP_KBD,
 445 /*0x2a*/        SABRE_IMAP_MS,
 446 /*0x2b*/        SABRE_IMAP_SER,
 447 /*0x2c*/        0 /* reserved */,
 448 /*0x2d*/        0 /* reserved */,
 449 /*0x2e*/        SABRE_IMAP_UE,
 450 /*0x2f*/        SABRE_IMAP_CE,
 451 /*0x30*/        SABRE_IMAP_PCIERR,
 452 /*0x31*/        0 /* reserved */,
 453 /*0x32*/        0 /* reserved */,
 454 /*0x33*/        SABRE_IMAP_GFX,
 455 /*0x34*/        SABRE_IMAP_EUPA,
 456 };
 457 #define SABRE_ONBOARD_IRQ_BASE          0x20
 458 #define SABRE_ONBOARD_IRQ_LAST          0x30
 459 #define sabre_onboard_imap_offset(__ino) \
 460         __sabre_onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
 461
 462 #define sabre_iclr_offset(ino)                                        \
 463         ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
 464                         (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
 465
 466 static int sabre_device_needs_wsync(struct device_node *dp)
 467 {
 468         struct device_node *parent = dp->parent;
 469         const char *parent_model, *parent_compat;
 470
 471         /* This traversal up towards the root is meant to
 472          * handle two cases:
 473          *
 474          * 1) non-PCI bus sitting under PCI, such as 'ebus'
 475          * 2) the PCI controller interrupts themselves, which
 476          *    will use the sabre_irq_build but do not need
 477          *    the DMA synchronization handling
 478          */
 479         while (parent) {
 480                 if (!strcmp(parent->type, "pci"))
 481                         break;
 482                 parent = parent->parent;
 483         }
 484
 485         if (!parent)
 486                 return 0;
 487
 488         parent_model = of_get_property(parent,
 489                                        "model", NULL);
 490         if (parent_model &&
 491             (!strcmp(parent_model, "SUNW,sabre") ||
 492              !strcmp(parent_model, "SUNW,simba")))
 493                 return 0;
 494
 495         parent_compat = of_get_property(parent,
 496                                         "compatible", NULL);
 497         if (parent_compat &&
 498             (!strcmp(parent_compat, "pci108e,a000") ||
 499              !strcmp(parent_compat, "pci108e,a001")))
 500                 return 0;
 501
 502         return 1;
 503 }
 504
 505 static unsigned int sabre_irq_build(struct device_node *dp,
 506                                     unsigned int ino,
 507                                     void *_data)
 508 {
 509         struct sabre_irq_data *irq_data = _data;
 510         unsigned long controller_regs = irq_data->controller_regs;
 511         const struct linux_prom_pci_registers *regs;
 512         unsigned long imap, iclr;
 513         unsigned long imap_off, iclr_off;
 514         int inofixup = 0;
 515         int virt_irq;
 516
 517         ino &= 0x3f;
 518         if (ino < SABRE_ONBOARD_IRQ_BASE) {
 519                 /* PCI slot */
 520                 imap_off = sabre_pcislot_imap_offset(ino);
 521         } else {
 522                 /* onboard device */
 523                 if (ino > SABRE_ONBOARD_IRQ_LAST) {
 524                         prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino);
 525                         prom_halt();
 526                 }
 527                 imap_off = sabre_onboard_imap_offset(ino);
 528         }
 529
 530         /* Now build the IRQ bucket. */
 531         imap = controller_regs + imap_off;
 532
 533         iclr_off = sabre_iclr_offset(ino);
 534         iclr = controller_regs + iclr_off;
 535
 536         if ((ino & 0x20) == 0)
 537                 inofixup = ino & 0x03;
 538
 539         virt_irq = build_irq(inofixup, iclr, imap);
 540
 541         /* If the parent device is a PCI<->PCI bridge other than
 542          * APB, we have to install a pre-handler to ensure that
 543          * all pending DMA is drained before the interrupt handler
 544          * is run.
 545          */
 546         regs = of_get_property(dp, "reg", NULL);
 547         if (regs && sabre_device_needs_wsync(dp)) {
 548                 irq_install_pre_handler(virt_irq,
 549                                         sabre_wsync_handler,
 550                                         (void *) (long) regs->phys_hi,
 551                                         (void *) irq_data);
 552         }
 553
 554         return virt_irq;
 555 }
 556
 557 static void __init sabre_irq_trans_init(struct device_node *dp)
 558 {
 559         const struct linux_prom64_registers *regs;
 560         struct sabre_irq_data *irq_data;
 561         const u32 *busrange;
 562
 563         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 564         dp->irq_trans->irq_build = sabre_irq_build;
 565
 566         irq_data = prom_early_alloc(sizeof(struct sabre_irq_data));
 567
 568         regs = of_get_property(dp, "reg", NULL);
 569         irq_data->controller_regs = regs[0].phys_addr;
 570
 571         busrange = of_get_property(dp, "bus-range", NULL);
 572         irq_data->pci_first_busno = busrange[0];
 573
 574         dp->irq_trans->data = irq_data;
 575 }
 576
 577 /* SCHIZO interrupt mapping support.  Unlike Psycho, for this controller the
 578  * imap/iclr registers are per-PBM.
 579  */
 580 #define SCHIZO_IMAP_BASE        0x1000UL
 581 #define SCHIZO_ICLR_BASE        0x1400UL
 582
 583 static unsigned long schizo_imap_offset(unsigned long ino)
 584 {
 585         return SCHIZO_IMAP_BASE + (ino * 8UL);
 586 }
 587
 588 static unsigned long schizo_iclr_offset(unsigned long ino)
 589 {
 590         return SCHIZO_ICLR_BASE + (ino * 8UL);
 591 }
 592
 593 static unsigned long schizo_ino_to_iclr(unsigned long pbm_regs,
 594                                         unsigned int ino)
 595 {
 596
 597         return pbm_regs + schizo_iclr_offset(ino);
 598 }
 599
 600 static unsigned long schizo_ino_to_imap(unsigned long pbm_regs,
 601                                         unsigned int ino)
 602 {
 603         return pbm_regs + schizo_imap_offset(ino);
 604 }
 605
 606 #define schizo_read(__reg) \
 607 ({      u64 __ret; \
 608         __asm__ __volatile__("ldxa [%1] %2, %0" \
 609                              : "=r" (__ret) \
 610                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
 611                              : "memory"); \
 612         __ret; \
 613 })
 614 #define schizo_write(__reg, __val) \
 615         __asm__ __volatile__("stxa %0, [%1] %2" \
 616                              : /* no outputs */ \
 617                              : "r" (__val), "r" (__reg), \
 618                                "i" (ASI_PHYS_BYPASS_EC_E) \
 619                              : "memory")
 620
 621 static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
 622 {
 623         unsigned long sync_reg = (unsigned long) _arg2;
 624         u64 mask = 1UL << (ino & IMAP_INO);
 625         u64 val;
 626         int limit;
 627
 628         schizo_write(sync_reg, mask);
 629
 630         limit = 100000;
 631         val = 0;
 632         while (--limit) {
 633                 val = schizo_read(sync_reg);
 634                 if (!(val & mask))
 635                         break;
 636         }
 637         if (limit <= 0) {
 638                 printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",
 639                        val, mask);
 640         }
 641
 642         if (_arg1) {
 643                 static unsigned char cacheline[64]
 644                         __attribute__ ((aligned (64)));
 645
 646                 __asm__ __volatile__("rd %%fprs, %0\n\t"
 647                                      "or %0, %4, %1\n\t"
 648                                      "wr %1, 0x0, %%fprs\n\t"
 649                                      "stda %%f0, [%5] %6\n\t"
 650                                      "wr %0, 0x0, %%fprs\n\t"
 651                                      "membar #Sync"
 652                                      : "=&r" (mask), "=&r" (val)
 653                                      : "0" (mask), "1" (val),
 654                                      "i" (FPRS_FEF), "r" (&cacheline[0]),
 655                                      "i" (ASI_BLK_COMMIT_P));
 656         }
 657 }
 658
 659 struct schizo_irq_data {
 660         unsigned long pbm_regs;
 661         unsigned long sync_reg;
 662         u32 portid;
 663         int chip_version;
 664 };
 665
 666 static unsigned int schizo_irq_build(struct device_node *dp,
 667                                      unsigned int ino,
 668                                      void *_data)
 669 {
 670         struct schizo_irq_data *irq_data = _data;
 671         unsigned long pbm_regs = irq_data->pbm_regs;
 672         unsigned long imap, iclr;
 673         int ign_fixup;
 674         int virt_irq;
 675         int is_tomatillo;
 676
 677         ino &= 0x3f;
 678
 679         /* Now build the IRQ bucket. */
 680         imap = schizo_ino_to_imap(pbm_regs, ino);
 681         iclr = schizo_ino_to_iclr(pbm_regs, ino);
 682
 683         /* On Schizo, no inofixup occurs.  This is because each
 684          * INO has it's own IMAP register.  On Psycho and Sabre
 685          * there is only one IMAP register for each PCI slot even
 686          * though four different INOs can be generated by each
 687          * PCI slot.
 688          *
 689          * But, for JBUS variants (essentially, Tomatillo), we have
 690          * to fixup the lowest bit of the interrupt group number.
 691          */
 692         ign_fixup = 0;
 693
 694         is_tomatillo = (irq_data->sync_reg != 0UL);
 695
 696         if (is_tomatillo) {
 697                 if (irq_data->portid & 1)
 698                         ign_fixup = (1 << 6);
 699         }
 700
 701         virt_irq = build_irq(ign_fixup, iclr, imap);
 702
 703         if (is_tomatillo) {
 704                 irq_install_pre_handler(virt_irq,
 705                                         tomatillo_wsync_handler,
 706                                         ((irq_data->chip_version <= 4) ?
 707                                          (void *) 1 : (void *) 0),
 708                                         (void *) irq_data->sync_reg);
 709         }
 710
 711         return virt_irq;
 712 }
 713
 714 static void __init __schizo_irq_trans_init(struct device_node *dp,
 715                                            int is_tomatillo)
 716 {
 717         const struct linux_prom64_registers *regs;
 718         struct schizo_irq_data *irq_data;
 719
 720         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 721         dp->irq_trans->irq_build = schizo_irq_build;
 722
 723         irq_data = prom_early_alloc(sizeof(struct schizo_irq_data));
 724
 725         regs = of_get_property(dp, "reg", NULL);
 726         dp->irq_trans->data = irq_data;
 727
 728         irq_data->pbm_regs = regs[0].phys_addr;
 729         if (is_tomatillo)
 730                 irq_data->sync_reg = regs[3].phys_addr + 0x1a18UL;
 731         else
 732                 irq_data->sync_reg = 0UL;
 733         irq_data->portid = of_getintprop_default(dp, "portid", 0);
 734         irq_data->chip_version = of_getintprop_default(dp, "version#", 0);
 735 }
 736
 737 static void __init schizo_irq_trans_init(struct device_node *dp)
 738 {
 739         __schizo_irq_trans_init(dp, 0);
 740 }
 741
 742 static void __init tomatillo_irq_trans_init(struct device_node *dp)
 743 {
 744         __schizo_irq_trans_init(dp, 1);
 745 }
 746
 747 static unsigned int pci_sun4v_irq_build(struct device_node *dp,
 748                                         unsigned int devino,
 749                                         void *_data)
 750 {
 751         u32 devhandle = (u32) (unsigned long) _data;
 752
 753         return sun4v_build_irq(devhandle, devino);
 754 }
 755
 756 static void __init pci_sun4v_irq_trans_init(struct device_node *dp)
 757 {
 758         const struct linux_prom64_registers *regs;
 759
 760         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 761         dp->irq_trans->irq_build = pci_sun4v_irq_build;
 762
 763         regs = of_get_property(dp, "reg", NULL);
 764         dp->irq_trans->data = (void *) (unsigned long)
 765                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
 766 }
 767
 768 struct fire_irq_data {
 769         unsigned long pbm_regs;
 770         u32 portid;
 771 };
 772
 773 #define FIRE_IMAP_BASE  0x001000
 774 #define FIRE_ICLR_BASE  0x001400
 775
 776 static unsigned long fire_imap_offset(unsigned long ino)
 777 {
 778         return FIRE_IMAP_BASE + (ino * 8UL);
 779 }
 780
 781 static unsigned long fire_iclr_offset(unsigned long ino)
 782 {
 783         return FIRE_ICLR_BASE + (ino * 8UL);
 784 }
 785
 786 static unsigned long fire_ino_to_iclr(unsigned long pbm_regs,
 787                                             unsigned int ino)
 788 {
 789         return pbm_regs + fire_iclr_offset(ino);
 790 }
 791
 792 static unsigned long fire_ino_to_imap(unsigned long pbm_regs,
 793                                             unsigned int ino)
 794 {
 795         return pbm_regs + fire_imap_offset(ino);
 796 }
 797
 798 static unsigned int fire_irq_build(struct device_node *dp,
 799                                          unsigned int ino,
 800                                          void *_data)
 801 {
 802         struct fire_irq_data *irq_data = _data;
 803         unsigned long pbm_regs = irq_data->pbm_regs;
 804         unsigned long imap, iclr;
 805         unsigned long int_ctrlr;
 806
 807         ino &= 0x3f;
 808
 809         /* Now build the IRQ bucket. */
 810         imap = fire_ino_to_imap(pbm_regs, ino);
 811         iclr = fire_ino_to_iclr(pbm_regs, ino);
 812
 813         /* Set the interrupt controller number.  */
 814         int_ctrlr = 1 << 6;
 815         upa_writeq(int_ctrlr, imap);
 816
 817         /* The interrupt map registers do not have an INO field
 818          * like other chips do.  They return zero in the INO
 819          * field, and the interrupt controller number is controlled
 820          * in bits 6 to 9.  So in order for build_irq() to get
 821          * the INO right we pass it in as part of the fixup
 822          * which will get added to the map register zero value
 823          * read by build_irq().
 824          */
 825         ino |= (irq_data->portid << 6);
 826         ino -= int_ctrlr;
 827         return build_irq(ino, iclr, imap);
 828 }
 829
 830 static void __init fire_irq_trans_init(struct device_node *dp)
 831 {
 832         const struct linux_prom64_registers *regs;
 833         struct fire_irq_data *irq_data;
 834
 835         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 836         dp->irq_trans->irq_build = fire_irq_build;
 837
 838         irq_data = prom_early_alloc(sizeof(struct fire_irq_data));
 839
 840         regs = of_get_property(dp, "reg", NULL);
 841         dp->irq_trans->data = irq_data;
 842
 843         irq_data->pbm_regs = regs[0].phys_addr;
 844         irq_data->portid = of_getintprop_default(dp, "portid", 0);
 845 }
 846 #endif /* CONFIG_PCI */
 847
 848 #ifdef CONFIG_SBUS
 849 /* INO number to IMAP register offset for SYSIO external IRQ's.
 850  * This should conform to both Sunfire/Wildfire server and Fusion
 851  * desktop designs.
 852  */
 853 #define SYSIO_IMAP_SLOT0        0x2c00UL
 854 #define SYSIO_IMAP_SLOT1        0x2c08UL
 855 #define SYSIO_IMAP_SLOT2        0x2c10UL
 856 #define SYSIO_IMAP_SLOT3        0x2c18UL
 857 #define SYSIO_IMAP_SCSI         0x3000UL
 858 #define SYSIO_IMAP_ETH          0x3008UL
 859 #define SYSIO_IMAP_BPP          0x3010UL
 860 #define SYSIO_IMAP_AUDIO        0x3018UL
 861 #define SYSIO_IMAP_PFAIL        0x3020UL
 862 #define SYSIO_IMAP_KMS          0x3028UL
 863 #define SYSIO_IMAP_FLPY         0x3030UL
 864 #define SYSIO_IMAP_SHW          0x3038UL
 865 #define SYSIO_IMAP_KBD          0x3040UL
 866 #define SYSIO_IMAP_MS           0x3048UL
 867 #define SYSIO_IMAP_SER          0x3050UL
 868 #define SYSIO_IMAP_TIM0         0x3060UL
 869 #define SYSIO_IMAP_TIM1         0x3068UL
 870 #define SYSIO_IMAP_UE           0x3070UL
 871 #define SYSIO_IMAP_CE           0x3078UL
 872 #define SYSIO_IMAP_SBERR        0x3080UL
 873 #define SYSIO_IMAP_PMGMT        0x3088UL
 874 #define SYSIO_IMAP_GFX          0x3090UL
 875 #define SYSIO_IMAP_EUPA         0x3098UL
 876
 877 #define bogon     ((unsigned long) -1)
 878 static unsigned long sysio_irq_offsets[] = {
 879         /* SBUS Slot 0 --> 3, level 1 --> 7 */
 880         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
 881         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
 882         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
 883         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
 884         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
 885         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
 886         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
 887         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
 888
 889         /* Onboard devices (not relevant/used on SunFire). */
 890         SYSIO_IMAP_SCSI,
 891         SYSIO_IMAP_ETH,
 892         SYSIO_IMAP_BPP,
 893         bogon,
 894         SYSIO_IMAP_AUDIO,
 895         SYSIO_IMAP_PFAIL,
 896         bogon,
 897         bogon,
 898         SYSIO_IMAP_KMS,
 899         SYSIO_IMAP_FLPY,
 900         SYSIO_IMAP_SHW,
 901         SYSIO_IMAP_KBD,
 902         SYSIO_IMAP_MS,
 903         SYSIO_IMAP_SER,
 904         bogon,
 905         bogon,
 906         SYSIO_IMAP_TIM0,
 907         SYSIO_IMAP_TIM1,
 908         bogon,
 909         bogon,
 910         SYSIO_IMAP_UE,
 911         SYSIO_IMAP_CE,
 912         SYSIO_IMAP_SBERR,
 913         SYSIO_IMAP_PMGMT,
 914         SYSIO_IMAP_GFX,
 915         SYSIO_IMAP_EUPA,
 916 };
 917
 918 #undef bogon
 919
 920 #define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets)
 921
 922 /* Convert Interrupt Mapping register pointer to associated
 923  * Interrupt Clear register pointer, SYSIO specific version.
 924  */
 925 #define SYSIO_ICLR_UNUSED0      0x3400UL
 926 #define SYSIO_ICLR_SLOT0        0x3408UL
 927 #define SYSIO_ICLR_SLOT1        0x3448UL
 928 #define SYSIO_ICLR_SLOT2        0x3488UL
 929 #define SYSIO_ICLR_SLOT3        0x34c8UL
 930 static unsigned long sysio_imap_to_iclr(unsigned long imap)
 931 {
 932         unsigned long diff = SYSIO_ICLR_UNUSED0 - SYSIO_IMAP_SLOT0;
 933         return imap + diff;
 934 }
 935
 936 static unsigned int sbus_of_build_irq(struct device_node *dp,
 937                                       unsigned int ino,
 938                                       void *_data)
 939 {
 940         unsigned long reg_base = (unsigned long) _data;
 941         const struct linux_prom_registers *regs;
 942         unsigned long imap, iclr;
 943         int sbus_slot = 0;
 944         int sbus_level = 0;
 945
 946         ino &= 0x3f;
 947
 948         regs = of_get_property(dp, "reg", NULL);
 949         if (regs)
 950                 sbus_slot = regs->which_io;
 951
 952         if (ino < 0x20)
 953                 ino += (sbus_slot * 8);
 954
 955         imap = sysio_irq_offsets[ino];
 956         if (imap == ((unsigned long)-1)) {
 957                 prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n",
 958                             ino);
 959                 prom_halt();
 960         }
 961         imap += reg_base;
 962
 963         /* SYSIO inconsistency.  For external SLOTS, we have to select
 964          * the right ICLR register based upon the lower SBUS irq level
 965          * bits.
 966          */
 967         if (ino >= 0x20) {
 968                 iclr = sysio_imap_to_iclr(imap);
 969         } else {
 970                 sbus_level = ino & 0x7;
 971
 972                 switch(sbus_slot) {
 973                 case 0:
 974                         iclr = reg_base + SYSIO_ICLR_SLOT0;
 975                         break;
 976                 case 1:
 977                         iclr = reg_base + SYSIO_ICLR_SLOT1;
 978                         break;
 979                 case 2:
 980                         iclr = reg_base + SYSIO_ICLR_SLOT2;
 981                         break;
 982                 default:
 983                 case 3:
 984                         iclr = reg_base + SYSIO_ICLR_SLOT3;
 985                         break;
 986                 };
 987
 988                 iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
 989         }
 990         return build_irq(sbus_level, iclr, imap);
 991 }
 992
 993 static void __init sbus_irq_trans_init(struct device_node *dp)
 994 {
 995         const struct linux_prom64_registers *regs;
 996
 997         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 998         dp->irq_trans->irq_build = sbus_of_build_irq;
 999
1000         regs = of_get_property(dp, "reg", NULL);
1001         dp->irq_trans->data = (void *) (unsigned long) regs->phys_addr;
1002 }
1003 #endif /* CONFIG_SBUS */
1004
1005
1006 static unsigned int central_build_irq(struct device_node *dp,
1007                                       unsigned int ino,
1008                                       void *_data)
1009 {
1010         struct device_node *central_dp = _data;
1011         struct of_device *central_op = of_find_device_by_node(central_dp);
1012         struct resource *res;
1013         unsigned long imap, iclr;
1014         u32 tmp;
1015
1016         if (!strcmp(dp->name, "eeprom")) {
1017                 res = &central_op->resource[5];
1018         } else if (!strcmp(dp->name, "zs")) {
1019                 res = &central_op->resource[4];
1020         } else if (!strcmp(dp->name, "clock-board")) {
1021                 res = &central_op->resource[3];
1022         } else {
1023                 return ino;
1024         }
1025
1026         imap = res->start + 0x00UL;
1027         iclr = res->start + 0x10UL;
1028
1029         /* Set the INO state to idle, and disable.  */
1030         upa_writel(0, iclr);
1031         upa_readl(iclr);
1032
1033         tmp = upa_readl(imap);
1034         tmp &= ~0x80000000;
1035         upa_writel(tmp, imap);
1036
1037         return build_irq(0, iclr, imap);
1038 }
1039
1040 static void __init central_irq_trans_init(struct device_node *dp)
1041 {
1042         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1043         dp->irq_trans->irq_build = central_build_irq;
1044
1045         dp->irq_trans->data = dp;
1046 }
1047
1048 struct irq_trans {
1049         const char *name;
1050         void (*init)(struct device_node *);
1051 };
1052
1053 #ifdef CONFIG_PCI
1054 static struct irq_trans __initdata pci_irq_trans_table[] = {
1055         { "SUNW,sabre", sabre_irq_trans_init },
1056         { "pci108e,a000", sabre_irq_trans_init },
1057         { "pci108e,a001", sabre_irq_trans_init },
1058         { "SUNW,psycho", psycho_irq_trans_init },
1059         { "pci108e,8000", psycho_irq_trans_init },
1060         { "SUNW,schizo", schizo_irq_trans_init },
1061         { "pci108e,8001", schizo_irq_trans_init },
1062         { "SUNW,schizo+", schizo_irq_trans_init },
1063         { "pci108e,8002", schizo_irq_trans_init },
1064         { "SUNW,tomatillo", tomatillo_irq_trans_init },
1065         { "pci108e,a801", tomatillo_irq_trans_init },
1066         { "SUNW,sun4v-pci", pci_sun4v_irq_trans_init },
1067         { "pciex108e,80f0", fire_irq_trans_init },
1068 };
1069 #endif
1070
1071 static unsigned int sun4v_vdev_irq_build(struct device_node *dp,
1072                                          unsigned int devino,
1073                                          void *_data)
1074 {
1075         u32 devhandle = (u32) (unsigned long) _data;
1076
1077         return sun4v_build_irq(devhandle, devino);
1078 }
1079
1080 static void __init sun4v_vdev_irq_trans_init(struct device_node *dp)
1081 {
1082         const struct linux_prom64_registers *regs;
1083
1084         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1085         dp->irq_trans->irq_build = sun4v_vdev_irq_build;
1086
1087         regs = of_get_property(dp, "reg", NULL);
1088         dp->irq_trans->data = (void *) (unsigned long)
1089                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
1090 }
1091
1092 static void __init irq_trans_init(struct device_node *dp)
1093 {
1094 #ifdef CONFIG_PCI
1095         const char *model;
1096         int i;
1097 #endif
1098
1099 #ifdef CONFIG_PCI
1100         model = of_get_property(dp, "model", NULL);
1101         if (!model)
1102                 model = of_get_property(dp, "compatible", NULL);
1103         if (model) {
1104                 for (i = 0; i < ARRAY_SIZE(pci_irq_trans_table); i++) {
1105                         struct irq_trans *t = &pci_irq_trans_table[i];
1106
1107                         if (!strcmp(model, t->name))
1108                                 return t->init(dp);
1109                 }
1110         }
1111 #endif
1112 #ifdef CONFIG_SBUS
1113         if (!strcmp(dp->name, "sbus") ||
1114             !strcmp(dp->name, "sbi"))
1115                 return sbus_irq_trans_init(dp);
1116 #endif
1117         if (!strcmp(dp->name, "fhc") &&
1118             !strcmp(dp->parent->name, "central"))
1119                 return central_irq_trans_init(dp);
1120         if (!strcmp(dp->name, "virtual-devices"))
1121                 return sun4v_vdev_irq_trans_init(dp);
1122 }
1123
1124 static int is_root_node(const struct device_node *dp)
1125 {
1126         if (!dp)
1127                 return 0;
1128
1129         return (dp->parent == NULL);
1130 }
1131
1132 /* The following routines deal with the black magic of fully naming a
1133  * node.
1134  *
1135  * Certain well known named nodes are just the simple name string.
1136  *
1137  * Actual devices have an address specifier appended to the base name
1138  * string, like this "foo@addr".  The "addr" can be in any number of
1139  * formats, and the platform plus the type of the node determine the
1140  * format and how it is constructed.
1141  *
1142  * For children of the ROOT node, the naming convention is fixed and
1143  * determined by whether this is a sun4u or sun4v system.
1144  *
1145  * For children of other nodes, it is bus type specific.  So
1146  * we walk up the tree until we discover a "device_type" property
1147  * we recognize and we go from there.
1148  *
1149  * As an example, the boot device on my workstation has a full path:
1150  *
1151  *      /pci@1e,600000/ide@d/disk@0,0:c
1152  */
1153 static void __init sun4v_path_component(struct device_node *dp, char *tmp_buf)
1154 {
1155         struct linux_prom64_registers *regs;
1156         struct property *rprop;
1157         u32 high_bits, low_bits, type;
1158
1159         rprop = of_find_property(dp, "reg", NULL);
1160         if (!rprop)
1161                 return;
1162
1163         regs = rprop->value;
1164         if (!is_root_node(dp->parent)) {
1165                 sprintf(tmp_buf, "%s@%x,%x",
1166                         dp->name,
1167                         (unsigned int) (regs->phys_addr >> 32UL),
1168                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1169                 return;
1170         }
1171
1172         type = regs->phys_addr >> 60UL;
1173         high_bits = (regs->phys_addr >> 32UL) & 0x0fffffffUL;
1174         low_bits = (regs->phys_addr & 0xffffffffUL);
1175
1176         if (type == 0 || type == 8) {
1177                 const char *prefix = (type == 0) ? "m" : "i";
1178
1179                 if (low_bits)
1180                         sprintf(tmp_buf, "%s@%s%x,%x",
1181                                 dp->name, prefix,
1182                                 high_bits, low_bits);
1183                 else
1184                         sprintf(tmp_buf, "%s@%s%x",
1185                                 dp->name,
1186                                 prefix,
1187                                 high_bits);
1188         } else if (type == 12) {
1189                 sprintf(tmp_buf, "%s@%x",
1190                         dp->name, high_bits);
1191         }
1192 }
1193
1194 static void __init sun4u_path_component(struct device_node *dp, char *tmp_buf)
1195 {
1196         struct linux_prom64_registers *regs;
1197         struct property *prop;
1198
1199         prop = of_find_property(dp, "reg", NULL);
1200         if (!prop)
1201                 return;
1202
1203         regs = prop->value;
1204         if (!is_root_node(dp->parent)) {
1205                 sprintf(tmp_buf, "%s@%x,%x",
1206                         dp->name,
1207                         (unsigned int) (regs->phys_addr >> 32UL),
1208                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1209                 return;
1210         }
1211
1212         prop = of_find_property(dp, "upa-portid", NULL);
1213         if (!prop)
1214                 prop = of_find_property(dp, "portid", NULL);
1215         if (prop) {
1216                 unsigned long mask = 0xffffffffUL;
1217
1218                 if (tlb_type >= cheetah)
1219                         mask = 0x7fffff;
1220
1221                 sprintf(tmp_buf, "%s@%x,%x",
1222                         dp->name,
1223                         *(u32 *)prop->value,
1224                         (unsigned int) (regs->phys_addr & mask));
1225         }
1226 }
1227
1228 /* "name@slot,offset"  */
1229 static void __init sbus_path_component(struct device_node *dp, char *tmp_buf)
1230 {
1231         struct linux_prom_registers *regs;
1232         struct property *prop;
1233
1234         prop = of_find_property(dp, "reg", NULL);
1235         if (!prop)
1236                 return;
1237
1238         regs = prop->value;
1239         sprintf(tmp_buf, "%s@%x,%x",
1240                 dp->name,
1241                 regs->which_io,
1242                 regs->phys_addr);
1243 }
1244
1245 /* "name@devnum[,func]" */
1246 static void __init pci_path_component(struct device_node *dp, char *tmp_buf)
1247 {
1248         struct linux_prom_pci_registers *regs;
1249         struct property *prop;
1250         unsigned int devfn;
1251
1252         prop = of_find_property(dp, "reg", NULL);
1253         if (!prop)
1254                 return;
1255
1256         regs = prop->value;
1257         devfn = (regs->phys_hi >> 8) & 0xff;
1258         if (devfn & 0x07) {
1259                 sprintf(tmp_buf, "%s@%x,%x",
1260                         dp->name,
1261                         devfn >> 3,
1262                         devfn & 0x07);
1263         } else {
1264                 sprintf(tmp_buf, "%s@%x",
1265                         dp->name,
1266                         devfn >> 3);
1267         }
1268 }
1269
1270 /* "name@UPA_PORTID,offset" */
1271 static void __init upa_path_component(struct device_node *dp, char *tmp_buf)
1272 {
1273         struct linux_prom64_registers *regs;
1274         struct property *prop;
1275
1276         prop = of_find_property(dp, "reg", NULL);
1277         if (!prop)
1278                 return;
1279
1280         regs = prop->value;
1281
1282         prop = of_find_property(dp, "upa-portid", NULL);
1283         if (!prop)
1284                 return;
1285
1286         sprintf(tmp_buf, "%s@%x,%x",
1287                 dp->name,
1288                 *(u32 *) prop->value,
1289                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1290 }
1291
1292 /* "name@reg" */
1293 static void __init vdev_path_component(struct device_node *dp, char *tmp_buf)
1294 {
1295         struct property *prop;
1296         u32 *regs;
1297
1298         prop = of_find_property(dp, "reg", NULL);
1299         if (!prop)
1300                 return;
1301
1302         regs = prop->value;
1303
1304         sprintf(tmp_buf, "%s@%x", dp->name, *regs);
1305 }
1306
1307 /* "name@addrhi,addrlo" */
1308 static void __init ebus_path_component(struct device_node *dp, char *tmp_buf)
1309 {
1310         struct linux_prom64_registers *regs;
1311         struct property *prop;
1312
1313         prop = of_find_property(dp, "reg", NULL);
1314         if (!prop)
1315                 return;
1316
1317         regs = prop->value;
1318
1319         sprintf(tmp_buf, "%s@%x,%x",
1320                 dp->name,
1321                 (unsigned int) (regs->phys_addr >> 32UL),
1322                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1323 }
1324
1325 /* "name@bus,addr" */
1326 static void __init i2c_path_component(struct device_node *dp, char *tmp_buf)
1327 {
1328         struct property *prop;
1329         u32 *regs;
1330
1331         prop = of_find_property(dp, "reg", NULL);
1332         if (!prop)
1333                 return;
1334
1335         regs = prop->value;
1336
1337         /* This actually isn't right... should look at the #address-cells
1338          * property of the i2c bus node etc. etc.
1339          */
1340         sprintf(tmp_buf, "%s@%x,%x",
1341                 dp->name, regs[0], regs[1]);
1342 }
1343
1344 /* "name@reg0[,reg1]" */
1345 static void __init usb_path_component(struct device_node *dp, char *tmp_buf)
1346 {
1347         struct property *prop;
1348         u32 *regs;
1349
1350         prop = of_find_property(dp, "reg", NULL);
1351         if (!prop)
1352                 return;
1353
1354         regs = prop->value;
1355
1356         if (prop->length == sizeof(u32) || regs[1] == 1) {
1357                 sprintf(tmp_buf, "%s@%x",
1358                         dp->name, regs[0]);
1359         } else {
1360                 sprintf(tmp_buf, "%s@%x,%x",
1361                         dp->name, regs[0], regs[1]);
1362         }
1363 }
1364
1365 /* "name@reg0reg1[,reg2reg3]" */
1366 static void __init ieee1394_path_component(struct device_node *dp, char *tmp_buf)
1367 {
1368         struct property *prop;
1369         u32 *regs;
1370
1371         prop = of_find_property(dp, "reg", NULL);
1372         if (!prop)
1373                 return;
1374
1375         regs = prop->value;
1376
1377         if (regs[2] || regs[3]) {
1378                 sprintf(tmp_buf, "%s@%08x%08x,%04x%08x",
1379                         dp->name, regs[0], regs[1], regs[2], regs[3]);
1380         } else {
1381                 sprintf(tmp_buf, "%s@%08x%08x",
1382                         dp->name, regs[0], regs[1]);
1383         }
1384 }
1385
1386 static void __init __build_path_component(struct device_node *dp, char *tmp_buf)
1387 {
1388         struct device_node *parent = dp->parent;
1389
1390         if (parent != NULL) {
1391                 if (!strcmp(parent->type, "pci") ||
1392                     !strcmp(parent->type, "pciex"))
1393                         return pci_path_component(dp, tmp_buf);
1394                 if (!strcmp(parent->type, "sbus"))
1395                         return sbus_path_component(dp, tmp_buf);
1396                 if (!strcmp(parent->type, "upa"))
1397                         return upa_path_component(dp, tmp_buf);
1398                 if (!strcmp(parent->type, "ebus"))
1399                         return ebus_path_component(dp, tmp_buf);
1400                 if (!strcmp(parent->name, "usb") ||
1401                     !strcmp(parent->name, "hub"))
1402                         return usb_path_component(dp, tmp_buf);
1403                 if (!strcmp(parent->type, "i2c"))
1404                         return i2c_path_component(dp, tmp_buf);
1405                 if (!strcmp(parent->type, "firewire"))
1406                         return ieee1394_path_component(dp, tmp_buf);
1407                 if (!strcmp(parent->type, "virtual-devices"))
1408                         return vdev_path_component(dp, tmp_buf);
1409
1410                 /* "isa" is handled with platform naming */
1411         }
1412
1413         /* Use platform naming convention.  */
1414         if (tlb_type == hypervisor)
1415                 return sun4v_path_component(dp, tmp_buf);
1416         else
1417                 return sun4u_path_component(dp, tmp_buf);
1418 }
1419
1420 static char * __init build_path_component(struct device_node *dp)
1421 {
1422         char tmp_buf[64], *n;
1423
1424         tmp_buf[0] = '\0';
1425         __build_path_component(dp, tmp_buf);
1426         if (tmp_buf[0] == '\0')
1427                 strcpy(tmp_buf, dp->name);
1428
1429         n = prom_early_alloc(strlen(tmp_buf) + 1);
1430         strcpy(n, tmp_buf);
1431
1432         return n;
1433 }
1434
1435 static char * __init build_full_name(struct device_node *dp)
1436 {
1437         int len, ourlen, plen;
1438         char *n;
1439
1440         plen = strlen(dp->parent->full_name);
1441         ourlen = strlen(dp->path_component_name);
1442         len = ourlen + plen + 2;
1443
1444         n = prom_early_alloc(len);
1445         strcpy(n, dp->parent->full_name);
1446         if (!is_root_node(dp->parent)) {
1447                 strcpy(n + plen, "/");
1448                 plen++;
1449         }
1450         strcpy(n + plen, dp->path_component_name);
1451
1452         return n;
1453 }
1454
1455 static unsigned int unique_id;
1456
1457 static struct property * __init build_one_prop(phandle node, char *prev, char *special_name, void *special_val, int special_len)
1458 {
1459         static struct property *tmp = NULL;
1460         struct property *p;
1461
1462         if (tmp) {
1463                 p = tmp;
1464                 memset(p, 0, sizeof(*p) + 32);
1465                 tmp = NULL;
1466         } else {
1467                 p = prom_early_alloc(sizeof(struct property) + 32);
1468                 p->unique_id = unique_id++;
1469         }
1470
1471         p->name = (char *) (p + 1);
1472         if (special_name) {
1473                 strcpy(p->name, special_name);
1474                 p->length = special_len;
1475                 p->value = prom_early_alloc(special_len);
1476                 memcpy(p->value, special_val, special_len);
1477         } else {
1478                 if (prev == NULL) {
1479                         prom_firstprop(node, p->name);
1480                 } else {
1481                         prom_nextprop(node, prev, p->name);
1482                 }
1483                 if (strlen(p->name) == 0) {
1484                         tmp = p;
1485                         return NULL;
1486                 }
1487                 p->length = prom_getproplen(node, p->name);
1488                 if (p->length <= 0) {
1489                         p->length = 0;
1490                 } else {
1491                         p->value = prom_early_alloc(p->length + 1);
1492                         prom_getproperty(node, p->name, p->value, p->length);
1493                         ((unsigned char *)p->value)[p->length] = '\0';
1494                 }
1495         }
1496         return p;
1497 }
1498
1499 static struct property * __init build_prop_list(phandle node)
1500 {
1501         struct property *head, *tail;
1502
1503         head = tail = build_one_prop(node, NULL,
1504                                      ".node", &node, sizeof(node));
1505
1506         tail->next = build_one_prop(node, NULL, NULL, NULL, 0);
1507         tail = tail->next;
1508         while(tail) {
1509                 tail->next = build_one_prop(node, tail->name,
1510                                             NULL, NULL, 0);
1511                 tail = tail->next;
1512         }
1513
1514         return head;
1515 }
1516
1517 static char * __init get_one_property(phandle node, const char *name)
1518 {
1519         char *buf = "<NULL>";
1520         int len;
1521
1522         len = prom_getproplen(node, name);
1523         if (len > 0) {
1524                 buf = prom_early_alloc(len);
1525                 prom_getproperty(node, name, buf, len);
1526         }
1527
1528         return buf;
1529 }
1530
1531 static struct device_node * __init create_node(phandle node, struct device_node *parent)
1532 {
1533         struct device_node *dp;
1534
1535         if (!node)
1536                 return NULL;
1537
1538         dp = prom_early_alloc(sizeof(*dp));
1539         dp->unique_id = unique_id++;
1540         dp->parent = parent;
1541
1542         kref_init(&dp->kref);
1543
1544         dp->name = get_one_property(node, "name");
1545         dp->type = get_one_property(node, "device_type");
1546         dp->node = node;
1547
1548         dp->properties = build_prop_list(node);
1549
1550         irq_trans_init(dp);
1551
1552         return dp;
1553 }
1554
1555 static struct device_node * __init build_tree(struct device_node *parent, phandle node, struct device_node ***nextp)
1556 {
1557         struct device_node *ret = NULL, *prev_sibling = NULL;
1558         struct device_node *dp;
1559
1560         while (1) {
1561                 dp = create_node(node, parent);
1562                 if (!dp)
1563                         break;
1564
1565                 if (prev_sibling)
1566                         prev_sibling->sibling = dp;
1567
1568                 if (!ret)
1569                         ret = dp;
1570                 prev_sibling = dp;
1571
1572                 *(*nextp) = dp;
1573                 *nextp = &dp->allnext;
1574
1575                 dp->path_component_name = build_path_component(dp);
1576                 dp->full_name = build_full_name(dp);
1577
1578                 dp->child = build_tree(dp, prom_getchild(node), nextp);
1579
1580                 node = prom_getsibling(node);
1581         }
1582
1583         return ret;
1584 }
1585
1586 static const char *get_mid_prop(void)
1587 {
1588         return (tlb_type == spitfire ? "upa-portid" : "portid");
1589 }
1590
1591 struct device_node *of_find_node_by_cpuid(int cpuid)
1592 {
1593         struct device_node *dp;
1594         const char *mid_prop = get_mid_prop();
1595
1596         for_each_node_by_type(dp, "cpu") {
1597                 int id = of_getintprop_default(dp, mid_prop, -1);
1598                 const char *this_mid_prop = mid_prop;
1599
1600                 if (id < 0) {
1601                         this_mid_prop = "cpuid";
1602                         id = of_getintprop_default(dp, this_mid_prop, -1);
1603                 }
1604
1605                 if (id < 0) {
1606                         prom_printf("OF: Serious problem, cpu lacks "
1607                                     "%s property", this_mid_prop);
1608                         prom_halt();
1609                 }
1610                 if (cpuid == id)
1611                         return dp;
1612         }
1613         return NULL;
1614 }
1615
1616 static void __init of_fill_in_cpu_data(void)
1617 {
1618         struct device_node *dp;
1619         const char *mid_prop = get_mid_prop();
1620
1621         ncpus_probed = 0;
1622         for_each_node_by_type(dp, "cpu") {
1623                 int cpuid = of_getintprop_default(dp, mid_prop, -1);
1624                 const char *this_mid_prop = mid_prop;
1625                 struct device_node *portid_parent;
1626                 int portid = -1;
1627
1628                 portid_parent = NULL;
1629                 if (cpuid < 0) {
1630                         this_mid_prop = "cpuid";
1631                         cpuid = of_getintprop_default(dp, this_mid_prop, -1);
1632                         if (cpuid >= 0) {
1633                                 int limit = 2;
1634
1635                                 portid_parent = dp;
1636                                 while (limit--) {
1637                                         portid_parent = portid_parent->parent;
1638                                         if (!portid_parent)
1639                                                 break;
1640                                         portid = of_getintprop_default(portid_parent,
1641                                                                        "portid", -1);
1642                                         if (portid >= 0)
1643                                                 break;
1644                                 }
1645                         }
1646                 }
1647
1648                 if (cpuid < 0) {
1649                         prom_printf("OF: Serious problem, cpu lacks "
1650                                     "%s property", this_mid_prop);
1651                         prom_halt();
1652                 }
1653
1654                 ncpus_probed++;
1655
1656 #ifdef CONFIG_SMP
1657                 if (cpuid >= NR_CPUS)
1658                         continue;
1659 #else
1660                 /* On uniprocessor we only want the values for the
1661                  * real physical cpu the kernel booted onto, however
1662                  * cpu_data() only has one entry at index 0.
1663                  */
1664                 if (cpuid != real_hard_smp_processor_id())
1665                         continue;
1666                 cpuid = 0;
1667 #endif
1668
1669                 cpu_data(cpuid).clock_tick =
1670                         of_getintprop_default(dp, "clock-frequency", 0);
1671
1672                 if (portid_parent) {
1673                         cpu_data(cpuid).dcache_size =
1674                                 of_getintprop_default(dp, "l1-dcache-size",
1675                                                       16 * 1024);
1676                         cpu_data(cpuid).dcache_line_size =
1677                                 of_getintprop_default(dp, "l1-dcache-line-size",
1678                                                       32);
1679                         cpu_data(cpuid).icache_size =
1680                                 of_getintprop_default(dp, "l1-icache-size",
1681                                                       8 * 1024);
1682                         cpu_data(cpuid).icache_line_size =
1683                                 of_getintprop_default(dp, "l1-icache-line-size",
1684                                                       32);
1685                         cpu_data(cpuid).ecache_size =
1686                                 of_getintprop_default(dp, "l2-cache-size", 0);
1687                         cpu_data(cpuid).ecache_line_size =
1688                                 of_getintprop_default(dp, "l2-cache-line-size", 0);
1689                         if (!cpu_data(cpuid).ecache_size ||
1690                             !cpu_data(cpuid).ecache_line_size) {
1691                                 cpu_data(cpuid).ecache_size =
1692                                         of_getintprop_default(portid_parent,
1693                                                               "l2-cache-size",
1694                                                               (4 * 1024 * 1024));
1695                                 cpu_data(cpuid).ecache_line_size =
1696                                         of_getintprop_default(portid_parent,
1697                                                               "l2-cache-line-size", 64);
1698                         }
1699
1700                         cpu_data(cpuid).core_id = portid + 1;
1701                         cpu_data(cpuid).proc_id = portid;
1702 #ifdef CONFIG_SMP
1703                         sparc64_multi_core = 1;
1704 #endif
1705                 } else {
1706                         cpu_data(cpuid).dcache_size =
1707                                 of_getintprop_default(dp, "dcache-size", 16 * 1024);
1708                         cpu_data(cpuid).dcache_line_size =
1709                                 of_getintprop_default(dp, "dcache-line-size", 32);
1710
1711                         cpu_data(cpuid).icache_size =
1712                                 of_getintprop_default(dp, "icache-size", 16 * 1024);
1713                         cpu_data(cpuid).icache_line_size =
1714                                 of_getintprop_default(dp, "icache-line-size", 32);
1715
1716                         cpu_data(cpuid).ecache_size =
1717                                 of_getintprop_default(dp, "ecache-size",
1718                                                       (4 * 1024 * 1024));
1719                         cpu_data(cpuid).ecache_line_size =
1720                                 of_getintprop_default(dp, "ecache-line-size", 64);
1721
1722                         cpu_data(cpuid).core_id = 0;
1723                         cpu_data(cpuid).proc_id = -1;
1724                 }
1725
1726 #ifdef CONFIG_SMP
1727                 cpu_set(cpuid, cpu_present_map);
1728                 cpu_set(cpuid, cpu_possible_map);
1729 #endif
1730         }
1731
1732         smp_fill_in_sib_core_maps();
1733 }
1734
1735 void __init prom_build_devicetree(void)
1736 {
1737         struct device_node **nextp;
1738
1739         allnodes = create_node(prom_root_node, NULL);
1740         allnodes->path_component_name = "";
1741         allnodes->full_name = "/";
1742
1743         nextp = &allnodes->allnext;
1744         allnodes->child = build_tree(allnodes,
1745                                      prom_getchild(allnodes->node),
1746                                      &nextp);
1747         printk("PROM: Built device tree with %u bytes of memory.\n",
1748                prom_early_allocated);
1749
1750         if (tlb_type != hypervisor)
1751                 of_fill_in_cpu_data();
1752 }