2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
24 #include "kvm_cache_regs.h"
27 #include <linux/kvm_host.h>
28 #include <linux/types.h>
29 #include <linux/string.h>
31 #include <linux/highmem.h>
32 #include <linux/module.h>
33 #include <linux/swap.h>
34 #include <linux/hugetlb.h>
35 #include <linux/compiler.h>
36 #include <linux/srcu.h>
37 #include <linux/slab.h>
38 #include <linux/uaccess.h>
41 #include <asm/cmpxchg.h>
46 * When setting this variable to true it enables Two-Dimensional-Paging
47 * where the hardware walks 2 page tables:
48 * 1. the guest-virtual to guest-physical
49 * 2. while doing 1. it walks guest-physical to host-physical
50 * If the hardware supports that we don't need to do shadow paging.
52 bool tdp_enabled = false;
56 AUDIT_POST_PAGE_FAULT,
67 module_param(dbg, bool, 0644);
69 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
70 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
71 #define MMU_WARN_ON(x) WARN_ON(x)
73 #define pgprintk(x...) do { } while (0)
74 #define rmap_printk(x...) do { } while (0)
75 #define MMU_WARN_ON(x) do { } while (0)
78 #define PTE_PREFETCH_NUM 8
80 #define PT_FIRST_AVAIL_BITS_SHIFT 10
81 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
83 #define PT64_LEVEL_BITS 9
85 #define PT64_LEVEL_SHIFT(level) \
86 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
88 #define PT64_INDEX(address, level)\
89 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
92 #define PT32_LEVEL_BITS 10
94 #define PT32_LEVEL_SHIFT(level) \
95 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
97 #define PT32_LVL_OFFSET_MASK(level) \
98 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
99 * PT32_LEVEL_BITS))) - 1))
101 #define PT32_INDEX(address, level)\
102 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
105 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
106 #define PT64_DIR_BASE_ADDR_MASK \
107 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
108 #define PT64_LVL_ADDR_MASK(level) \
109 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
110 * PT64_LEVEL_BITS))) - 1))
111 #define PT64_LVL_OFFSET_MASK(level) \
112 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
113 * PT64_LEVEL_BITS))) - 1))
115 #define PT32_BASE_ADDR_MASK PAGE_MASK
116 #define PT32_DIR_BASE_ADDR_MASK \
117 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
118 #define PT32_LVL_ADDR_MASK(level) \
119 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
120 * PT32_LEVEL_BITS))) - 1))
122 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | shadow_user_mask \
123 | shadow_x_mask | shadow_nx_mask)
125 #define ACC_EXEC_MASK 1
126 #define ACC_WRITE_MASK PT_WRITABLE_MASK
127 #define ACC_USER_MASK PT_USER_MASK
128 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
130 #include <trace/events/kvm.h>
132 #define CREATE_TRACE_POINTS
133 #include "mmutrace.h"
135 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
136 #define SPTE_MMU_WRITEABLE (1ULL << (PT_FIRST_AVAIL_BITS_SHIFT + 1))
138 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
140 /* make pte_list_desc fit well in cache line */
141 #define PTE_LIST_EXT 3
143 struct pte_list_desc {
144 u64 *sptes[PTE_LIST_EXT];
145 struct pte_list_desc *more;
148 struct kvm_shadow_walk_iterator {
156 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
157 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
158 shadow_walk_okay(&(_walker)); \
159 shadow_walk_next(&(_walker)))
161 #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \
162 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
163 shadow_walk_okay(&(_walker)) && \
164 ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \
165 __shadow_walk_next(&(_walker), spte))
167 static struct kmem_cache *pte_list_desc_cache;
168 static struct kmem_cache *mmu_page_header_cache;
169 static struct percpu_counter kvm_total_used_mmu_pages;
171 static u64 __read_mostly shadow_nx_mask;
172 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
173 static u64 __read_mostly shadow_user_mask;
174 static u64 __read_mostly shadow_accessed_mask;
175 static u64 __read_mostly shadow_dirty_mask;
176 static u64 __read_mostly shadow_mmio_mask;
178 static void mmu_spte_set(u64 *sptep, u64 spte);
179 static void mmu_free_roots(struct kvm_vcpu *vcpu);
181 void kvm_mmu_set_mmio_spte_mask(u64 mmio_mask)
183 shadow_mmio_mask = mmio_mask;
185 EXPORT_SYMBOL_GPL(kvm_mmu_set_mmio_spte_mask);
188 * the low bit of the generation number is always presumed to be zero.
189 * This disables mmio caching during memslot updates. The concept is
190 * similar to a seqcount but instead of retrying the access we just punt
191 * and ignore the cache.
193 * spte bits 3-11 are used as bits 1-9 of the generation number,
194 * the bits 52-61 are used as bits 10-19 of the generation number.
196 #define MMIO_SPTE_GEN_LOW_SHIFT 2
197 #define MMIO_SPTE_GEN_HIGH_SHIFT 52
199 #define MMIO_GEN_SHIFT 20
200 #define MMIO_GEN_LOW_SHIFT 10
201 #define MMIO_GEN_LOW_MASK ((1 << MMIO_GEN_LOW_SHIFT) - 2)
202 #define MMIO_GEN_MASK ((1 << MMIO_GEN_SHIFT) - 1)
204 static u64 generation_mmio_spte_mask(unsigned int gen)
208 WARN_ON(gen & ~MMIO_GEN_MASK);
210 mask = (gen & MMIO_GEN_LOW_MASK) << MMIO_SPTE_GEN_LOW_SHIFT;
211 mask |= ((u64)gen >> MMIO_GEN_LOW_SHIFT) << MMIO_SPTE_GEN_HIGH_SHIFT;
215 static unsigned int get_mmio_spte_generation(u64 spte)
219 spte &= ~shadow_mmio_mask;
221 gen = (spte >> MMIO_SPTE_GEN_LOW_SHIFT) & MMIO_GEN_LOW_MASK;
222 gen |= (spte >> MMIO_SPTE_GEN_HIGH_SHIFT) << MMIO_GEN_LOW_SHIFT;
226 static unsigned int kvm_current_mmio_generation(struct kvm *kvm)
228 return kvm_memslots(kvm)->generation & MMIO_GEN_MASK;
231 static void mark_mmio_spte(struct kvm *kvm, u64 *sptep, u64 gfn,
234 unsigned int gen = kvm_current_mmio_generation(kvm);
235 u64 mask = generation_mmio_spte_mask(gen);
237 access &= ACC_WRITE_MASK | ACC_USER_MASK;
238 mask |= shadow_mmio_mask | access | gfn << PAGE_SHIFT;
240 trace_mark_mmio_spte(sptep, gfn, access, gen);
241 mmu_spte_set(sptep, mask);
244 static bool is_mmio_spte(u64 spte)
246 return (spte & shadow_mmio_mask) == shadow_mmio_mask;
249 static gfn_t get_mmio_spte_gfn(u64 spte)
251 u64 mask = generation_mmio_spte_mask(MMIO_GEN_MASK) | shadow_mmio_mask;
252 return (spte & ~mask) >> PAGE_SHIFT;
255 static unsigned get_mmio_spte_access(u64 spte)
257 u64 mask = generation_mmio_spte_mask(MMIO_GEN_MASK) | shadow_mmio_mask;
258 return (spte & ~mask) & ~PAGE_MASK;
261 static bool set_mmio_spte(struct kvm *kvm, u64 *sptep, gfn_t gfn,
262 pfn_t pfn, unsigned access)
264 if (unlikely(is_noslot_pfn(pfn))) {
265 mark_mmio_spte(kvm, sptep, gfn, access);
272 static bool check_mmio_spte(struct kvm *kvm, u64 spte)
274 unsigned int kvm_gen, spte_gen;
276 kvm_gen = kvm_current_mmio_generation(kvm);
277 spte_gen = get_mmio_spte_generation(spte);
279 trace_check_mmio_spte(spte, kvm_gen, spte_gen);
280 return likely(kvm_gen == spte_gen);
283 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
284 u64 dirty_mask, u64 nx_mask, u64 x_mask)
286 shadow_user_mask = user_mask;
287 shadow_accessed_mask = accessed_mask;
288 shadow_dirty_mask = dirty_mask;
289 shadow_nx_mask = nx_mask;
290 shadow_x_mask = x_mask;
292 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
294 static int is_cpuid_PSE36(void)
299 static int is_nx(struct kvm_vcpu *vcpu)
301 return vcpu->arch.efer & EFER_NX;
304 static int is_shadow_present_pte(u64 pte)
306 return pte & PT_PRESENT_MASK && !is_mmio_spte(pte);
309 static int is_large_pte(u64 pte)
311 return pte & PT_PAGE_SIZE_MASK;
314 static int is_rmap_spte(u64 pte)
316 return is_shadow_present_pte(pte);
319 static int is_last_spte(u64 pte, int level)
321 if (level == PT_PAGE_TABLE_LEVEL)
323 if (is_large_pte(pte))
328 static pfn_t spte_to_pfn(u64 pte)
330 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
333 static gfn_t pse36_gfn_delta(u32 gpte)
335 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
337 return (gpte & PT32_DIR_PSE36_MASK) << shift;
341 static void __set_spte(u64 *sptep, u64 spte)
346 static void __update_clear_spte_fast(u64 *sptep, u64 spte)
351 static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
353 return xchg(sptep, spte);
356 static u64 __get_spte_lockless(u64 *sptep)
358 return ACCESS_ONCE(*sptep);
361 static bool __check_direct_spte_mmio_pf(u64 spte)
363 /* It is valid if the spte is zapped. */
375 static void count_spte_clear(u64 *sptep, u64 spte)
377 struct kvm_mmu_page *sp = page_header(__pa(sptep));
379 if (is_shadow_present_pte(spte))
382 /* Ensure the spte is completely set before we increase the count */
384 sp->clear_spte_count++;
387 static void __set_spte(u64 *sptep, u64 spte)
389 union split_spte *ssptep, sspte;
391 ssptep = (union split_spte *)sptep;
392 sspte = (union split_spte)spte;
394 ssptep->spte_high = sspte.spte_high;
397 * If we map the spte from nonpresent to present, We should store
398 * the high bits firstly, then set present bit, so cpu can not
399 * fetch this spte while we are setting the spte.
403 ssptep->spte_low = sspte.spte_low;
406 static void __update_clear_spte_fast(u64 *sptep, u64 spte)
408 union split_spte *ssptep, sspte;
410 ssptep = (union split_spte *)sptep;
411 sspte = (union split_spte)spte;
413 ssptep->spte_low = sspte.spte_low;
416 * If we map the spte from present to nonpresent, we should clear
417 * present bit firstly to avoid vcpu fetch the old high bits.
421 ssptep->spte_high = sspte.spte_high;
422 count_spte_clear(sptep, spte);
425 static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
427 union split_spte *ssptep, sspte, orig;
429 ssptep = (union split_spte *)sptep;
430 sspte = (union split_spte)spte;
432 /* xchg acts as a barrier before the setting of the high bits */
433 orig.spte_low = xchg(&ssptep->spte_low, sspte.spte_low);
434 orig.spte_high = ssptep->spte_high;
435 ssptep->spte_high = sspte.spte_high;
436 count_spte_clear(sptep, spte);
442 * The idea using the light way get the spte on x86_32 guest is from
443 * gup_get_pte(arch/x86/mm/gup.c).
445 * An spte tlb flush may be pending, because kvm_set_pte_rmapp
446 * coalesces them and we are running out of the MMU lock. Therefore
447 * we need to protect against in-progress updates of the spte.
449 * Reading the spte while an update is in progress may get the old value
450 * for the high part of the spte. The race is fine for a present->non-present
451 * change (because the high part of the spte is ignored for non-present spte),
452 * but for a present->present change we must reread the spte.
454 * All such changes are done in two steps (present->non-present and
455 * non-present->present), hence it is enough to count the number of
456 * present->non-present updates: if it changed while reading the spte,
457 * we might have hit the race. This is done using clear_spte_count.
459 static u64 __get_spte_lockless(u64 *sptep)
461 struct kvm_mmu_page *sp = page_header(__pa(sptep));
462 union split_spte spte, *orig = (union split_spte *)sptep;
466 count = sp->clear_spte_count;
469 spte.spte_low = orig->spte_low;
472 spte.spte_high = orig->spte_high;
475 if (unlikely(spte.spte_low != orig->spte_low ||
476 count != sp->clear_spte_count))
482 static bool __check_direct_spte_mmio_pf(u64 spte)
484 union split_spte sspte = (union split_spte)spte;
485 u32 high_mmio_mask = shadow_mmio_mask >> 32;
487 /* It is valid if the spte is zapped. */
491 /* It is valid if the spte is being zapped. */
492 if (sspte.spte_low == 0ull &&
493 (sspte.spte_high & high_mmio_mask) == high_mmio_mask)
500 static bool spte_is_locklessly_modifiable(u64 spte)
502 return (spte & (SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE)) ==
503 (SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE);
506 static bool spte_has_volatile_bits(u64 spte)
509 * Always atomicly update spte if it can be updated
510 * out of mmu-lock, it can ensure dirty bit is not lost,
511 * also, it can help us to get a stable is_writable_pte()
512 * to ensure tlb flush is not missed.
514 if (spte_is_locklessly_modifiable(spte))
517 if (!shadow_accessed_mask)
520 if (!is_shadow_present_pte(spte))
523 if ((spte & shadow_accessed_mask) &&
524 (!is_writable_pte(spte) || (spte & shadow_dirty_mask)))
530 static bool spte_is_bit_cleared(u64 old_spte, u64 new_spte, u64 bit_mask)
532 return (old_spte & bit_mask) && !(new_spte & bit_mask);
535 static bool spte_is_bit_changed(u64 old_spte, u64 new_spte, u64 bit_mask)
537 return (old_spte & bit_mask) != (new_spte & bit_mask);
540 /* Rules for using mmu_spte_set:
541 * Set the sptep from nonpresent to present.
542 * Note: the sptep being assigned *must* be either not present
543 * or in a state where the hardware will not attempt to update
546 static void mmu_spte_set(u64 *sptep, u64 new_spte)
548 WARN_ON(is_shadow_present_pte(*sptep));
549 __set_spte(sptep, new_spte);
552 /* Rules for using mmu_spte_update:
553 * Update the state bits, it means the mapped pfn is not changged.
555 * Whenever we overwrite a writable spte with a read-only one we
556 * should flush remote TLBs. Otherwise rmap_write_protect
557 * will find a read-only spte, even though the writable spte
558 * might be cached on a CPU's TLB, the return value indicates this
561 static bool mmu_spte_update(u64 *sptep, u64 new_spte)
563 u64 old_spte = *sptep;
566 WARN_ON(!is_rmap_spte(new_spte));
568 if (!is_shadow_present_pte(old_spte)) {
569 mmu_spte_set(sptep, new_spte);
573 if (!spte_has_volatile_bits(old_spte))
574 __update_clear_spte_fast(sptep, new_spte);
576 old_spte = __update_clear_spte_slow(sptep, new_spte);
579 * For the spte updated out of mmu-lock is safe, since
580 * we always atomicly update it, see the comments in
581 * spte_has_volatile_bits().
583 if (spte_is_locklessly_modifiable(old_spte) &&
584 !is_writable_pte(new_spte))
587 if (!shadow_accessed_mask)
591 * Flush TLB when accessed/dirty bits are changed in the page tables,
592 * to guarantee consistency between TLB and page tables.
594 if (spte_is_bit_changed(old_spte, new_spte,
595 shadow_accessed_mask | shadow_dirty_mask))
598 if (spte_is_bit_cleared(old_spte, new_spte, shadow_accessed_mask))
599 kvm_set_pfn_accessed(spte_to_pfn(old_spte));
600 if (spte_is_bit_cleared(old_spte, new_spte, shadow_dirty_mask))
601 kvm_set_pfn_dirty(spte_to_pfn(old_spte));
607 * Rules for using mmu_spte_clear_track_bits:
608 * It sets the sptep from present to nonpresent, and track the
609 * state bits, it is used to clear the last level sptep.
611 static int mmu_spte_clear_track_bits(u64 *sptep)
614 u64 old_spte = *sptep;
616 if (!spte_has_volatile_bits(old_spte))
617 __update_clear_spte_fast(sptep, 0ull);
619 old_spte = __update_clear_spte_slow(sptep, 0ull);
621 if (!is_rmap_spte(old_spte))
624 pfn = spte_to_pfn(old_spte);
627 * KVM does not hold the refcount of the page used by
628 * kvm mmu, before reclaiming the page, we should
629 * unmap it from mmu first.
631 WARN_ON(!kvm_is_reserved_pfn(pfn) && !page_count(pfn_to_page(pfn)));
633 if (!shadow_accessed_mask || old_spte & shadow_accessed_mask)
634 kvm_set_pfn_accessed(pfn);
635 if (!shadow_dirty_mask || (old_spte & shadow_dirty_mask))
636 kvm_set_pfn_dirty(pfn);
641 * Rules for using mmu_spte_clear_no_track:
642 * Directly clear spte without caring the state bits of sptep,
643 * it is used to set the upper level spte.
645 static void mmu_spte_clear_no_track(u64 *sptep)
647 __update_clear_spte_fast(sptep, 0ull);
650 static u64 mmu_spte_get_lockless(u64 *sptep)
652 return __get_spte_lockless(sptep);
655 static void walk_shadow_page_lockless_begin(struct kvm_vcpu *vcpu)
658 * Prevent page table teardown by making any free-er wait during
659 * kvm_flush_remote_tlbs() IPI to all active vcpus.
662 vcpu->mode = READING_SHADOW_PAGE_TABLES;
664 * Make sure a following spte read is not reordered ahead of the write
670 static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu)
673 * Make sure the write to vcpu->mode is not reordered in front of
674 * reads to sptes. If it does, kvm_commit_zap_page() can see us
675 * OUTSIDE_GUEST_MODE and proceed to free the shadow page table.
678 vcpu->mode = OUTSIDE_GUEST_MODE;
682 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
683 struct kmem_cache *base_cache, int min)
687 if (cache->nobjs >= min)
689 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
690 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
693 cache->objects[cache->nobjs++] = obj;
698 static int mmu_memory_cache_free_objects(struct kvm_mmu_memory_cache *cache)
703 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
704 struct kmem_cache *cache)
707 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
710 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
715 if (cache->nobjs >= min)
717 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
718 page = (void *)__get_free_page(GFP_KERNEL);
721 cache->objects[cache->nobjs++] = page;
726 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
729 free_page((unsigned long)mc->objects[--mc->nobjs]);
732 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
736 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache,
737 pte_list_desc_cache, 8 + PTE_PREFETCH_NUM);
740 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
743 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
744 mmu_page_header_cache, 4);
749 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
751 mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache,
752 pte_list_desc_cache);
753 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
754 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
755 mmu_page_header_cache);
758 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc)
763 p = mc->objects[--mc->nobjs];
767 static struct pte_list_desc *mmu_alloc_pte_list_desc(struct kvm_vcpu *vcpu)
769 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_list_desc_cache);
772 static void mmu_free_pte_list_desc(struct pte_list_desc *pte_list_desc)
774 kmem_cache_free(pte_list_desc_cache, pte_list_desc);
777 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
779 if (!sp->role.direct)
780 return sp->gfns[index];
782 return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
785 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
788 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
790 sp->gfns[index] = gfn;
794 * Return the pointer to the large page information for a given gfn,
795 * handling slots that are not large page aligned.
797 static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn,
798 struct kvm_memory_slot *slot,
803 idx = gfn_to_index(gfn, slot->base_gfn, level);
804 return &slot->arch.lpage_info[level - 2][idx];
807 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
809 struct kvm_memory_slot *slot;
810 struct kvm_lpage_info *linfo;
813 slot = gfn_to_memslot(kvm, gfn);
814 for (i = PT_DIRECTORY_LEVEL; i <= PT_MAX_HUGEPAGE_LEVEL; ++i) {
815 linfo = lpage_info_slot(gfn, slot, i);
816 linfo->write_count += 1;
818 kvm->arch.indirect_shadow_pages++;
821 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
823 struct kvm_memory_slot *slot;
824 struct kvm_lpage_info *linfo;
827 slot = gfn_to_memslot(kvm, gfn);
828 for (i = PT_DIRECTORY_LEVEL; i <= PT_MAX_HUGEPAGE_LEVEL; ++i) {
829 linfo = lpage_info_slot(gfn, slot, i);
830 linfo->write_count -= 1;
831 WARN_ON(linfo->write_count < 0);
833 kvm->arch.indirect_shadow_pages--;
836 static int has_wrprotected_page(struct kvm *kvm,
840 struct kvm_memory_slot *slot;
841 struct kvm_lpage_info *linfo;
843 slot = gfn_to_memslot(kvm, gfn);
845 linfo = lpage_info_slot(gfn, slot, level);
846 return linfo->write_count;
852 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
854 unsigned long page_size;
857 page_size = kvm_host_page_size(kvm, gfn);
859 for (i = PT_PAGE_TABLE_LEVEL; i <= PT_MAX_HUGEPAGE_LEVEL; ++i) {
860 if (page_size >= KVM_HPAGE_SIZE(i))
869 static struct kvm_memory_slot *
870 gfn_to_memslot_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t gfn,
873 struct kvm_memory_slot *slot;
875 slot = gfn_to_memslot(vcpu->kvm, gfn);
876 if (!slot || slot->flags & KVM_MEMSLOT_INVALID ||
877 (no_dirty_log && slot->dirty_bitmap))
883 static bool mapping_level_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t large_gfn)
885 return !gfn_to_memslot_dirty_bitmap(vcpu, large_gfn, true);
888 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
890 int host_level, level, max_level;
892 host_level = host_mapping_level(vcpu->kvm, large_gfn);
894 if (host_level == PT_PAGE_TABLE_LEVEL)
897 max_level = min(kvm_x86_ops->get_lpage_level(), host_level);
899 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
900 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
907 * Pte mapping structures:
909 * If pte_list bit zero is zero, then pte_list point to the spte.
911 * If pte_list bit zero is one, (then pte_list & ~1) points to a struct
912 * pte_list_desc containing more mappings.
914 * Returns the number of pte entries before the spte was added or zero if
915 * the spte was not added.
918 static int pte_list_add(struct kvm_vcpu *vcpu, u64 *spte,
919 unsigned long *pte_list)
921 struct pte_list_desc *desc;
925 rmap_printk("pte_list_add: %p %llx 0->1\n", spte, *spte);
926 *pte_list = (unsigned long)spte;
927 } else if (!(*pte_list & 1)) {
928 rmap_printk("pte_list_add: %p %llx 1->many\n", spte, *spte);
929 desc = mmu_alloc_pte_list_desc(vcpu);
930 desc->sptes[0] = (u64 *)*pte_list;
931 desc->sptes[1] = spte;
932 *pte_list = (unsigned long)desc | 1;
935 rmap_printk("pte_list_add: %p %llx many->many\n", spte, *spte);
936 desc = (struct pte_list_desc *)(*pte_list & ~1ul);
937 while (desc->sptes[PTE_LIST_EXT-1] && desc->more) {
939 count += PTE_LIST_EXT;
941 if (desc->sptes[PTE_LIST_EXT-1]) {
942 desc->more = mmu_alloc_pte_list_desc(vcpu);
945 for (i = 0; desc->sptes[i]; ++i)
947 desc->sptes[i] = spte;
953 pte_list_desc_remove_entry(unsigned long *pte_list, struct pte_list_desc *desc,
954 int i, struct pte_list_desc *prev_desc)
958 for (j = PTE_LIST_EXT - 1; !desc->sptes[j] && j > i; --j)
960 desc->sptes[i] = desc->sptes[j];
961 desc->sptes[j] = NULL;
964 if (!prev_desc && !desc->more)
965 *pte_list = (unsigned long)desc->sptes[0];
968 prev_desc->more = desc->more;
970 *pte_list = (unsigned long)desc->more | 1;
971 mmu_free_pte_list_desc(desc);
974 static void pte_list_remove(u64 *spte, unsigned long *pte_list)
976 struct pte_list_desc *desc;
977 struct pte_list_desc *prev_desc;
981 printk(KERN_ERR "pte_list_remove: %p 0->BUG\n", spte);
983 } else if (!(*pte_list & 1)) {
984 rmap_printk("pte_list_remove: %p 1->0\n", spte);
985 if ((u64 *)*pte_list != spte) {
986 printk(KERN_ERR "pte_list_remove: %p 1->BUG\n", spte);
991 rmap_printk("pte_list_remove: %p many->many\n", spte);
992 desc = (struct pte_list_desc *)(*pte_list & ~1ul);
995 for (i = 0; i < PTE_LIST_EXT && desc->sptes[i]; ++i)
996 if (desc->sptes[i] == spte) {
997 pte_list_desc_remove_entry(pte_list,
1005 pr_err("pte_list_remove: %p many->many\n", spte);
1010 typedef void (*pte_list_walk_fn) (u64 *spte);
1011 static void pte_list_walk(unsigned long *pte_list, pte_list_walk_fn fn)
1013 struct pte_list_desc *desc;
1019 if (!(*pte_list & 1))
1020 return fn((u64 *)*pte_list);
1022 desc = (struct pte_list_desc *)(*pte_list & ~1ul);
1024 for (i = 0; i < PTE_LIST_EXT && desc->sptes[i]; ++i)
1030 static unsigned long *__gfn_to_rmap(gfn_t gfn, int level,
1031 struct kvm_memory_slot *slot)
1035 idx = gfn_to_index(gfn, slot->base_gfn, level);
1036 return &slot->arch.rmap[level - PT_PAGE_TABLE_LEVEL][idx];
1040 * Take gfn and return the reverse mapping to it.
1042 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
1044 struct kvm_memory_slot *slot;
1046 slot = gfn_to_memslot(kvm, gfn);
1047 return __gfn_to_rmap(gfn, level, slot);
1050 static bool rmap_can_add(struct kvm_vcpu *vcpu)
1052 struct kvm_mmu_memory_cache *cache;
1054 cache = &vcpu->arch.mmu_pte_list_desc_cache;
1055 return mmu_memory_cache_free_objects(cache);
1058 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
1060 struct kvm_mmu_page *sp;
1061 unsigned long *rmapp;
1063 sp = page_header(__pa(spte));
1064 kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
1065 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
1066 return pte_list_add(vcpu, spte, rmapp);
1069 static void rmap_remove(struct kvm *kvm, u64 *spte)
1071 struct kvm_mmu_page *sp;
1073 unsigned long *rmapp;
1075 sp = page_header(__pa(spte));
1076 gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
1077 rmapp = gfn_to_rmap(kvm, gfn, sp->role.level);
1078 pte_list_remove(spte, rmapp);
1082 * Used by the following functions to iterate through the sptes linked by a
1083 * rmap. All fields are private and not assumed to be used outside.
1085 struct rmap_iterator {
1086 /* private fields */
1087 struct pte_list_desc *desc; /* holds the sptep if not NULL */
1088 int pos; /* index of the sptep */
1092 * Iteration must be started by this function. This should also be used after
1093 * removing/dropping sptes from the rmap link because in such cases the
1094 * information in the itererator may not be valid.
1096 * Returns sptep if found, NULL otherwise.
1098 static u64 *rmap_get_first(unsigned long rmap, struct rmap_iterator *iter)
1108 iter->desc = (struct pte_list_desc *)(rmap & ~1ul);
1110 return iter->desc->sptes[iter->pos];
1114 * Must be used with a valid iterator: e.g. after rmap_get_first().
1116 * Returns sptep if found, NULL otherwise.
1118 static u64 *rmap_get_next(struct rmap_iterator *iter)
1121 if (iter->pos < PTE_LIST_EXT - 1) {
1125 sptep = iter->desc->sptes[iter->pos];
1130 iter->desc = iter->desc->more;
1134 /* desc->sptes[0] cannot be NULL */
1135 return iter->desc->sptes[iter->pos];
1142 #define for_each_rmap_spte(_rmap_, _iter_, _spte_) \
1143 for (_spte_ = rmap_get_first(*_rmap_, _iter_); \
1144 _spte_ && ({BUG_ON(!is_shadow_present_pte(*_spte_)); 1;}); \
1145 _spte_ = rmap_get_next(_iter_))
1147 static void drop_spte(struct kvm *kvm, u64 *sptep)
1149 if (mmu_spte_clear_track_bits(sptep))
1150 rmap_remove(kvm, sptep);
1154 static bool __drop_large_spte(struct kvm *kvm, u64 *sptep)
1156 if (is_large_pte(*sptep)) {
1157 WARN_ON(page_header(__pa(sptep))->role.level ==
1158 PT_PAGE_TABLE_LEVEL);
1159 drop_spte(kvm, sptep);
1167 static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep)
1169 if (__drop_large_spte(vcpu->kvm, sptep))
1170 kvm_flush_remote_tlbs(vcpu->kvm);
1174 * Write-protect on the specified @sptep, @pt_protect indicates whether
1175 * spte write-protection is caused by protecting shadow page table.
1177 * Note: write protection is difference between dirty logging and spte
1179 * - for dirty logging, the spte can be set to writable at anytime if
1180 * its dirty bitmap is properly set.
1181 * - for spte protection, the spte can be writable only after unsync-ing
1184 * Return true if tlb need be flushed.
1186 static bool spte_write_protect(struct kvm *kvm, u64 *sptep, bool pt_protect)
1190 if (!is_writable_pte(spte) &&
1191 !(pt_protect && spte_is_locklessly_modifiable(spte)))
1194 rmap_printk("rmap_write_protect: spte %p %llx\n", sptep, *sptep);
1197 spte &= ~SPTE_MMU_WRITEABLE;
1198 spte = spte & ~PT_WRITABLE_MASK;
1200 return mmu_spte_update(sptep, spte);
1203 static bool __rmap_write_protect(struct kvm *kvm, unsigned long *rmapp,
1207 struct rmap_iterator iter;
1210 for_each_rmap_spte(rmapp, &iter, sptep)
1211 flush |= spte_write_protect(kvm, sptep, pt_protect);
1216 static bool spte_clear_dirty(struct kvm *kvm, u64 *sptep)
1220 rmap_printk("rmap_clear_dirty: spte %p %llx\n", sptep, *sptep);
1222 spte &= ~shadow_dirty_mask;
1224 return mmu_spte_update(sptep, spte);
1227 static bool __rmap_clear_dirty(struct kvm *kvm, unsigned long *rmapp)
1230 struct rmap_iterator iter;
1233 for_each_rmap_spte(rmapp, &iter, sptep)
1234 flush |= spte_clear_dirty(kvm, sptep);
1239 static bool spte_set_dirty(struct kvm *kvm, u64 *sptep)
1243 rmap_printk("rmap_set_dirty: spte %p %llx\n", sptep, *sptep);
1245 spte |= shadow_dirty_mask;
1247 return mmu_spte_update(sptep, spte);
1250 static bool __rmap_set_dirty(struct kvm *kvm, unsigned long *rmapp)
1253 struct rmap_iterator iter;
1256 for_each_rmap_spte(rmapp, &iter, sptep)
1257 flush |= spte_set_dirty(kvm, sptep);
1263 * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages
1264 * @kvm: kvm instance
1265 * @slot: slot to protect
1266 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1267 * @mask: indicates which pages we should protect
1269 * Used when we do not need to care about huge page mappings: e.g. during dirty
1270 * logging we do not have any such mappings.
1272 static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
1273 struct kvm_memory_slot *slot,
1274 gfn_t gfn_offset, unsigned long mask)
1276 unsigned long *rmapp;
1279 rmapp = __gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask),
1280 PT_PAGE_TABLE_LEVEL, slot);
1281 __rmap_write_protect(kvm, rmapp, false);
1283 /* clear the first set bit */
1289 * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages
1290 * @kvm: kvm instance
1291 * @slot: slot to clear D-bit
1292 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1293 * @mask: indicates which pages we should clear D-bit
1295 * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap.
1297 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,
1298 struct kvm_memory_slot *slot,
1299 gfn_t gfn_offset, unsigned long mask)
1301 unsigned long *rmapp;
1304 rmapp = __gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask),
1305 PT_PAGE_TABLE_LEVEL, slot);
1306 __rmap_clear_dirty(kvm, rmapp);
1308 /* clear the first set bit */
1312 EXPORT_SYMBOL_GPL(kvm_mmu_clear_dirty_pt_masked);
1315 * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
1318 * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
1319 * enable dirty logging for them.
1321 * Used when we do not need to care about huge page mappings: e.g. during dirty
1322 * logging we do not have any such mappings.
1324 void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,
1325 struct kvm_memory_slot *slot,
1326 gfn_t gfn_offset, unsigned long mask)
1328 if (kvm_x86_ops->enable_log_dirty_pt_masked)
1329 kvm_x86_ops->enable_log_dirty_pt_masked(kvm, slot, gfn_offset,
1332 kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask);
1335 static bool rmap_write_protect(struct kvm *kvm, u64 gfn)
1337 struct kvm_memory_slot *slot;
1338 unsigned long *rmapp;
1340 bool write_protected = false;
1342 slot = gfn_to_memslot(kvm, gfn);
1344 for (i = PT_PAGE_TABLE_LEVEL; i <= PT_MAX_HUGEPAGE_LEVEL; ++i) {
1345 rmapp = __gfn_to_rmap(gfn, i, slot);
1346 write_protected |= __rmap_write_protect(kvm, rmapp, true);
1349 return write_protected;
1352 static bool kvm_zap_rmapp(struct kvm *kvm, unsigned long *rmapp)
1355 struct rmap_iterator iter;
1358 while ((sptep = rmap_get_first(*rmapp, &iter))) {
1359 BUG_ON(!(*sptep & PT_PRESENT_MASK));
1360 rmap_printk("%s: spte %p %llx.\n", __func__, sptep, *sptep);
1362 drop_spte(kvm, sptep);
1369 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
1370 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1373 return kvm_zap_rmapp(kvm, rmapp);
1376 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
1377 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1381 struct rmap_iterator iter;
1384 pte_t *ptep = (pte_t *)data;
1387 WARN_ON(pte_huge(*ptep));
1388 new_pfn = pte_pfn(*ptep);
1391 for_each_rmap_spte(rmapp, &iter, sptep) {
1392 rmap_printk("kvm_set_pte_rmapp: spte %p %llx gfn %llx (%d)\n",
1393 sptep, *sptep, gfn, level);
1397 if (pte_write(*ptep)) {
1398 drop_spte(kvm, sptep);
1401 new_spte = *sptep & ~PT64_BASE_ADDR_MASK;
1402 new_spte |= (u64)new_pfn << PAGE_SHIFT;
1404 new_spte &= ~PT_WRITABLE_MASK;
1405 new_spte &= ~SPTE_HOST_WRITEABLE;
1406 new_spte &= ~shadow_accessed_mask;
1408 mmu_spte_clear_track_bits(sptep);
1409 mmu_spte_set(sptep, new_spte);
1414 kvm_flush_remote_tlbs(kvm);
1419 struct slot_rmap_walk_iterator {
1421 struct kvm_memory_slot *slot;
1427 /* output fields. */
1429 unsigned long *rmap;
1432 /* private field. */
1433 unsigned long *end_rmap;
1437 rmap_walk_init_level(struct slot_rmap_walk_iterator *iterator, int level)
1439 iterator->level = level;
1440 iterator->gfn = iterator->start_gfn;
1441 iterator->rmap = __gfn_to_rmap(iterator->gfn, level, iterator->slot);
1442 iterator->end_rmap = __gfn_to_rmap(iterator->end_gfn, level,
1447 slot_rmap_walk_init(struct slot_rmap_walk_iterator *iterator,
1448 struct kvm_memory_slot *slot, int start_level,
1449 int end_level, gfn_t start_gfn, gfn_t end_gfn)
1451 iterator->slot = slot;
1452 iterator->start_level = start_level;
1453 iterator->end_level = end_level;
1454 iterator->start_gfn = start_gfn;
1455 iterator->end_gfn = end_gfn;
1457 rmap_walk_init_level(iterator, iterator->start_level);
1460 static bool slot_rmap_walk_okay(struct slot_rmap_walk_iterator *iterator)
1462 return !!iterator->rmap;
1465 static void slot_rmap_walk_next(struct slot_rmap_walk_iterator *iterator)
1467 if (++iterator->rmap <= iterator->end_rmap) {
1468 iterator->gfn += (1UL << KVM_HPAGE_GFN_SHIFT(iterator->level));
1472 if (++iterator->level > iterator->end_level) {
1473 iterator->rmap = NULL;
1477 rmap_walk_init_level(iterator, iterator->level);
1480 #define for_each_slot_rmap_range(_slot_, _start_level_, _end_level_, \
1481 _start_gfn, _end_gfn, _iter_) \
1482 for (slot_rmap_walk_init(_iter_, _slot_, _start_level_, \
1483 _end_level_, _start_gfn, _end_gfn); \
1484 slot_rmap_walk_okay(_iter_); \
1485 slot_rmap_walk_next(_iter_))
1487 static int kvm_handle_hva_range(struct kvm *kvm,
1488 unsigned long start,
1491 int (*handler)(struct kvm *kvm,
1492 unsigned long *rmapp,
1493 struct kvm_memory_slot *slot,
1496 unsigned long data))
1498 struct kvm_memslots *slots;
1499 struct kvm_memory_slot *memslot;
1500 struct slot_rmap_walk_iterator iterator;
1503 slots = kvm_memslots(kvm);
1505 kvm_for_each_memslot(memslot, slots) {
1506 unsigned long hva_start, hva_end;
1507 gfn_t gfn_start, gfn_end;
1509 hva_start = max(start, memslot->userspace_addr);
1510 hva_end = min(end, memslot->userspace_addr +
1511 (memslot->npages << PAGE_SHIFT));
1512 if (hva_start >= hva_end)
1515 * {gfn(page) | page intersects with [hva_start, hva_end)} =
1516 * {gfn_start, gfn_start+1, ..., gfn_end-1}.
1518 gfn_start = hva_to_gfn_memslot(hva_start, memslot);
1519 gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot);
1521 for_each_slot_rmap_range(memslot, PT_PAGE_TABLE_LEVEL,
1522 PT_MAX_HUGEPAGE_LEVEL, gfn_start, gfn_end - 1,
1524 ret |= handler(kvm, iterator.rmap, memslot,
1525 iterator.gfn, iterator.level, data);
1531 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
1533 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
1534 struct kvm_memory_slot *slot,
1535 gfn_t gfn, int level,
1536 unsigned long data))
1538 return kvm_handle_hva_range(kvm, hva, hva + 1, data, handler);
1541 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
1543 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
1546 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
1548 return kvm_handle_hva_range(kvm, start, end, 0, kvm_unmap_rmapp);
1551 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
1553 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
1556 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
1557 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1561 struct rmap_iterator uninitialized_var(iter);
1564 BUG_ON(!shadow_accessed_mask);
1566 for_each_rmap_spte(rmapp, &iter, sptep)
1567 if (*sptep & shadow_accessed_mask) {
1569 clear_bit((ffs(shadow_accessed_mask) - 1),
1570 (unsigned long *)sptep);
1573 trace_kvm_age_page(gfn, level, slot, young);
1577 static int kvm_test_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
1578 struct kvm_memory_slot *slot, gfn_t gfn,
1579 int level, unsigned long data)
1582 struct rmap_iterator iter;
1586 * If there's no access bit in the secondary pte set by the
1587 * hardware it's up to gup-fast/gup to set the access bit in
1588 * the primary pte or in the page structure.
1590 if (!shadow_accessed_mask)
1593 for_each_rmap_spte(rmapp, &iter, sptep)
1594 if (*sptep & shadow_accessed_mask) {
1602 #define RMAP_RECYCLE_THRESHOLD 1000
1604 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
1606 unsigned long *rmapp;
1607 struct kvm_mmu_page *sp;
1609 sp = page_header(__pa(spte));
1611 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
1613 kvm_unmap_rmapp(vcpu->kvm, rmapp, NULL, gfn, sp->role.level, 0);
1614 kvm_flush_remote_tlbs(vcpu->kvm);
1617 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
1620 * In case of absence of EPT Access and Dirty Bits supports,
1621 * emulate the accessed bit for EPT, by checking if this page has
1622 * an EPT mapping, and clearing it if it does. On the next access,
1623 * a new EPT mapping will be established.
1624 * This has some overhead, but not as much as the cost of swapping
1625 * out actively used pages or breaking up actively used hugepages.
1627 if (!shadow_accessed_mask) {
1629 * We are holding the kvm->mmu_lock, and we are blowing up
1630 * shadow PTEs. MMU notifier consumers need to be kept at bay.
1631 * This is correct as long as we don't decouple the mmu_lock
1632 * protected regions (like invalidate_range_start|end does).
1634 kvm->mmu_notifier_seq++;
1635 return kvm_handle_hva_range(kvm, start, end, 0,
1639 return kvm_handle_hva_range(kvm, start, end, 0, kvm_age_rmapp);
1642 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
1644 return kvm_handle_hva(kvm, hva, 0, kvm_test_age_rmapp);
1648 static int is_empty_shadow_page(u64 *spt)
1653 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
1654 if (is_shadow_present_pte(*pos)) {
1655 printk(KERN_ERR "%s: %p %llx\n", __func__,
1664 * This value is the sum of all of the kvm instances's
1665 * kvm->arch.n_used_mmu_pages values. We need a global,
1666 * aggregate version in order to make the slab shrinker
1669 static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, int nr)
1671 kvm->arch.n_used_mmu_pages += nr;
1672 percpu_counter_add(&kvm_total_used_mmu_pages, nr);
1675 static void kvm_mmu_free_page(struct kvm_mmu_page *sp)
1677 MMU_WARN_ON(!is_empty_shadow_page(sp->spt));
1678 hlist_del(&sp->hash_link);
1679 list_del(&sp->link);
1680 free_page((unsigned long)sp->spt);
1681 if (!sp->role.direct)
1682 free_page((unsigned long)sp->gfns);
1683 kmem_cache_free(mmu_page_header_cache, sp);
1686 static unsigned kvm_page_table_hashfn(gfn_t gfn)
1688 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
1691 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
1692 struct kvm_mmu_page *sp, u64 *parent_pte)
1697 pte_list_add(vcpu, parent_pte, &sp->parent_ptes);
1700 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1703 pte_list_remove(parent_pte, &sp->parent_ptes);
1706 static void drop_parent_pte(struct kvm_mmu_page *sp,
1709 mmu_page_remove_parent_pte(sp, parent_pte);
1710 mmu_spte_clear_no_track(parent_pte);
1713 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
1714 u64 *parent_pte, int direct)
1716 struct kvm_mmu_page *sp;
1718 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache);
1719 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache);
1721 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache);
1722 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
1725 * The active_mmu_pages list is the FIFO list, do not move the
1726 * page until it is zapped. kvm_zap_obsolete_pages depends on
1727 * this feature. See the comments in kvm_zap_obsolete_pages().
1729 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
1730 sp->parent_ptes = 0;
1731 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1732 kvm_mod_used_mmu_pages(vcpu->kvm, +1);
1736 static void mark_unsync(u64 *spte);
1737 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1739 pte_list_walk(&sp->parent_ptes, mark_unsync);
1742 static void mark_unsync(u64 *spte)
1744 struct kvm_mmu_page *sp;
1747 sp = page_header(__pa(spte));
1748 index = spte - sp->spt;
1749 if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1751 if (sp->unsync_children++)
1753 kvm_mmu_mark_parents_unsync(sp);
1756 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1757 struct kvm_mmu_page *sp)
1762 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1766 static void nonpaging_update_pte(struct kvm_vcpu *vcpu,
1767 struct kvm_mmu_page *sp, u64 *spte,
1773 #define KVM_PAGE_ARRAY_NR 16
1775 struct kvm_mmu_pages {
1776 struct mmu_page_and_offset {
1777 struct kvm_mmu_page *sp;
1779 } page[KVM_PAGE_ARRAY_NR];
1783 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1789 for (i=0; i < pvec->nr; i++)
1790 if (pvec->page[i].sp == sp)
1793 pvec->page[pvec->nr].sp = sp;
1794 pvec->page[pvec->nr].idx = idx;
1796 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1799 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1800 struct kvm_mmu_pages *pvec)
1802 int i, ret, nr_unsync_leaf = 0;
1804 for_each_set_bit(i, sp->unsync_child_bitmap, 512) {
1805 struct kvm_mmu_page *child;
1806 u64 ent = sp->spt[i];
1808 if (!is_shadow_present_pte(ent) || is_large_pte(ent))
1809 goto clear_child_bitmap;
1811 child = page_header(ent & PT64_BASE_ADDR_MASK);
1813 if (child->unsync_children) {
1814 if (mmu_pages_add(pvec, child, i))
1817 ret = __mmu_unsync_walk(child, pvec);
1819 goto clear_child_bitmap;
1821 nr_unsync_leaf += ret;
1824 } else if (child->unsync) {
1826 if (mmu_pages_add(pvec, child, i))
1829 goto clear_child_bitmap;
1834 __clear_bit(i, sp->unsync_child_bitmap);
1835 sp->unsync_children--;
1836 WARN_ON((int)sp->unsync_children < 0);
1840 return nr_unsync_leaf;
1843 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1844 struct kvm_mmu_pages *pvec)
1846 if (!sp->unsync_children)
1849 mmu_pages_add(pvec, sp, 0);
1850 return __mmu_unsync_walk(sp, pvec);
1853 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1855 WARN_ON(!sp->unsync);
1856 trace_kvm_mmu_sync_page(sp);
1858 --kvm->stat.mmu_unsync;
1861 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1862 struct list_head *invalid_list);
1863 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1864 struct list_head *invalid_list);
1867 * NOTE: we should pay more attention on the zapped-obsolete page
1868 * (is_obsolete_sp(sp) && sp->role.invalid) when you do hash list walk
1869 * since it has been deleted from active_mmu_pages but still can be found
1872 * for_each_gfn_indirect_valid_sp has skipped that kind of page and
1873 * kvm_mmu_get_page(), the only user of for_each_gfn_sp(), has skipped
1874 * all the obsolete pages.
1876 #define for_each_gfn_sp(_kvm, _sp, _gfn) \
1877 hlist_for_each_entry(_sp, \
1878 &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)], hash_link) \
1879 if ((_sp)->gfn != (_gfn)) {} else
1881 #define for_each_gfn_indirect_valid_sp(_kvm, _sp, _gfn) \
1882 for_each_gfn_sp(_kvm, _sp, _gfn) \
1883 if ((_sp)->role.direct || (_sp)->role.invalid) {} else
1885 /* @sp->gfn should be write-protected at the call site */
1886 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1887 struct list_head *invalid_list, bool clear_unsync)
1889 if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1890 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1895 kvm_unlink_unsync_page(vcpu->kvm, sp);
1897 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1898 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1902 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
1906 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1907 struct kvm_mmu_page *sp)
1909 LIST_HEAD(invalid_list);
1912 ret = __kvm_sync_page(vcpu, sp, &invalid_list, false);
1914 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1919 #ifdef CONFIG_KVM_MMU_AUDIT
1920 #include "mmu_audit.c"
1922 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, int point) { }
1923 static void mmu_audit_disable(void) { }
1926 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1927 struct list_head *invalid_list)
1929 return __kvm_sync_page(vcpu, sp, invalid_list, true);
1932 /* @gfn should be write-protected at the call site */
1933 static void kvm_sync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1935 struct kvm_mmu_page *s;
1936 LIST_HEAD(invalid_list);
1939 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn) {
1943 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1944 kvm_unlink_unsync_page(vcpu->kvm, s);
1945 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1946 (vcpu->arch.mmu.sync_page(vcpu, s))) {
1947 kvm_mmu_prepare_zap_page(vcpu->kvm, s, &invalid_list);
1953 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1955 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
1958 struct mmu_page_path {
1959 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1960 unsigned int idx[PT64_ROOT_LEVEL-1];
1963 #define for_each_sp(pvec, sp, parents, i) \
1964 for (i = mmu_pages_next(&pvec, &parents, -1), \
1965 sp = pvec.page[i].sp; \
1966 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1967 i = mmu_pages_next(&pvec, &parents, i))
1969 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1970 struct mmu_page_path *parents,
1975 for (n = i+1; n < pvec->nr; n++) {
1976 struct kvm_mmu_page *sp = pvec->page[n].sp;
1978 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1979 parents->idx[0] = pvec->page[n].idx;
1983 parents->parent[sp->role.level-2] = sp;
1984 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1990 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1992 struct kvm_mmu_page *sp;
1993 unsigned int level = 0;
1996 unsigned int idx = parents->idx[level];
1998 sp = parents->parent[level];
2002 --sp->unsync_children;
2003 WARN_ON((int)sp->unsync_children < 0);
2004 __clear_bit(idx, sp->unsync_child_bitmap);
2006 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
2009 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
2010 struct mmu_page_path *parents,
2011 struct kvm_mmu_pages *pvec)
2013 parents->parent[parent->role.level-1] = NULL;
2017 static void mmu_sync_children(struct kvm_vcpu *vcpu,
2018 struct kvm_mmu_page *parent)
2021 struct kvm_mmu_page *sp;
2022 struct mmu_page_path parents;
2023 struct kvm_mmu_pages pages;
2024 LIST_HEAD(invalid_list);
2026 kvm_mmu_pages_init(parent, &parents, &pages);
2027 while (mmu_unsync_walk(parent, &pages)) {
2028 bool protected = false;
2030 for_each_sp(pages, sp, parents, i)
2031 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
2034 kvm_flush_remote_tlbs(vcpu->kvm);
2036 for_each_sp(pages, sp, parents, i) {
2037 kvm_sync_page(vcpu, sp, &invalid_list);
2038 mmu_pages_clear_parents(&parents);
2040 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2041 cond_resched_lock(&vcpu->kvm->mmu_lock);
2042 kvm_mmu_pages_init(parent, &parents, &pages);
2046 static void init_shadow_page_table(struct kvm_mmu_page *sp)
2050 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2054 static void __clear_sp_write_flooding_count(struct kvm_mmu_page *sp)
2056 sp->write_flooding_count = 0;
2059 static void clear_sp_write_flooding_count(u64 *spte)
2061 struct kvm_mmu_page *sp = page_header(__pa(spte));
2063 __clear_sp_write_flooding_count(sp);
2066 static bool is_obsolete_sp(struct kvm *kvm, struct kvm_mmu_page *sp)
2068 return unlikely(sp->mmu_valid_gen != kvm->arch.mmu_valid_gen);
2071 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
2079 union kvm_mmu_page_role role;
2081 struct kvm_mmu_page *sp;
2082 bool need_sync = false;
2084 role = vcpu->arch.mmu.base_role;
2086 role.direct = direct;
2089 role.access = access;
2090 if (!vcpu->arch.mmu.direct_map
2091 && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
2092 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
2093 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
2094 role.quadrant = quadrant;
2096 for_each_gfn_sp(vcpu->kvm, sp, gfn) {
2097 if (is_obsolete_sp(vcpu->kvm, sp))
2100 if (!need_sync && sp->unsync)
2103 if (sp->role.word != role.word)
2106 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
2109 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
2110 if (sp->unsync_children) {
2111 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
2112 kvm_mmu_mark_parents_unsync(sp);
2113 } else if (sp->unsync)
2114 kvm_mmu_mark_parents_unsync(sp);
2116 __clear_sp_write_flooding_count(sp);
2117 trace_kvm_mmu_get_page(sp, false);
2120 ++vcpu->kvm->stat.mmu_cache_miss;
2121 sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
2126 hlist_add_head(&sp->hash_link,
2127 &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);
2129 if (rmap_write_protect(vcpu->kvm, gfn))
2130 kvm_flush_remote_tlbs(vcpu->kvm);
2131 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
2132 kvm_sync_pages(vcpu, gfn);
2134 account_shadowed(vcpu->kvm, gfn);
2136 sp->mmu_valid_gen = vcpu->kvm->arch.mmu_valid_gen;
2137 init_shadow_page_table(sp);
2138 trace_kvm_mmu_get_page(sp, true);
2142 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
2143 struct kvm_vcpu *vcpu, u64 addr)
2145 iterator->addr = addr;
2146 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
2147 iterator->level = vcpu->arch.mmu.shadow_root_level;
2149 if (iterator->level == PT64_ROOT_LEVEL &&
2150 vcpu->arch.mmu.root_level < PT64_ROOT_LEVEL &&
2151 !vcpu->arch.mmu.direct_map)
2154 if (iterator->level == PT32E_ROOT_LEVEL) {
2155 iterator->shadow_addr
2156 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
2157 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
2159 if (!iterator->shadow_addr)
2160 iterator->level = 0;
2164 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
2166 if (iterator->level < PT_PAGE_TABLE_LEVEL)
2169 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
2170 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
2174 static void __shadow_walk_next(struct kvm_shadow_walk_iterator *iterator,
2177 if (is_last_spte(spte, iterator->level)) {
2178 iterator->level = 0;
2182 iterator->shadow_addr = spte & PT64_BASE_ADDR_MASK;
2186 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
2188 return __shadow_walk_next(iterator, *iterator->sptep);
2191 static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp, bool accessed)
2195 BUILD_BUG_ON(VMX_EPT_READABLE_MASK != PT_PRESENT_MASK ||
2196 VMX_EPT_WRITABLE_MASK != PT_WRITABLE_MASK);
2198 spte = __pa(sp->spt) | PT_PRESENT_MASK | PT_WRITABLE_MASK |
2199 shadow_user_mask | shadow_x_mask;
2202 spte |= shadow_accessed_mask;
2204 mmu_spte_set(sptep, spte);
2207 static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2208 unsigned direct_access)
2210 if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
2211 struct kvm_mmu_page *child;
2214 * For the direct sp, if the guest pte's dirty bit
2215 * changed form clean to dirty, it will corrupt the
2216 * sp's access: allow writable in the read-only sp,
2217 * so we should update the spte at this point to get
2218 * a new sp with the correct access.
2220 child = page_header(*sptep & PT64_BASE_ADDR_MASK);
2221 if (child->role.access == direct_access)
2224 drop_parent_pte(child, sptep);
2225 kvm_flush_remote_tlbs(vcpu->kvm);
2229 static bool mmu_page_zap_pte(struct kvm *kvm, struct kvm_mmu_page *sp,
2233 struct kvm_mmu_page *child;
2236 if (is_shadow_present_pte(pte)) {
2237 if (is_last_spte(pte, sp->role.level)) {
2238 drop_spte(kvm, spte);
2239 if (is_large_pte(pte))
2242 child = page_header(pte & PT64_BASE_ADDR_MASK);
2243 drop_parent_pte(child, spte);
2248 if (is_mmio_spte(pte))
2249 mmu_spte_clear_no_track(spte);
2254 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
2255 struct kvm_mmu_page *sp)
2259 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2260 mmu_page_zap_pte(kvm, sp, sp->spt + i);
2263 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
2265 mmu_page_remove_parent_pte(sp, parent_pte);
2268 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
2271 struct rmap_iterator iter;
2273 while ((sptep = rmap_get_first(sp->parent_ptes, &iter)))
2274 drop_parent_pte(sp, sptep);
2277 static int mmu_zap_unsync_children(struct kvm *kvm,
2278 struct kvm_mmu_page *parent,
2279 struct list_head *invalid_list)
2282 struct mmu_page_path parents;
2283 struct kvm_mmu_pages pages;
2285 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
2288 kvm_mmu_pages_init(parent, &parents, &pages);
2289 while (mmu_unsync_walk(parent, &pages)) {
2290 struct kvm_mmu_page *sp;
2292 for_each_sp(pages, sp, parents, i) {
2293 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
2294 mmu_pages_clear_parents(&parents);
2297 kvm_mmu_pages_init(parent, &parents, &pages);
2303 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
2304 struct list_head *invalid_list)
2308 trace_kvm_mmu_prepare_zap_page(sp);
2309 ++kvm->stat.mmu_shadow_zapped;
2310 ret = mmu_zap_unsync_children(kvm, sp, invalid_list);
2311 kvm_mmu_page_unlink_children(kvm, sp);
2312 kvm_mmu_unlink_parents(kvm, sp);
2314 if (!sp->role.invalid && !sp->role.direct)
2315 unaccount_shadowed(kvm, sp->gfn);
2318 kvm_unlink_unsync_page(kvm, sp);
2319 if (!sp->root_count) {
2322 list_move(&sp->link, invalid_list);
2323 kvm_mod_used_mmu_pages(kvm, -1);
2325 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2328 * The obsolete pages can not be used on any vcpus.
2329 * See the comments in kvm_mmu_invalidate_zap_all_pages().
2331 if (!sp->role.invalid && !is_obsolete_sp(kvm, sp))
2332 kvm_reload_remote_mmus(kvm);
2335 sp->role.invalid = 1;
2339 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
2340 struct list_head *invalid_list)
2342 struct kvm_mmu_page *sp, *nsp;
2344 if (list_empty(invalid_list))
2348 * wmb: make sure everyone sees our modifications to the page tables
2349 * rmb: make sure we see changes to vcpu->mode
2354 * Wait for all vcpus to exit guest mode and/or lockless shadow
2357 kvm_flush_remote_tlbs(kvm);
2359 list_for_each_entry_safe(sp, nsp, invalid_list, link) {
2360 WARN_ON(!sp->role.invalid || sp->root_count);
2361 kvm_mmu_free_page(sp);
2365 static bool prepare_zap_oldest_mmu_page(struct kvm *kvm,
2366 struct list_head *invalid_list)
2368 struct kvm_mmu_page *sp;
2370 if (list_empty(&kvm->arch.active_mmu_pages))
2373 sp = list_entry(kvm->arch.active_mmu_pages.prev,
2374 struct kvm_mmu_page, link);
2375 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
2381 * Changing the number of mmu pages allocated to the vm
2382 * Note: if goal_nr_mmu_pages is too small, you will get dead lock
2384 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int goal_nr_mmu_pages)
2386 LIST_HEAD(invalid_list);
2388 spin_lock(&kvm->mmu_lock);
2390 if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) {
2391 /* Need to free some mmu pages to achieve the goal. */
2392 while (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages)
2393 if (!prepare_zap_oldest_mmu_page(kvm, &invalid_list))
2396 kvm_mmu_commit_zap_page(kvm, &invalid_list);
2397 goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages;
2400 kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages;
2402 spin_unlock(&kvm->mmu_lock);
2405 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
2407 struct kvm_mmu_page *sp;
2408 LIST_HEAD(invalid_list);
2411 pgprintk("%s: looking for gfn %llx\n", __func__, gfn);
2413 spin_lock(&kvm->mmu_lock);
2414 for_each_gfn_indirect_valid_sp(kvm, sp, gfn) {
2415 pgprintk("%s: gfn %llx role %x\n", __func__, gfn,
2418 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
2420 kvm_mmu_commit_zap_page(kvm, &invalid_list);
2421 spin_unlock(&kvm->mmu_lock);
2425 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page);
2428 * The function is based on mtrr_type_lookup() in
2429 * arch/x86/kernel/cpu/mtrr/generic.c
2431 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
2435 u8 prev_match, curr_match;
2436 int i, num_var_ranges = KVM_NR_VAR_MTRR;
2438 /* MTRR is completely disabled, use UC for all of physical memory. */
2439 if (!(mtrr_state->enabled & 0x2))
2440 return MTRR_TYPE_UNCACHABLE;
2442 /* Make end inclusive end, instead of exclusive */
2445 /* Look in fixed ranges. Just return the type as per start */
2446 if (mtrr_state->have_fixed && (mtrr_state->enabled & 0x1) &&
2447 (start < 0x100000)) {
2450 if (start < 0x80000) {
2452 idx += (start >> 16);
2453 return mtrr_state->fixed_ranges[idx];
2454 } else if (start < 0xC0000) {
2456 idx += ((start - 0x80000) >> 14);
2457 return mtrr_state->fixed_ranges[idx];
2458 } else if (start < 0x1000000) {
2460 idx += ((start - 0xC0000) >> 12);
2461 return mtrr_state->fixed_ranges[idx];
2466 * Look in variable ranges
2467 * Look of multiple ranges matching this address and pick type
2468 * as per MTRR precedence
2471 for (i = 0; i < num_var_ranges; ++i) {
2472 unsigned short start_state, end_state;
2474 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
2477 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
2478 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
2479 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
2480 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
2482 start_state = ((start & mask) == (base & mask));
2483 end_state = ((end & mask) == (base & mask));
2484 if (start_state != end_state)
2487 if ((start & mask) != (base & mask))
2490 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
2491 if (prev_match == 0xFF) {
2492 prev_match = curr_match;
2496 if (prev_match == MTRR_TYPE_UNCACHABLE ||
2497 curr_match == MTRR_TYPE_UNCACHABLE)
2498 return MTRR_TYPE_UNCACHABLE;
2500 if ((prev_match == MTRR_TYPE_WRBACK &&
2501 curr_match == MTRR_TYPE_WRTHROUGH) ||
2502 (prev_match == MTRR_TYPE_WRTHROUGH &&
2503 curr_match == MTRR_TYPE_WRBACK)) {
2504 prev_match = MTRR_TYPE_WRTHROUGH;
2505 curr_match = MTRR_TYPE_WRTHROUGH;
2508 if (prev_match != curr_match)
2509 return MTRR_TYPE_UNCACHABLE;
2512 if (prev_match != 0xFF)
2515 return mtrr_state->def_type;
2518 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
2522 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
2523 (gfn << PAGE_SHIFT) + PAGE_SIZE);
2524 if (mtrr == 0xfe || mtrr == 0xff)
2525 mtrr = MTRR_TYPE_WRBACK;
2528 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
2530 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
2532 trace_kvm_mmu_unsync_page(sp);
2533 ++vcpu->kvm->stat.mmu_unsync;
2536 kvm_mmu_mark_parents_unsync(sp);
2539 static void kvm_unsync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
2541 struct kvm_mmu_page *s;
2543 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn) {
2546 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
2547 __kvm_unsync_page(vcpu, s);
2551 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
2554 struct kvm_mmu_page *s;
2555 bool need_unsync = false;
2557 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn) {
2561 if (s->role.level != PT_PAGE_TABLE_LEVEL)
2568 kvm_unsync_pages(vcpu, gfn);
2572 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2573 unsigned pte_access, int level,
2574 gfn_t gfn, pfn_t pfn, bool speculative,
2575 bool can_unsync, bool host_writable)
2580 if (set_mmio_spte(vcpu->kvm, sptep, gfn, pfn, pte_access))
2583 spte = PT_PRESENT_MASK;
2585 spte |= shadow_accessed_mask;
2587 if (pte_access & ACC_EXEC_MASK)
2588 spte |= shadow_x_mask;
2590 spte |= shadow_nx_mask;
2592 if (pte_access & ACC_USER_MASK)
2593 spte |= shadow_user_mask;
2595 if (level > PT_PAGE_TABLE_LEVEL)
2596 spte |= PT_PAGE_SIZE_MASK;
2598 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
2599 kvm_is_reserved_pfn(pfn));
2602 spte |= SPTE_HOST_WRITEABLE;
2604 pte_access &= ~ACC_WRITE_MASK;
2606 spte |= (u64)pfn << PAGE_SHIFT;
2608 if (pte_access & ACC_WRITE_MASK) {
2611 * Other vcpu creates new sp in the window between
2612 * mapping_level() and acquiring mmu-lock. We can
2613 * allow guest to retry the access, the mapping can
2614 * be fixed if guest refault.
2616 if (level > PT_PAGE_TABLE_LEVEL &&
2617 has_wrprotected_page(vcpu->kvm, gfn, level))
2620 spte |= PT_WRITABLE_MASK | SPTE_MMU_WRITEABLE;
2623 * Optimization: for pte sync, if spte was writable the hash
2624 * lookup is unnecessary (and expensive). Write protection
2625 * is responsibility of mmu_get_page / kvm_sync_page.
2626 * Same reasoning can be applied to dirty page accounting.
2628 if (!can_unsync && is_writable_pte(*sptep))
2631 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
2632 pgprintk("%s: found shadow page for %llx, marking ro\n",
2635 pte_access &= ~ACC_WRITE_MASK;
2636 spte &= ~(PT_WRITABLE_MASK | SPTE_MMU_WRITEABLE);
2640 if (pte_access & ACC_WRITE_MASK) {
2641 mark_page_dirty(vcpu->kvm, gfn);
2642 spte |= shadow_dirty_mask;
2646 if (mmu_spte_update(sptep, spte))
2647 kvm_flush_remote_tlbs(vcpu->kvm);
2652 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2653 unsigned pte_access, int write_fault, int *emulate,
2654 int level, gfn_t gfn, pfn_t pfn, bool speculative,
2657 int was_rmapped = 0;
2660 pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__,
2661 *sptep, write_fault, gfn);
2663 if (is_rmap_spte(*sptep)) {
2665 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2666 * the parent of the now unreachable PTE.
2668 if (level > PT_PAGE_TABLE_LEVEL &&
2669 !is_large_pte(*sptep)) {
2670 struct kvm_mmu_page *child;
2673 child = page_header(pte & PT64_BASE_ADDR_MASK);
2674 drop_parent_pte(child, sptep);
2675 kvm_flush_remote_tlbs(vcpu->kvm);
2676 } else if (pfn != spte_to_pfn(*sptep)) {
2677 pgprintk("hfn old %llx new %llx\n",
2678 spte_to_pfn(*sptep), pfn);
2679 drop_spte(vcpu->kvm, sptep);
2680 kvm_flush_remote_tlbs(vcpu->kvm);
2685 if (set_spte(vcpu, sptep, pte_access, level, gfn, pfn, speculative,
2686 true, host_writable)) {
2689 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
2692 if (unlikely(is_mmio_spte(*sptep) && emulate))
2695 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2696 pgprintk("instantiating %s PTE (%s) at %llx (%llx) addr %p\n",
2697 is_large_pte(*sptep)? "2MB" : "4kB",
2698 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
2700 if (!was_rmapped && is_large_pte(*sptep))
2701 ++vcpu->kvm->stat.lpages;
2703 if (is_shadow_present_pte(*sptep)) {
2705 rmap_count = rmap_add(vcpu, sptep, gfn);
2706 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
2707 rmap_recycle(vcpu, sptep, gfn);
2711 kvm_release_pfn_clean(pfn);
2714 static pfn_t pte_prefetch_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn,
2717 struct kvm_memory_slot *slot;
2719 slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, no_dirty_log);
2721 return KVM_PFN_ERR_FAULT;
2723 return gfn_to_pfn_memslot_atomic(slot, gfn);
2726 static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu,
2727 struct kvm_mmu_page *sp,
2728 u64 *start, u64 *end)
2730 struct page *pages[PTE_PREFETCH_NUM];
2731 unsigned access = sp->role.access;
2735 gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt);
2736 if (!gfn_to_memslot_dirty_bitmap(vcpu, gfn, access & ACC_WRITE_MASK))
2739 ret = gfn_to_page_many_atomic(vcpu->kvm, gfn, pages, end - start);
2743 for (i = 0; i < ret; i++, gfn++, start++)
2744 mmu_set_spte(vcpu, start, access, 0, NULL,
2745 sp->role.level, gfn, page_to_pfn(pages[i]),
2751 static void __direct_pte_prefetch(struct kvm_vcpu *vcpu,
2752 struct kvm_mmu_page *sp, u64 *sptep)
2754 u64 *spte, *start = NULL;
2757 WARN_ON(!sp->role.direct);
2759 i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1);
2762 for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) {
2763 if (is_shadow_present_pte(*spte) || spte == sptep) {
2766 if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0)
2774 static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep)
2776 struct kvm_mmu_page *sp;
2779 * Since it's no accessed bit on EPT, it's no way to
2780 * distinguish between actually accessed translations
2781 * and prefetched, so disable pte prefetch if EPT is
2784 if (!shadow_accessed_mask)
2787 sp = page_header(__pa(sptep));
2788 if (sp->role.level > PT_PAGE_TABLE_LEVEL)
2791 __direct_pte_prefetch(vcpu, sp, sptep);
2794 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2795 int map_writable, int level, gfn_t gfn, pfn_t pfn,
2798 struct kvm_shadow_walk_iterator iterator;
2799 struct kvm_mmu_page *sp;
2803 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2806 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2807 if (iterator.level == level) {
2808 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL,
2809 write, &emulate, level, gfn, pfn,
2810 prefault, map_writable);
2811 direct_pte_prefetch(vcpu, iterator.sptep);
2812 ++vcpu->stat.pf_fixed;
2816 drop_large_spte(vcpu, iterator.sptep);
2817 if (!is_shadow_present_pte(*iterator.sptep)) {
2818 u64 base_addr = iterator.addr;
2820 base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2821 pseudo_gfn = base_addr >> PAGE_SHIFT;
2822 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2824 1, ACC_ALL, iterator.sptep);
2826 link_shadow_page(iterator.sptep, sp, true);
2832 static void kvm_send_hwpoison_signal(unsigned long address, struct task_struct *tsk)
2836 info.si_signo = SIGBUS;
2838 info.si_code = BUS_MCEERR_AR;
2839 info.si_addr = (void __user *)address;
2840 info.si_addr_lsb = PAGE_SHIFT;
2842 send_sig_info(SIGBUS, &info, tsk);
2845 static int kvm_handle_bad_page(struct kvm_vcpu *vcpu, gfn_t gfn, pfn_t pfn)
2848 * Do not cache the mmio info caused by writing the readonly gfn
2849 * into the spte otherwise read access on readonly gfn also can
2850 * caused mmio page fault and treat it as mmio access.
2851 * Return 1 to tell kvm to emulate it.
2853 if (pfn == KVM_PFN_ERR_RO_FAULT)
2856 if (pfn == KVM_PFN_ERR_HWPOISON) {
2857 kvm_send_hwpoison_signal(gfn_to_hva(vcpu->kvm, gfn), current);
2864 static void transparent_hugepage_adjust(struct kvm_vcpu *vcpu,
2865 gfn_t *gfnp, pfn_t *pfnp, int *levelp)
2869 int level = *levelp;
2872 * Check if it's a transparent hugepage. If this would be an
2873 * hugetlbfs page, level wouldn't be set to
2874 * PT_PAGE_TABLE_LEVEL and there would be no adjustment done
2877 if (!is_error_noslot_pfn(pfn) && !kvm_is_reserved_pfn(pfn) &&
2878 level == PT_PAGE_TABLE_LEVEL &&
2879 PageTransCompound(pfn_to_page(pfn)) &&
2880 !has_wrprotected_page(vcpu->kvm, gfn, PT_DIRECTORY_LEVEL)) {
2883 * mmu_notifier_retry was successful and we hold the
2884 * mmu_lock here, so the pmd can't become splitting
2885 * from under us, and in turn
2886 * __split_huge_page_refcount() can't run from under
2887 * us and we can safely transfer the refcount from
2888 * PG_tail to PG_head as we switch the pfn to tail to
2891 *levelp = level = PT_DIRECTORY_LEVEL;
2892 mask = KVM_PAGES_PER_HPAGE(level) - 1;
2893 VM_BUG_ON((gfn & mask) != (pfn & mask));
2897 kvm_release_pfn_clean(pfn);
2905 static bool handle_abnormal_pfn(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn,
2906 pfn_t pfn, unsigned access, int *ret_val)
2910 /* The pfn is invalid, report the error! */
2911 if (unlikely(is_error_pfn(pfn))) {
2912 *ret_val = kvm_handle_bad_page(vcpu, gfn, pfn);
2916 if (unlikely(is_noslot_pfn(pfn)))
2917 vcpu_cache_mmio_info(vcpu, gva, gfn, access);
2924 static bool page_fault_can_be_fast(u32 error_code)
2927 * Do not fix the mmio spte with invalid generation number which
2928 * need to be updated by slow page fault path.
2930 if (unlikely(error_code & PFERR_RSVD_MASK))
2934 * #PF can be fast only if the shadow page table is present and it
2935 * is caused by write-protect, that means we just need change the
2936 * W bit of the spte which can be done out of mmu-lock.
2938 if (!(error_code & PFERR_PRESENT_MASK) ||
2939 !(error_code & PFERR_WRITE_MASK))
2946 fast_pf_fix_direct_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
2947 u64 *sptep, u64 spte)
2951 WARN_ON(!sp->role.direct);
2954 * The gfn of direct spte is stable since it is calculated
2957 gfn = kvm_mmu_page_get_gfn(sp, sptep - sp->spt);
2960 * Theoretically we could also set dirty bit (and flush TLB) here in
2961 * order to eliminate unnecessary PML logging. See comments in
2962 * set_spte. But fast_page_fault is very unlikely to happen with PML
2963 * enabled, so we do not do this. This might result in the same GPA
2964 * to be logged in PML buffer again when the write really happens, and
2965 * eventually to be called by mark_page_dirty twice. But it's also no
2966 * harm. This also avoids the TLB flush needed after setting dirty bit
2967 * so non-PML cases won't be impacted.
2969 * Compare with set_spte where instead shadow_dirty_mask is set.
2971 if (cmpxchg64(sptep, spte, spte | PT_WRITABLE_MASK) == spte)
2972 mark_page_dirty(vcpu->kvm, gfn);
2979 * - true: let the vcpu to access on the same address again.
2980 * - false: let the real page fault path to fix it.
2982 static bool fast_page_fault(struct kvm_vcpu *vcpu, gva_t gva, int level,
2985 struct kvm_shadow_walk_iterator iterator;
2986 struct kvm_mmu_page *sp;
2990 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2993 if (!page_fault_can_be_fast(error_code))
2996 walk_shadow_page_lockless_begin(vcpu);
2997 for_each_shadow_entry_lockless(vcpu, gva, iterator, spte)
2998 if (!is_shadow_present_pte(spte) || iterator.level < level)
3002 * If the mapping has been changed, let the vcpu fault on the
3003 * same address again.
3005 if (!is_rmap_spte(spte)) {
3010 sp = page_header(__pa(iterator.sptep));
3011 if (!is_last_spte(spte, sp->role.level))
3015 * Check if it is a spurious fault caused by TLB lazily flushed.
3017 * Need not check the access of upper level table entries since
3018 * they are always ACC_ALL.
3020 if (is_writable_pte(spte)) {
3026 * Currently, to simplify the code, only the spte write-protected
3027 * by dirty-log can be fast fixed.
3029 if (!spte_is_locklessly_modifiable(spte))
3033 * Do not fix write-permission on the large spte since we only dirty
3034 * the first page into the dirty-bitmap in fast_pf_fix_direct_spte()
3035 * that means other pages are missed if its slot is dirty-logged.
3037 * Instead, we let the slow page fault path create a normal spte to
3040 * See the comments in kvm_arch_commit_memory_region().
3042 if (sp->role.level > PT_PAGE_TABLE_LEVEL)
3046 * Currently, fast page fault only works for direct mapping since
3047 * the gfn is not stable for indirect shadow page.
3048 * See Documentation/virtual/kvm/locking.txt to get more detail.
3050 ret = fast_pf_fix_direct_spte(vcpu, sp, iterator.sptep, spte);
3052 trace_fast_page_fault(vcpu, gva, error_code, iterator.sptep,
3054 walk_shadow_page_lockless_end(vcpu);
3059 static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn,
3060 gva_t gva, pfn_t *pfn, bool write, bool *writable);
3061 static void make_mmu_pages_available(struct kvm_vcpu *vcpu);
3063 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, u32 error_code,
3064 gfn_t gfn, bool prefault)
3070 unsigned long mmu_seq;
3071 bool map_writable, write = error_code & PFERR_WRITE_MASK;
3073 force_pt_level = mapping_level_dirty_bitmap(vcpu, gfn);
3074 if (likely(!force_pt_level)) {
3075 level = mapping_level(vcpu, gfn);
3077 * This path builds a PAE pagetable - so we can map
3078 * 2mb pages at maximum. Therefore check if the level
3079 * is larger than that.
3081 if (level > PT_DIRECTORY_LEVEL)
3082 level = PT_DIRECTORY_LEVEL;
3084 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
3086 level = PT_PAGE_TABLE_LEVEL;
3088 if (fast_page_fault(vcpu, v, level, error_code))
3091 mmu_seq = vcpu->kvm->mmu_notifier_seq;
3094 if (try_async_pf(vcpu, prefault, gfn, v, &pfn, write, &map_writable))
3097 if (handle_abnormal_pfn(vcpu, v, gfn, pfn, ACC_ALL, &r))
3100 spin_lock(&vcpu->kvm->mmu_lock);
3101 if (mmu_notifier_retry(vcpu->kvm, mmu_seq))
3103 make_mmu_pages_available(vcpu);
3104 if (likely(!force_pt_level))
3105 transparent_hugepage_adjust(vcpu, &gfn, &pfn, &level);
3106 r = __direct_map(vcpu, v, write, map_writable, level, gfn, pfn,
3108 spin_unlock(&vcpu->kvm->mmu_lock);
3114 spin_unlock(&vcpu->kvm->mmu_lock);
3115 kvm_release_pfn_clean(pfn);
3120 static void mmu_free_roots(struct kvm_vcpu *vcpu)
3123 struct kvm_mmu_page *sp;
3124 LIST_HEAD(invalid_list);
3126 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3129 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL &&
3130 (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL ||
3131 vcpu->arch.mmu.direct_map)) {
3132 hpa_t root = vcpu->arch.mmu.root_hpa;
3134 spin_lock(&vcpu->kvm->mmu_lock);
3135 sp = page_header(root);
3137 if (!sp->root_count && sp->role.invalid) {
3138 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
3139 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
3141 spin_unlock(&vcpu->kvm->mmu_lock);
3142 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
3146 spin_lock(&vcpu->kvm->mmu_lock);
3147 for (i = 0; i < 4; ++i) {
3148 hpa_t root = vcpu->arch.mmu.pae_root[i];
3151 root &= PT64_BASE_ADDR_MASK;
3152 sp = page_header(root);
3154 if (!sp->root_count && sp->role.invalid)
3155 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
3158 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
3160 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
3161 spin_unlock(&vcpu->kvm->mmu_lock);
3162 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
3165 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
3169 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
3170 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3177 static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu)
3179 struct kvm_mmu_page *sp;
3182 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3183 spin_lock(&vcpu->kvm->mmu_lock);
3184 make_mmu_pages_available(vcpu);
3185 sp = kvm_mmu_get_page(vcpu, 0, 0, PT64_ROOT_LEVEL,
3188 spin_unlock(&vcpu->kvm->mmu_lock);
3189 vcpu->arch.mmu.root_hpa = __pa(sp->spt);
3190 } else if (vcpu->arch.mmu.shadow_root_level == PT32E_ROOT_LEVEL) {
3191 for (i = 0; i < 4; ++i) {
3192 hpa_t root = vcpu->arch.mmu.pae_root[i];
3194 MMU_WARN_ON(VALID_PAGE(root));
3195 spin_lock(&vcpu->kvm->mmu_lock);
3196 make_mmu_pages_available(vcpu);
3197 sp = kvm_mmu_get_page(vcpu, i << (30 - PAGE_SHIFT),
3199 PT32_ROOT_LEVEL, 1, ACC_ALL,
3201 root = __pa(sp->spt);
3203 spin_unlock(&vcpu->kvm->mmu_lock);
3204 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
3206 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
3213 static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu)
3215 struct kvm_mmu_page *sp;
3220 root_gfn = vcpu->arch.mmu.get_cr3(vcpu) >> PAGE_SHIFT;
3222 if (mmu_check_root(vcpu, root_gfn))
3226 * Do we shadow a long mode page table? If so we need to
3227 * write-protect the guests page table root.
3229 if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) {
3230 hpa_t root = vcpu->arch.mmu.root_hpa;
3232 MMU_WARN_ON(VALID_PAGE(root));
3234 spin_lock(&vcpu->kvm->mmu_lock);
3235 make_mmu_pages_available(vcpu);
3236 sp = kvm_mmu_get_page(vcpu, root_gfn, 0, PT64_ROOT_LEVEL,
3238 root = __pa(sp->spt);
3240 spin_unlock(&vcpu->kvm->mmu_lock);
3241 vcpu->arch.mmu.root_hpa = root;
3246 * We shadow a 32 bit page table. This may be a legacy 2-level
3247 * or a PAE 3-level page table. In either case we need to be aware that
3248 * the shadow page table may be a PAE or a long mode page table.
3250 pm_mask = PT_PRESENT_MASK;
3251 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL)
3252 pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK;
3254 for (i = 0; i < 4; ++i) {
3255 hpa_t root = vcpu->arch.mmu.pae_root[i];
3257 MMU_WARN_ON(VALID_PAGE(root));
3258 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
3259 pdptr = vcpu->arch.mmu.get_pdptr(vcpu, i);
3260 if (!is_present_gpte(pdptr)) {
3261 vcpu->arch.mmu.pae_root[i] = 0;
3264 root_gfn = pdptr >> PAGE_SHIFT;
3265 if (mmu_check_root(vcpu, root_gfn))
3268 spin_lock(&vcpu->kvm->mmu_lock);
3269 make_mmu_pages_available(vcpu);
3270 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
3273 root = __pa(sp->spt);
3275 spin_unlock(&vcpu->kvm->mmu_lock);
3277 vcpu->arch.mmu.pae_root[i] = root | pm_mask;
3279 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
3282 * If we shadow a 32 bit page table with a long mode page
3283 * table we enter this path.
3285 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3286 if (vcpu->arch.mmu.lm_root == NULL) {
3288 * The additional page necessary for this is only
3289 * allocated on demand.
3294 lm_root = (void*)get_zeroed_page(GFP_KERNEL);
3295 if (lm_root == NULL)
3298 lm_root[0] = __pa(vcpu->arch.mmu.pae_root) | pm_mask;
3300 vcpu->arch.mmu.lm_root = lm_root;
3303 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.lm_root);
3309 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
3311 if (vcpu->arch.mmu.direct_map)
3312 return mmu_alloc_direct_roots(vcpu);
3314 return mmu_alloc_shadow_roots(vcpu);
3317 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
3320 struct kvm_mmu_page *sp;
3322 if (vcpu->arch.mmu.direct_map)
3325 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3328 vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY);
3329 kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC);
3330 if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) {
3331 hpa_t root = vcpu->arch.mmu.root_hpa;
3332 sp = page_header(root);
3333 mmu_sync_children(vcpu, sp);
3334 kvm_mmu_audit(vcpu, AUDIT_POST_SYNC);
3337 for (i = 0; i < 4; ++i) {
3338 hpa_t root = vcpu->arch.mmu.pae_root[i];
3340 if (root && VALID_PAGE(root)) {
3341 root &= PT64_BASE_ADDR_MASK;
3342 sp = page_header(root);
3343 mmu_sync_children(vcpu, sp);
3346 kvm_mmu_audit(vcpu, AUDIT_POST_SYNC);
3349 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
3351 spin_lock(&vcpu->kvm->mmu_lock);
3352 mmu_sync_roots(vcpu);
3353 spin_unlock(&vcpu->kvm->mmu_lock);
3355 EXPORT_SYMBOL_GPL(kvm_mmu_sync_roots);
3357 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
3358 u32 access, struct x86_exception *exception)
3361 exception->error_code = 0;
3365 static gpa_t nonpaging_gva_to_gpa_nested(struct kvm_vcpu *vcpu, gva_t vaddr,
3367 struct x86_exception *exception)
3370 exception->error_code = 0;
3371 return vcpu->arch.nested_mmu.translate_gpa(vcpu, vaddr, access, exception);
3374 static bool quickly_check_mmio_pf(struct kvm_vcpu *vcpu, u64 addr, bool direct)
3377 return vcpu_match_mmio_gpa(vcpu, addr);
3379 return vcpu_match_mmio_gva(vcpu, addr);
3384 * On direct hosts, the last spte is only allows two states
3385 * for mmio page fault:
3386 * - It is the mmio spte
3387 * - It is zapped or it is being zapped.
3389 * This function completely checks the spte when the last spte
3390 * is not the mmio spte.
3392 static bool check_direct_spte_mmio_pf(u64 spte)
3394 return __check_direct_spte_mmio_pf(spte);
3397 static u64 walk_shadow_page_get_mmio_spte(struct kvm_vcpu *vcpu, u64 addr)
3399 struct kvm_shadow_walk_iterator iterator;
3402 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3405 walk_shadow_page_lockless_begin(vcpu);
3406 for_each_shadow_entry_lockless(vcpu, addr, iterator, spte)
3407 if (!is_shadow_present_pte(spte))
3409 walk_shadow_page_lockless_end(vcpu);
3414 int handle_mmio_page_fault_common(struct kvm_vcpu *vcpu, u64 addr, bool direct)
3418 if (quickly_check_mmio_pf(vcpu, addr, direct))
3419 return RET_MMIO_PF_EMULATE;
3421 spte = walk_shadow_page_get_mmio_spte(vcpu, addr);
3423 if (is_mmio_spte(spte)) {
3424 gfn_t gfn = get_mmio_spte_gfn(spte);
3425 unsigned access = get_mmio_spte_access(spte);
3427 if (!check_mmio_spte(vcpu->kvm, spte))
3428 return RET_MMIO_PF_INVALID;
3433 trace_handle_mmio_page_fault(addr, gfn, access);
3434 vcpu_cache_mmio_info(vcpu, addr, gfn, access);
3435 return RET_MMIO_PF_EMULATE;
3439 * It's ok if the gva is remapped by other cpus on shadow guest,
3440 * it's a BUG if the gfn is not a mmio page.
3442 if (direct && !check_direct_spte_mmio_pf(spte))
3443 return RET_MMIO_PF_BUG;
3446 * If the page table is zapped by other cpus, let CPU fault again on
3449 return RET_MMIO_PF_RETRY;
3451 EXPORT_SYMBOL_GPL(handle_mmio_page_fault_common);
3453 static int handle_mmio_page_fault(struct kvm_vcpu *vcpu, u64 addr,
3454 u32 error_code, bool direct)
3458 ret = handle_mmio_page_fault_common(vcpu, addr, direct);
3459 WARN_ON(ret == RET_MMIO_PF_BUG);
3463 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3464 u32 error_code, bool prefault)
3469 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
3471 if (unlikely(error_code & PFERR_RSVD_MASK)) {
3472 r = handle_mmio_page_fault(vcpu, gva, error_code, true);
3474 if (likely(r != RET_MMIO_PF_INVALID))
3478 r = mmu_topup_memory_caches(vcpu);
3482 MMU_WARN_ON(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3484 gfn = gva >> PAGE_SHIFT;
3486 return nonpaging_map(vcpu, gva & PAGE_MASK,
3487 error_code, gfn, prefault);
3490 static int kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn)
3492 struct kvm_arch_async_pf arch;
3494 arch.token = (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id;
3496 arch.direct_map = vcpu->arch.mmu.direct_map;
3497 arch.cr3 = vcpu->arch.mmu.get_cr3(vcpu);
3499 return kvm_setup_async_pf(vcpu, gva, gfn_to_hva(vcpu->kvm, gfn), &arch);
3502 static bool can_do_async_pf(struct kvm_vcpu *vcpu)
3504 if (unlikely(!irqchip_in_kernel(vcpu->kvm) ||
3505 kvm_event_needs_reinjection(vcpu)))
3508 return kvm_x86_ops->interrupt_allowed(vcpu);
3511 static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn,
3512 gva_t gva, pfn_t *pfn, bool write, bool *writable)
3514 struct kvm_memory_slot *slot;
3517 slot = gfn_to_memslot(vcpu->kvm, gfn);
3519 *pfn = __gfn_to_pfn_memslot(slot, gfn, false, &async, write, writable);
3521 return false; /* *pfn has correct page already */
3523 if (!prefault && can_do_async_pf(vcpu)) {
3524 trace_kvm_try_async_get_page(gva, gfn);
3525 if (kvm_find_async_pf_gfn(vcpu, gfn)) {
3526 trace_kvm_async_pf_doublefault(gva, gfn);
3527 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
3529 } else if (kvm_arch_setup_async_pf(vcpu, gva, gfn))
3533 *pfn = __gfn_to_pfn_memslot(slot, gfn, false, NULL, write, writable);
3537 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa, u32 error_code,
3544 gfn_t gfn = gpa >> PAGE_SHIFT;
3545 unsigned long mmu_seq;
3546 int write = error_code & PFERR_WRITE_MASK;
3549 MMU_WARN_ON(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3551 if (unlikely(error_code & PFERR_RSVD_MASK)) {
3552 r = handle_mmio_page_fault(vcpu, gpa, error_code, true);
3554 if (likely(r != RET_MMIO_PF_INVALID))
3558 r = mmu_topup_memory_caches(vcpu);
3562 force_pt_level = mapping_level_dirty_bitmap(vcpu, gfn);
3563 if (likely(!force_pt_level)) {
3564 level = mapping_level(vcpu, gfn);
3565 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
3567 level = PT_PAGE_TABLE_LEVEL;
3569 if (fast_page_fault(vcpu, gpa, level, error_code))
3572 mmu_seq = vcpu->kvm->mmu_notifier_seq;
3575 if (try_async_pf(vcpu, prefault, gfn, gpa, &pfn, write, &map_writable))
3578 if (handle_abnormal_pfn(vcpu, 0, gfn, pfn, ACC_ALL, &r))
3581 spin_lock(&vcpu->kvm->mmu_lock);
3582 if (mmu_notifier_retry(vcpu->kvm, mmu_seq))
3584 make_mmu_pages_available(vcpu);
3585 if (likely(!force_pt_level))
3586 transparent_hugepage_adjust(vcpu, &gfn, &pfn, &level);
3587 r = __direct_map(vcpu, gpa, write, map_writable,
3588 level, gfn, pfn, prefault);
3589 spin_unlock(&vcpu->kvm->mmu_lock);
3594 spin_unlock(&vcpu->kvm->mmu_lock);
3595 kvm_release_pfn_clean(pfn);
3599 static void nonpaging_init_context(struct kvm_vcpu *vcpu,
3600 struct kvm_mmu *context)
3602 context->page_fault = nonpaging_page_fault;
3603 context->gva_to_gpa = nonpaging_gva_to_gpa;
3604 context->sync_page = nonpaging_sync_page;
3605 context->invlpg = nonpaging_invlpg;
3606 context->update_pte = nonpaging_update_pte;
3607 context->root_level = 0;
3608 context->shadow_root_level = PT32E_ROOT_LEVEL;
3609 context->root_hpa = INVALID_PAGE;
3610 context->direct_map = true;
3611 context->nx = false;
3614 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu)
3616 mmu_free_roots(vcpu);
3619 static unsigned long get_cr3(struct kvm_vcpu *vcpu)
3621 return kvm_read_cr3(vcpu);
3624 static void inject_page_fault(struct kvm_vcpu *vcpu,
3625 struct x86_exception *fault)
3627 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
3630 static bool sync_mmio_spte(struct kvm *kvm, u64 *sptep, gfn_t gfn,
3631 unsigned access, int *nr_present)
3633 if (unlikely(is_mmio_spte(*sptep))) {
3634 if (gfn != get_mmio_spte_gfn(*sptep)) {
3635 mmu_spte_clear_no_track(sptep);
3640 mark_mmio_spte(kvm, sptep, gfn, access);
3647 static inline bool is_last_gpte(struct kvm_mmu *mmu, unsigned level, unsigned gpte)
3652 index |= (gpte & PT_PAGE_SIZE_MASK) >> (PT_PAGE_SIZE_SHIFT - 2);
3653 return mmu->last_pte_bitmap & (1 << index);
3656 #define PTTYPE_EPT 18 /* arbitrary */
3657 #define PTTYPE PTTYPE_EPT
3658 #include "paging_tmpl.h"
3662 #include "paging_tmpl.h"
3666 #include "paging_tmpl.h"
3669 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu,
3670 struct kvm_mmu *context)
3672 int maxphyaddr = cpuid_maxphyaddr(vcpu);
3673 u64 exb_bit_rsvd = 0;
3674 u64 gbpages_bit_rsvd = 0;
3675 u64 nonleaf_bit8_rsvd = 0;
3677 context->bad_mt_xwr = 0;
3680 exb_bit_rsvd = rsvd_bits(63, 63);
3681 if (!guest_cpuid_has_gbpages(vcpu))
3682 gbpages_bit_rsvd = rsvd_bits(7, 7);
3685 * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for
3686 * leaf entries) on AMD CPUs only.
3688 if (guest_cpuid_is_amd(vcpu))
3689 nonleaf_bit8_rsvd = rsvd_bits(8, 8);
3691 switch (context->root_level) {
3692 case PT32_ROOT_LEVEL:
3693 /* no rsvd bits for 2 level 4K page table entries */
3694 context->rsvd_bits_mask[0][1] = 0;
3695 context->rsvd_bits_mask[0][0] = 0;
3696 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
3698 if (!is_pse(vcpu)) {
3699 context->rsvd_bits_mask[1][1] = 0;
3703 if (is_cpuid_PSE36())
3704 /* 36bits PSE 4MB page */
3705 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
3707 /* 32 bits PSE 4MB page */
3708 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
3710 case PT32E_ROOT_LEVEL:
3711 context->rsvd_bits_mask[0][2] =
3712 rsvd_bits(maxphyaddr, 63) |
3713 rsvd_bits(5, 8) | rsvd_bits(1, 2); /* PDPTE */
3714 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
3715 rsvd_bits(maxphyaddr, 62); /* PDE */
3716 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
3717 rsvd_bits(maxphyaddr, 62); /* PTE */
3718 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
3719 rsvd_bits(maxphyaddr, 62) |
3720 rsvd_bits(13, 20); /* large page */
3721 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
3723 case PT64_ROOT_LEVEL:
3724 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
3725 nonleaf_bit8_rsvd | rsvd_bits(7, 7) | rsvd_bits(maxphyaddr, 51);
3726 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
3727 nonleaf_bit8_rsvd | gbpages_bit_rsvd | rsvd_bits(maxphyaddr, 51);
3728 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
3729 rsvd_bits(maxphyaddr, 51);
3730 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
3731 rsvd_bits(maxphyaddr, 51);
3732 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
3733 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
3734 gbpages_bit_rsvd | rsvd_bits(maxphyaddr, 51) |
3736 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
3737 rsvd_bits(maxphyaddr, 51) |
3738 rsvd_bits(13, 20); /* large page */
3739 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
3744 static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu,
3745 struct kvm_mmu *context, bool execonly)
3747 int maxphyaddr = cpuid_maxphyaddr(vcpu);
3750 context->rsvd_bits_mask[0][3] =
3751 rsvd_bits(maxphyaddr, 51) | rsvd_bits(3, 7);
3752 context->rsvd_bits_mask[0][2] =
3753 rsvd_bits(maxphyaddr, 51) | rsvd_bits(3, 6);
3754 context->rsvd_bits_mask[0][1] =
3755 rsvd_bits(maxphyaddr, 51) | rsvd_bits(3, 6);
3756 context->rsvd_bits_mask[0][0] = rsvd_bits(maxphyaddr, 51);
3759 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
3760 context->rsvd_bits_mask[1][2] =
3761 rsvd_bits(maxphyaddr, 51) | rsvd_bits(12, 29);
3762 context->rsvd_bits_mask[1][1] =
3763 rsvd_bits(maxphyaddr, 51) | rsvd_bits(12, 20);
3764 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
3766 for (pte = 0; pte < 64; pte++) {
3767 int rwx_bits = pte & 7;
3769 if (mt == 0x2 || mt == 0x3 || mt == 0x7 ||
3770 rwx_bits == 0x2 || rwx_bits == 0x6 ||
3771 (rwx_bits == 0x4 && !execonly))
3772 context->bad_mt_xwr |= (1ull << pte);
3776 static void update_permission_bitmask(struct kvm_vcpu *vcpu,
3777 struct kvm_mmu *mmu, bool ept)
3779 unsigned bit, byte, pfec;
3781 bool fault, x, w, u, wf, uf, ff, smapf, cr4_smap, cr4_smep, smap = 0;
3783 cr4_smep = kvm_read_cr4_bits(vcpu, X86_CR4_SMEP);
3784 cr4_smap = kvm_read_cr4_bits(vcpu, X86_CR4_SMAP);
3785 for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) {
3788 wf = pfec & PFERR_WRITE_MASK;
3789 uf = pfec & PFERR_USER_MASK;
3790 ff = pfec & PFERR_FETCH_MASK;
3792 * PFERR_RSVD_MASK bit is set in PFEC if the access is not
3793 * subject to SMAP restrictions, and cleared otherwise. The
3794 * bit is only meaningful if the SMAP bit is set in CR4.
3796 smapf = !(pfec & PFERR_RSVD_MASK);
3797 for (bit = 0; bit < 8; ++bit) {
3798 x = bit & ACC_EXEC_MASK;
3799 w = bit & ACC_WRITE_MASK;
3800 u = bit & ACC_USER_MASK;
3803 /* Not really needed: !nx will cause pte.nx to fault */
3805 /* Allow supervisor writes if !cr0.wp */
3806 w |= !is_write_protection(vcpu) && !uf;
3807 /* Disallow supervisor fetches of user code if cr4.smep */
3808 x &= !(cr4_smep && u && !uf);
3811 * SMAP:kernel-mode data accesses from user-mode
3812 * mappings should fault. A fault is considered
3813 * as a SMAP violation if all of the following
3814 * conditions are ture:
3815 * - X86_CR4_SMAP is set in CR4
3816 * - An user page is accessed
3817 * - Page fault in kernel mode
3818 * - if CPL = 3 or X86_EFLAGS_AC is clear
3820 * Here, we cover the first three conditions.
3821 * The fourth is computed dynamically in
3822 * permission_fault() and is in smapf.
3824 * Also, SMAP does not affect instruction
3825 * fetches, add the !ff check here to make it
3828 smap = cr4_smap && u && !uf && !ff;
3830 /* Not really needed: no U/S accesses on ept */
3833 fault = (ff && !x) || (uf && !u) || (wf && !w) ||
3835 map |= fault << bit;
3837 mmu->permissions[byte] = map;
3841 static void update_last_pte_bitmap(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu)
3844 unsigned level, root_level = mmu->root_level;
3845 const unsigned ps_set_index = 1 << 2; /* bit 2 of index: ps */
3847 if (root_level == PT32E_ROOT_LEVEL)
3849 /* PT_PAGE_TABLE_LEVEL always terminates */
3850 map = 1 | (1 << ps_set_index);
3851 for (level = PT_DIRECTORY_LEVEL; level <= root_level; ++level) {
3852 if (level <= PT_PDPE_LEVEL
3853 && (mmu->root_level >= PT32E_ROOT_LEVEL || is_pse(vcpu)))
3854 map |= 1 << (ps_set_index | (level - 1));
3856 mmu->last_pte_bitmap = map;
3859 static void paging64_init_context_common(struct kvm_vcpu *vcpu,
3860 struct kvm_mmu *context,
3863 context->nx = is_nx(vcpu);
3864 context->root_level = level;
3866 reset_rsvds_bits_mask(vcpu, context);
3867 update_permission_bitmask(vcpu, context, false);
3868 update_last_pte_bitmap(vcpu, context);
3870 MMU_WARN_ON(!is_pae(vcpu));
3871 context->page_fault = paging64_page_fault;
3872 context->gva_to_gpa = paging64_gva_to_gpa;
3873 context->sync_page = paging64_sync_page;
3874 context->invlpg = paging64_invlpg;
3875 context->update_pte = paging64_update_pte;
3876 context->shadow_root_level = level;
3877 context->root_hpa = INVALID_PAGE;
3878 context->direct_map = false;
3881 static void paging64_init_context(struct kvm_vcpu *vcpu,
3882 struct kvm_mmu *context)
3884 paging64_init_context_common(vcpu, context, PT64_ROOT_LEVEL);
3887 static void paging32_init_context(struct kvm_vcpu *vcpu,
3888 struct kvm_mmu *context)
3890 context->nx = false;
3891 context->root_level = PT32_ROOT_LEVEL;
3893 reset_rsvds_bits_mask(vcpu, context);
3894 update_permission_bitmask(vcpu, context, false);
3895 update_last_pte_bitmap(vcpu, context);
3897 context->page_fault = paging32_page_fault;
3898 context->gva_to_gpa = paging32_gva_to_gpa;
3899 context->sync_page = paging32_sync_page;
3900 context->invlpg = paging32_invlpg;
3901 context->update_pte = paging32_update_pte;
3902 context->shadow_root_level = PT32E_ROOT_LEVEL;
3903 context->root_hpa = INVALID_PAGE;
3904 context->direct_map = false;
3907 static void paging32E_init_context(struct kvm_vcpu *vcpu,
3908 struct kvm_mmu *context)
3910 paging64_init_context_common(vcpu, context, PT32E_ROOT_LEVEL);
3913 static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
3915 struct kvm_mmu *context = &vcpu->arch.mmu;
3917 context->base_role.word = 0;
3918 context->page_fault = tdp_page_fault;
3919 context->sync_page = nonpaging_sync_page;
3920 context->invlpg = nonpaging_invlpg;
3921 context->update_pte = nonpaging_update_pte;
3922 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
3923 context->root_hpa = INVALID_PAGE;
3924 context->direct_map = true;
3925 context->set_cr3 = kvm_x86_ops->set_tdp_cr3;
3926 context->get_cr3 = get_cr3;
3927 context->get_pdptr = kvm_pdptr_read;
3928 context->inject_page_fault = kvm_inject_page_fault;
3930 if (!is_paging(vcpu)) {
3931 context->nx = false;
3932 context->gva_to_gpa = nonpaging_gva_to_gpa;
3933 context->root_level = 0;
3934 } else if (is_long_mode(vcpu)) {
3935 context->nx = is_nx(vcpu);
3936 context->root_level = PT64_ROOT_LEVEL;
3937 reset_rsvds_bits_mask(vcpu, context);
3938 context->gva_to_gpa = paging64_gva_to_gpa;
3939 } else if (is_pae(vcpu)) {
3940 context->nx = is_nx(vcpu);
3941 context->root_level = PT32E_ROOT_LEVEL;
3942 reset_rsvds_bits_mask(vcpu, context);
3943 context->gva_to_gpa = paging64_gva_to_gpa;
3945 context->nx = false;
3946 context->root_level = PT32_ROOT_LEVEL;
3947 reset_rsvds_bits_mask(vcpu, context);
3948 context->gva_to_gpa = paging32_gva_to_gpa;
3951 update_permission_bitmask(vcpu, context, false);
3952 update_last_pte_bitmap(vcpu, context);
3955 void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu)
3957 bool smep = kvm_read_cr4_bits(vcpu, X86_CR4_SMEP);
3958 bool smap = kvm_read_cr4_bits(vcpu, X86_CR4_SMAP);
3959 struct kvm_mmu *context = &vcpu->arch.mmu;
3961 MMU_WARN_ON(VALID_PAGE(context->root_hpa));
3963 if (!is_paging(vcpu))
3964 nonpaging_init_context(vcpu, context);
3965 else if (is_long_mode(vcpu))
3966 paging64_init_context(vcpu, context);
3967 else if (is_pae(vcpu))
3968 paging32E_init_context(vcpu, context);
3970 paging32_init_context(vcpu, context);
3972 context->base_role.nxe = is_nx(vcpu);
3973 context->base_role.cr4_pae = !!is_pae(vcpu);
3974 context->base_role.cr0_wp = is_write_protection(vcpu);
3975 context->base_role.smep_andnot_wp
3976 = smep && !is_write_protection(vcpu);
3977 context->base_role.smap_andnot_wp
3978 = smap && !is_write_protection(vcpu);
3980 EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu);
3982 void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly)
3984 struct kvm_mmu *context = &vcpu->arch.mmu;
3986 MMU_WARN_ON(VALID_PAGE(context->root_hpa));
3988 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
3991 context->page_fault = ept_page_fault;
3992 context->gva_to_gpa = ept_gva_to_gpa;
3993 context->sync_page = ept_sync_page;
3994 context->invlpg = ept_invlpg;
3995 context->update_pte = ept_update_pte;
3996 context->root_level = context->shadow_root_level;
3997 context->root_hpa = INVALID_PAGE;
3998 context->direct_map = false;
4000 update_permission_bitmask(vcpu, context, true);
4001 reset_rsvds_bits_mask_ept(vcpu, context, execonly);
4003 EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu);
4005 static void init_kvm_softmmu(struct kvm_vcpu *vcpu)
4007 struct kvm_mmu *context = &vcpu->arch.mmu;
4009 kvm_init_shadow_mmu(vcpu);
4010 context->set_cr3 = kvm_x86_ops->set_cr3;
4011 context->get_cr3 = get_cr3;
4012 context->get_pdptr = kvm_pdptr_read;
4013 context->inject_page_fault = kvm_inject_page_fault;
4016 static void init_kvm_nested_mmu(struct kvm_vcpu *vcpu)
4018 struct kvm_mmu *g_context = &vcpu->arch.nested_mmu;
4020 g_context->get_cr3 = get_cr3;
4021 g_context->get_pdptr = kvm_pdptr_read;
4022 g_context->inject_page_fault = kvm_inject_page_fault;
4025 * Note that arch.mmu.gva_to_gpa translates l2_gva to l1_gpa. The
4026 * translation of l2_gpa to l1_gpa addresses is done using the
4027 * arch.nested_mmu.gva_to_gpa function. Basically the gva_to_gpa
4028 * functions between mmu and nested_mmu are swapped.
4030 if (!is_paging(vcpu)) {
4031 g_context->nx = false;
4032 g_context->root_level = 0;
4033 g_context->gva_to_gpa = nonpaging_gva_to_gpa_nested;
4034 } else if (is_long_mode(vcpu)) {
4035 g_context->nx = is_nx(vcpu);
4036 g_context->root_level = PT64_ROOT_LEVEL;
4037 reset_rsvds_bits_mask(vcpu, g_context);
4038 g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
4039 } else if (is_pae(vcpu)) {
4040 g_context->nx = is_nx(vcpu);
4041 g_context->root_level = PT32E_ROOT_LEVEL;
4042 reset_rsvds_bits_mask(vcpu, g_context);
4043 g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
4045 g_context->nx = false;
4046 g_context->root_level = PT32_ROOT_LEVEL;
4047 reset_rsvds_bits_mask(vcpu, g_context);
4048 g_context->gva_to_gpa = paging32_gva_to_gpa_nested;
4051 update_permission_bitmask(vcpu, g_context, false);
4052 update_last_pte_bitmap(vcpu, g_context);
4055 static void init_kvm_mmu(struct kvm_vcpu *vcpu)
4057 if (mmu_is_nested(vcpu))
4058 init_kvm_nested_mmu(vcpu);
4059 else if (tdp_enabled)
4060 init_kvm_tdp_mmu(vcpu);
4062 init_kvm_softmmu(vcpu);
4065 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
4067 kvm_mmu_unload(vcpu);
4070 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
4072 int kvm_mmu_load(struct kvm_vcpu *vcpu)
4076 r = mmu_topup_memory_caches(vcpu);
4079 r = mmu_alloc_roots(vcpu);
4080 kvm_mmu_sync_roots(vcpu);
4083 /* set_cr3() should ensure TLB has been flushed */
4084 vcpu->arch.mmu.set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
4088 EXPORT_SYMBOL_GPL(kvm_mmu_load);
4090 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
4092 mmu_free_roots(vcpu);
4093 WARN_ON(VALID_PAGE(vcpu->arch.mmu.root_hpa));
4095 EXPORT_SYMBOL_GPL(kvm_mmu_unload);
4097 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4098 struct kvm_mmu_page *sp, u64 *spte,
4101 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
4102 ++vcpu->kvm->stat.mmu_pde_zapped;
4106 ++vcpu->kvm->stat.mmu_pte_updated;
4107 vcpu->arch.mmu.update_pte(vcpu, sp, spte, new);
4110 static bool need_remote_flush(u64 old, u64 new)
4112 if (!is_shadow_present_pte(old))
4114 if (!is_shadow_present_pte(new))
4116 if ((old ^ new) & PT64_BASE_ADDR_MASK)
4118 old ^= shadow_nx_mask;
4119 new ^= shadow_nx_mask;
4120 return (old & ~new & PT64_PERM_MASK) != 0;
4123 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, bool zap_page,
4124 bool remote_flush, bool local_flush)
4130 kvm_flush_remote_tlbs(vcpu->kvm);
4131 else if (local_flush)
4132 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
4135 static u64 mmu_pte_write_fetch_gpte(struct kvm_vcpu *vcpu, gpa_t *gpa,
4136 const u8 *new, int *bytes)
4142 * Assume that the pte write on a page table of the same type
4143 * as the current vcpu paging mode since we update the sptes only
4144 * when they have the same mode.
4146 if (is_pae(vcpu) && *bytes == 4) {
4147 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
4150 r = kvm_read_guest(vcpu->kvm, *gpa, &gentry, 8);
4153 new = (const u8 *)&gentry;
4158 gentry = *(const u32 *)new;
4161 gentry = *(const u64 *)new;
4172 * If we're seeing too many writes to a page, it may no longer be a page table,
4173 * or we may be forking, in which case it is better to unmap the page.
4175 static bool detect_write_flooding(struct kvm_mmu_page *sp)
4178 * Skip write-flooding detected for the sp whose level is 1, because
4179 * it can become unsync, then the guest page is not write-protected.
4181 if (sp->role.level == PT_PAGE_TABLE_LEVEL)
4184 return ++sp->write_flooding_count >= 3;
4188 * Misaligned accesses are too much trouble to fix up; also, they usually
4189 * indicate a page is not used as a page table.
4191 static bool detect_write_misaligned(struct kvm_mmu_page *sp, gpa_t gpa,
4194 unsigned offset, pte_size, misaligned;
4196 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4197 gpa, bytes, sp->role.word);
4199 offset = offset_in_page(gpa);
4200 pte_size = sp->role.cr4_pae ? 8 : 4;
4203 * Sometimes, the OS only writes the last one bytes to update status
4204 * bits, for example, in linux, andb instruction is used in clear_bit().
4206 if (!(offset & (pte_size - 1)) && bytes == 1)
4209 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
4210 misaligned |= bytes < 4;
4215 static u64 *get_written_sptes(struct kvm_mmu_page *sp, gpa_t gpa, int *nspte)
4217 unsigned page_offset, quadrant;
4221 page_offset = offset_in_page(gpa);
4222 level = sp->role.level;
4224 if (!sp->role.cr4_pae) {
4225 page_offset <<= 1; /* 32->64 */
4227 * A 32-bit pde maps 4MB while the shadow pdes map
4228 * only 2MB. So we need to double the offset again
4229 * and zap two pdes instead of one.
4231 if (level == PT32_ROOT_LEVEL) {
4232 page_offset &= ~7; /* kill rounding error */
4236 quadrant = page_offset >> PAGE_SHIFT;
4237 page_offset &= ~PAGE_MASK;
4238 if (quadrant != sp->role.quadrant)
4242 spte = &sp->spt[page_offset / sizeof(*spte)];
4246 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
4247 const u8 *new, int bytes)
4249 gfn_t gfn = gpa >> PAGE_SHIFT;
4250 struct kvm_mmu_page *sp;
4251 LIST_HEAD(invalid_list);
4252 u64 entry, gentry, *spte;
4254 bool remote_flush, local_flush, zap_page;
4255 union kvm_mmu_page_role mask = (union kvm_mmu_page_role) {
4259 .smep_andnot_wp = 1,
4260 .smap_andnot_wp = 1,
4264 * If we don't have indirect shadow pages, it means no page is
4265 * write-protected, so we can exit simply.
4267 if (!ACCESS_ONCE(vcpu->kvm->arch.indirect_shadow_pages))
4270 zap_page = remote_flush = local_flush = false;
4272 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
4274 gentry = mmu_pte_write_fetch_gpte(vcpu, &gpa, new, &bytes);
4277 * No need to care whether allocation memory is successful
4278 * or not since pte prefetch is skiped if it does not have
4279 * enough objects in the cache.
4281 mmu_topup_memory_caches(vcpu);
4283 spin_lock(&vcpu->kvm->mmu_lock);
4284 ++vcpu->kvm->stat.mmu_pte_write;
4285 kvm_mmu_audit(vcpu, AUDIT_PRE_PTE_WRITE);
4287 for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) {
4288 if (detect_write_misaligned(sp, gpa, bytes) ||
4289 detect_write_flooding(sp)) {
4290 zap_page |= !!kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
4292 ++vcpu->kvm->stat.mmu_flooded;
4296 spte = get_written_sptes(sp, gpa, &npte);
4303 mmu_page_zap_pte(vcpu->kvm, sp, spte);
4305 !((sp->role.word ^ vcpu->arch.mmu.base_role.word)
4306 & mask.word) && rmap_can_add(vcpu))
4307 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
4308 if (need_remote_flush(entry, *spte))
4309 remote_flush = true;
4313 mmu_pte_write_flush_tlb(vcpu, zap_page, remote_flush, local_flush);
4314 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
4315 kvm_mmu_audit(vcpu, AUDIT_POST_PTE_WRITE);
4316 spin_unlock(&vcpu->kvm->mmu_lock);
4319 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
4324 if (vcpu->arch.mmu.direct_map)
4327 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
4329 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4333 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
4335 static void make_mmu_pages_available(struct kvm_vcpu *vcpu)
4337 LIST_HEAD(invalid_list);
4339 if (likely(kvm_mmu_available_pages(vcpu->kvm) >= KVM_MIN_FREE_MMU_PAGES))
4342 while (kvm_mmu_available_pages(vcpu->kvm) < KVM_REFILL_PAGES) {
4343 if (!prepare_zap_oldest_mmu_page(vcpu->kvm, &invalid_list))
4346 ++vcpu->kvm->stat.mmu_recycled;
4348 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
4351 static bool is_mmio_page_fault(struct kvm_vcpu *vcpu, gva_t addr)
4353 if (vcpu->arch.mmu.direct_map || mmu_is_nested(vcpu))
4354 return vcpu_match_mmio_gpa(vcpu, addr);
4356 return vcpu_match_mmio_gva(vcpu, addr);
4359 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code,
4360 void *insn, int insn_len)
4362 int r, emulation_type = EMULTYPE_RETRY;
4363 enum emulation_result er;
4365 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code, false);
4374 if (is_mmio_page_fault(vcpu, cr2))
4377 er = x86_emulate_instruction(vcpu, cr2, emulation_type, insn, insn_len);
4382 case EMULATE_USER_EXIT:
4383 ++vcpu->stat.mmio_exits;
4393 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
4395 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
4397 vcpu->arch.mmu.invlpg(vcpu, gva);
4398 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
4399 ++vcpu->stat.invlpg;
4401 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
4403 void kvm_enable_tdp(void)
4407 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
4409 void kvm_disable_tdp(void)
4411 tdp_enabled = false;
4413 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
4415 static void free_mmu_pages(struct kvm_vcpu *vcpu)
4417 free_page((unsigned long)vcpu->arch.mmu.pae_root);
4418 if (vcpu->arch.mmu.lm_root != NULL)
4419 free_page((unsigned long)vcpu->arch.mmu.lm_root);
4422 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
4428 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
4429 * Therefore we need to allocate shadow page tables in the first
4430 * 4GB of memory, which happens to fit the DMA32 zone.
4432 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
4436 vcpu->arch.mmu.pae_root = page_address(page);
4437 for (i = 0; i < 4; ++i)
4438 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
4443 int kvm_mmu_create(struct kvm_vcpu *vcpu)
4445 vcpu->arch.walk_mmu = &vcpu->arch.mmu;
4446 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4447 vcpu->arch.mmu.translate_gpa = translate_gpa;
4448 vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
4450 return alloc_mmu_pages(vcpu);
4453 void kvm_mmu_setup(struct kvm_vcpu *vcpu)
4455 MMU_WARN_ON(VALID_PAGE(vcpu->arch.mmu.root_hpa));
4460 /* The return value indicates if tlb flush on all vcpus is needed. */
4461 typedef bool (*slot_level_handler) (struct kvm *kvm, unsigned long *rmap);
4463 /* The caller should hold mmu-lock before calling this function. */
4465 slot_handle_level_range(struct kvm *kvm, struct kvm_memory_slot *memslot,
4466 slot_level_handler fn, int start_level, int end_level,
4467 gfn_t start_gfn, gfn_t end_gfn, bool lock_flush_tlb)
4469 struct slot_rmap_walk_iterator iterator;
4472 for_each_slot_rmap_range(memslot, start_level, end_level, start_gfn,
4473 end_gfn, &iterator) {
4475 flush |= fn(kvm, iterator.rmap);
4477 if (need_resched() || spin_needbreak(&kvm->mmu_lock)) {
4478 if (flush && lock_flush_tlb) {
4479 kvm_flush_remote_tlbs(kvm);
4482 cond_resched_lock(&kvm->mmu_lock);
4486 if (flush && lock_flush_tlb) {
4487 kvm_flush_remote_tlbs(kvm);
4495 slot_handle_level(struct kvm *kvm, struct kvm_memory_slot *memslot,
4496 slot_level_handler fn, int start_level, int end_level,
4497 bool lock_flush_tlb)
4499 return slot_handle_level_range(kvm, memslot, fn, start_level,
4500 end_level, memslot->base_gfn,
4501 memslot->base_gfn + memslot->npages - 1,
4506 slot_handle_all_level(struct kvm *kvm, struct kvm_memory_slot *memslot,
4507 slot_level_handler fn, bool lock_flush_tlb)
4509 return slot_handle_level(kvm, memslot, fn, PT_PAGE_TABLE_LEVEL,
4510 PT_MAX_HUGEPAGE_LEVEL, lock_flush_tlb);
4514 slot_handle_large_level(struct kvm *kvm, struct kvm_memory_slot *memslot,
4515 slot_level_handler fn, bool lock_flush_tlb)
4517 return slot_handle_level(kvm, memslot, fn, PT_PAGE_TABLE_LEVEL + 1,
4518 PT_MAX_HUGEPAGE_LEVEL, lock_flush_tlb);
4522 slot_handle_leaf(struct kvm *kvm, struct kvm_memory_slot *memslot,
4523 slot_level_handler fn, bool lock_flush_tlb)
4525 return slot_handle_level(kvm, memslot, fn, PT_PAGE_TABLE_LEVEL,
4526 PT_PAGE_TABLE_LEVEL, lock_flush_tlb);
4529 void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end)
4531 struct kvm_memslots *slots;
4532 struct kvm_memory_slot *memslot;
4534 slots = kvm_memslots(kvm);
4536 spin_lock(&kvm->mmu_lock);
4537 kvm_for_each_memslot(memslot, slots) {
4540 start = max(gfn_start, memslot->base_gfn);
4541 end = min(gfn_end, memslot->base_gfn + memslot->npages);
4545 slot_handle_level_range(kvm, memslot, kvm_zap_rmapp,
4546 PT_PAGE_TABLE_LEVEL, PT_MAX_HUGEPAGE_LEVEL,
4547 start, end - 1, true);
4550 spin_unlock(&kvm->mmu_lock);
4553 static bool slot_rmap_write_protect(struct kvm *kvm, unsigned long *rmapp)
4555 return __rmap_write_protect(kvm, rmapp, false);
4558 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
4559 struct kvm_memory_slot *memslot)
4563 spin_lock(&kvm->mmu_lock);
4564 flush = slot_handle_all_level(kvm, memslot, slot_rmap_write_protect,
4566 spin_unlock(&kvm->mmu_lock);
4569 * kvm_mmu_slot_remove_write_access() and kvm_vm_ioctl_get_dirty_log()
4570 * which do tlb flush out of mmu-lock should be serialized by
4571 * kvm->slots_lock otherwise tlb flush would be missed.
4573 lockdep_assert_held(&kvm->slots_lock);
4576 * We can flush all the TLBs out of the mmu lock without TLB
4577 * corruption since we just change the spte from writable to
4578 * readonly so that we only need to care the case of changing
4579 * spte from present to present (changing the spte from present
4580 * to nonpresent will flush all the TLBs immediately), in other
4581 * words, the only case we care is mmu_spte_update() where we
4582 * haved checked SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE
4583 * instead of PT_WRITABLE_MASK, that means it does not depend
4584 * on PT_WRITABLE_MASK anymore.
4587 kvm_flush_remote_tlbs(kvm);
4590 static bool kvm_mmu_zap_collapsible_spte(struct kvm *kvm,
4591 unsigned long *rmapp)
4594 struct rmap_iterator iter;
4595 int need_tlb_flush = 0;
4597 struct kvm_mmu_page *sp;
4600 for_each_rmap_spte(rmapp, &iter, sptep) {
4601 sp = page_header(__pa(sptep));
4602 pfn = spte_to_pfn(*sptep);
4605 * We cannot do huge page mapping for indirect shadow pages,
4606 * which are found on the last rmap (level = 1) when not using
4607 * tdp; such shadow pages are synced with the page table in
4608 * the guest, and the guest page table is using 4K page size
4609 * mapping if the indirect sp has level = 1.
4611 if (sp->role.direct &&
4612 !kvm_is_reserved_pfn(pfn) &&
4613 PageTransCompound(pfn_to_page(pfn))) {
4614 drop_spte(kvm, sptep);
4620 return need_tlb_flush;
4623 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
4624 struct kvm_memory_slot *memslot)
4626 spin_lock(&kvm->mmu_lock);
4627 slot_handle_leaf(kvm, memslot, kvm_mmu_zap_collapsible_spte, true);
4628 spin_unlock(&kvm->mmu_lock);
4631 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
4632 struct kvm_memory_slot *memslot)
4636 spin_lock(&kvm->mmu_lock);
4637 flush = slot_handle_leaf(kvm, memslot, __rmap_clear_dirty, false);
4638 spin_unlock(&kvm->mmu_lock);
4640 lockdep_assert_held(&kvm->slots_lock);
4643 * It's also safe to flush TLBs out of mmu lock here as currently this
4644 * function is only used for dirty logging, in which case flushing TLB
4645 * out of mmu lock also guarantees no dirty pages will be lost in
4649 kvm_flush_remote_tlbs(kvm);
4651 EXPORT_SYMBOL_GPL(kvm_mmu_slot_leaf_clear_dirty);
4653 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm,
4654 struct kvm_memory_slot *memslot)
4658 spin_lock(&kvm->mmu_lock);
4659 flush = slot_handle_large_level(kvm, memslot, slot_rmap_write_protect,
4661 spin_unlock(&kvm->mmu_lock);
4663 /* see kvm_mmu_slot_remove_write_access */
4664 lockdep_assert_held(&kvm->slots_lock);
4667 kvm_flush_remote_tlbs(kvm);
4669 EXPORT_SYMBOL_GPL(kvm_mmu_slot_largepage_remove_write_access);
4671 void kvm_mmu_slot_set_dirty(struct kvm *kvm,
4672 struct kvm_memory_slot *memslot)
4676 spin_lock(&kvm->mmu_lock);
4677 flush = slot_handle_all_level(kvm, memslot, __rmap_set_dirty, false);
4678 spin_unlock(&kvm->mmu_lock);
4680 lockdep_assert_held(&kvm->slots_lock);
4682 /* see kvm_mmu_slot_leaf_clear_dirty */
4684 kvm_flush_remote_tlbs(kvm);
4686 EXPORT_SYMBOL_GPL(kvm_mmu_slot_set_dirty);
4688 #define BATCH_ZAP_PAGES 10
4689 static void kvm_zap_obsolete_pages(struct kvm *kvm)
4691 struct kvm_mmu_page *sp, *node;
4695 list_for_each_entry_safe_reverse(sp, node,
4696 &kvm->arch.active_mmu_pages, link) {
4700 * No obsolete page exists before new created page since
4701 * active_mmu_pages is the FIFO list.
4703 if (!is_obsolete_sp(kvm, sp))
4707 * Since we are reversely walking the list and the invalid
4708 * list will be moved to the head, skip the invalid page
4709 * can help us to avoid the infinity list walking.
4711 if (sp->role.invalid)
4715 * Need not flush tlb since we only zap the sp with invalid
4716 * generation number.
4718 if (batch >= BATCH_ZAP_PAGES &&
4719 cond_resched_lock(&kvm->mmu_lock)) {
4724 ret = kvm_mmu_prepare_zap_page(kvm, sp,
4725 &kvm->arch.zapped_obsolete_pages);
4733 * Should flush tlb before free page tables since lockless-walking
4734 * may use the pages.
4736 kvm_mmu_commit_zap_page(kvm, &kvm->arch.zapped_obsolete_pages);
4740 * Fast invalidate all shadow pages and use lock-break technique
4741 * to zap obsolete pages.
4743 * It's required when memslot is being deleted or VM is being
4744 * destroyed, in these cases, we should ensure that KVM MMU does
4745 * not use any resource of the being-deleted slot or all slots
4746 * after calling the function.
4748 void kvm_mmu_invalidate_zap_all_pages(struct kvm *kvm)
4750 spin_lock(&kvm->mmu_lock);
4751 trace_kvm_mmu_invalidate_zap_all_pages(kvm);
4752 kvm->arch.mmu_valid_gen++;
4755 * Notify all vcpus to reload its shadow page table
4756 * and flush TLB. Then all vcpus will switch to new
4757 * shadow page table with the new mmu_valid_gen.
4759 * Note: we should do this under the protection of
4760 * mmu-lock, otherwise, vcpu would purge shadow page
4761 * but miss tlb flush.
4763 kvm_reload_remote_mmus(kvm);
4765 kvm_zap_obsolete_pages(kvm);
4766 spin_unlock(&kvm->mmu_lock);
4769 static bool kvm_has_zapped_obsolete_pages(struct kvm *kvm)
4771 return unlikely(!list_empty_careful(&kvm->arch.zapped_obsolete_pages));
4774 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm)
4777 * The very rare case: if the generation-number is round,
4778 * zap all shadow pages.
4780 if (unlikely(kvm_current_mmio_generation(kvm) == 0)) {
4781 printk_ratelimited(KERN_DEBUG "kvm: zapping shadow pages for mmio generation wraparound\n");
4782 kvm_mmu_invalidate_zap_all_pages(kvm);
4786 static unsigned long
4787 mmu_shrink_scan(struct shrinker *shrink, struct shrink_control *sc)
4790 int nr_to_scan = sc->nr_to_scan;
4791 unsigned long freed = 0;
4793 spin_lock(&kvm_lock);
4795 list_for_each_entry(kvm, &vm_list, vm_list) {
4797 LIST_HEAD(invalid_list);
4800 * Never scan more than sc->nr_to_scan VM instances.
4801 * Will not hit this condition practically since we do not try
4802 * to shrink more than one VM and it is very unlikely to see
4803 * !n_used_mmu_pages so many times.
4808 * n_used_mmu_pages is accessed without holding kvm->mmu_lock
4809 * here. We may skip a VM instance errorneosly, but we do not
4810 * want to shrink a VM that only started to populate its MMU
4813 if (!kvm->arch.n_used_mmu_pages &&
4814 !kvm_has_zapped_obsolete_pages(kvm))
4817 idx = srcu_read_lock(&kvm->srcu);
4818 spin_lock(&kvm->mmu_lock);
4820 if (kvm_has_zapped_obsolete_pages(kvm)) {
4821 kvm_mmu_commit_zap_page(kvm,
4822 &kvm->arch.zapped_obsolete_pages);
4826 if (prepare_zap_oldest_mmu_page(kvm, &invalid_list))
4828 kvm_mmu_commit_zap_page(kvm, &invalid_list);
4831 spin_unlock(&kvm->mmu_lock);
4832 srcu_read_unlock(&kvm->srcu, idx);
4835 * unfair on small ones
4836 * per-vm shrinkers cry out
4837 * sadness comes quickly
4839 list_move_tail(&kvm->vm_list, &vm_list);
4843 spin_unlock(&kvm_lock);
4847 static unsigned long
4848 mmu_shrink_count(struct shrinker *shrink, struct shrink_control *sc)
4850 return percpu_counter_read_positive(&kvm_total_used_mmu_pages);
4853 static struct shrinker mmu_shrinker = {
4854 .count_objects = mmu_shrink_count,
4855 .scan_objects = mmu_shrink_scan,
4856 .seeks = DEFAULT_SEEKS * 10,
4859 static void mmu_destroy_caches(void)
4861 if (pte_list_desc_cache)
4862 kmem_cache_destroy(pte_list_desc_cache);
4863 if (mmu_page_header_cache)
4864 kmem_cache_destroy(mmu_page_header_cache);
4867 int kvm_mmu_module_init(void)
4869 pte_list_desc_cache = kmem_cache_create("pte_list_desc",
4870 sizeof(struct pte_list_desc),
4872 if (!pte_list_desc_cache)
4875 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
4876 sizeof(struct kvm_mmu_page),
4878 if (!mmu_page_header_cache)
4881 if (percpu_counter_init(&kvm_total_used_mmu_pages, 0, GFP_KERNEL))
4884 register_shrinker(&mmu_shrinker);
4889 mmu_destroy_caches();
4894 * Caculate mmu pages needed for kvm.
4896 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
4898 unsigned int nr_mmu_pages;
4899 unsigned int nr_pages = 0;
4900 struct kvm_memslots *slots;
4901 struct kvm_memory_slot *memslot;
4903 slots = kvm_memslots(kvm);
4905 kvm_for_each_memslot(memslot, slots)
4906 nr_pages += memslot->npages;
4908 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
4909 nr_mmu_pages = max(nr_mmu_pages,
4910 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
4912 return nr_mmu_pages;
4915 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
4917 struct kvm_shadow_walk_iterator iterator;
4921 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
4924 walk_shadow_page_lockless_begin(vcpu);
4925 for_each_shadow_entry_lockless(vcpu, addr, iterator, spte) {
4926 sptes[iterator.level-1] = spte;
4928 if (!is_shadow_present_pte(spte))
4931 walk_shadow_page_lockless_end(vcpu);
4935 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
4937 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
4939 kvm_mmu_unload(vcpu);
4940 free_mmu_pages(vcpu);
4941 mmu_free_memory_caches(vcpu);
4944 void kvm_mmu_module_exit(void)
4946 mmu_destroy_caches();
4947 percpu_counter_destroy(&kvm_total_used_mmu_pages);
4948 unregister_shrinker(&mmu_shrinker);
4949 mmu_audit_disable();