arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <trace/events/kvm.h>
  52
  53 #define CREATE_TRACE_POINTS
  54 #include "trace.h"
  55
  56 #include <asm/debugreg.h>
  57 #include <asm/msr.h>
  58 #include <asm/desc.h>
  59 #include <asm/mtrr.h>
  60 #include <asm/mce.h>
  61 #include <asm/i387.h>
  62 #include <asm/fpu-internal.h> /* Ugh! */
  63 #include <asm/xcr.h>
  64 #include <asm/pvclock.h>
  65 #include <asm/div64.h>
  66
  67 #define MAX_IO_MSRS 256
  68 #define KVM_MAX_MCE_BANKS 32
  69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  70
  71 #define emul_to_vcpu(ctxt) \
  72         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  73
  74 /* EFER defaults:
  75  * - enable syscall per default because its emulated by KVM
  76  * - enable LME and LMA per default on 64 bit KVM
  77  */
  78 #ifdef CONFIG_X86_64
  79 static
  80 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  81 #else
  82 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  83 #endif
  84
  85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  87
  88 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  89 static void process_nmi(struct kvm_vcpu *vcpu);
  90
  91 struct kvm_x86_ops *kvm_x86_ops;
  92 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  93
  94 static bool ignore_msrs = 0;
  95 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  96
  97 bool kvm_has_tsc_control;
  98 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  99 u32  kvm_max_guest_tsc_khz;
 100 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 101
 102 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 103 static u32 tsc_tolerance_ppm = 250;
 104 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 105
 106 #define KVM_NR_SHARED_MSRS 16
 107
 108 struct kvm_shared_msrs_global {
 109         int nr;
 110         u32 msrs[KVM_NR_SHARED_MSRS];
 111 };
 112
 113 struct kvm_shared_msrs {
 114         struct user_return_notifier urn;
 115         bool registered;
 116         struct kvm_shared_msr_values {
 117                 u64 host;
 118                 u64 curr;
 119         } values[KVM_NR_SHARED_MSRS];
 120 };
 121
 122 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 123 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 124
 125 struct kvm_stats_debugfs_item debugfs_entries[] = {
 126         { "pf_fixed", VCPU_STAT(pf_fixed) },
 127         { "pf_guest", VCPU_STAT(pf_guest) },
 128         { "tlb_flush", VCPU_STAT(tlb_flush) },
 129         { "invlpg", VCPU_STAT(invlpg) },
 130         { "exits", VCPU_STAT(exits) },
 131         { "io_exits", VCPU_STAT(io_exits) },
 132         { "mmio_exits", VCPU_STAT(mmio_exits) },
 133         { "signal_exits", VCPU_STAT(signal_exits) },
 134         { "irq_window", VCPU_STAT(irq_window_exits) },
 135         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 136         { "halt_exits", VCPU_STAT(halt_exits) },
 137         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 138         { "hypercalls", VCPU_STAT(hypercalls) },
 139         { "request_irq", VCPU_STAT(request_irq_exits) },
 140         { "irq_exits", VCPU_STAT(irq_exits) },
 141         { "host_state_reload", VCPU_STAT(host_state_reload) },
 142         { "efer_reload", VCPU_STAT(efer_reload) },
 143         { "fpu_reload", VCPU_STAT(fpu_reload) },
 144         { "insn_emulation", VCPU_STAT(insn_emulation) },
 145         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 146         { "irq_injections", VCPU_STAT(irq_injections) },
 147         { "nmi_injections", VCPU_STAT(nmi_injections) },
 148         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 149         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 150         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 151         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 152         { "mmu_flooded", VM_STAT(mmu_flooded) },
 153         { "mmu_recycled", VM_STAT(mmu_recycled) },
 154         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 155         { "mmu_unsync", VM_STAT(mmu_unsync) },
 156         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 157         { "largepages", VM_STAT(lpages) },
 158         { NULL }
 159 };
 160
 161 u64 __read_mostly host_xcr0;
 162
 163 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 164
 165 static int kvm_vcpu_reset(struct kvm_vcpu *vcpu);
 166
 167 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 168 {
 169         int i;
 170         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 171                 vcpu->arch.apf.gfns[i] = ~0;
 172 }
 173
 174 static void kvm_on_user_return(struct user_return_notifier *urn)
 175 {
 176         unsigned slot;
 177         struct kvm_shared_msrs *locals
 178                 = container_of(urn, struct kvm_shared_msrs, urn);
 179         struct kvm_shared_msr_values *values;
 180
 181         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 182                 values = &locals->values[slot];
 183                 if (values->host != values->curr) {
 184                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 185                         values->curr = values->host;
 186                 }
 187         }
 188         locals->registered = false;
 189         user_return_notifier_unregister(urn);
 190 }
 191
 192 static void shared_msr_update(unsigned slot, u32 msr)
 193 {
 194         struct kvm_shared_msrs *smsr;
 195         u64 value;
 196
 197         smsr = &__get_cpu_var(shared_msrs);
 198         /* only read, and nobody should modify it at this time,
 199          * so don't need lock */
 200         if (slot >= shared_msrs_global.nr) {
 201                 printk(KERN_ERR "kvm: invalid MSR slot!");
 202                 return;
 203         }
 204         rdmsrl_safe(msr, &value);
 205         smsr->values[slot].host = value;
 206         smsr->values[slot].curr = value;
 207 }
 208
 209 void kvm_define_shared_msr(unsigned slot, u32 msr)
 210 {
 211         if (slot >= shared_msrs_global.nr)
 212                 shared_msrs_global.nr = slot + 1;
 213         shared_msrs_global.msrs[slot] = msr;
 214         /* we need ensured the shared_msr_global have been updated */
 215         smp_wmb();
 216 }
 217 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 218
 219 static void kvm_shared_msr_cpu_online(void)
 220 {
 221         unsigned i;
 222
 223         for (i = 0; i < shared_msrs_global.nr; ++i)
 224                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 225 }
 226
 227 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 228 {
 229         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 230
 231         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 232                 return;
 233         smsr->values[slot].curr = value;
 234         wrmsrl(shared_msrs_global.msrs[slot], value);
 235         if (!smsr->registered) {
 236                 smsr->urn.on_user_return = kvm_on_user_return;
 237                 user_return_notifier_register(&smsr->urn);
 238                 smsr->registered = true;
 239         }
 240 }
 241 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 242
 243 static void drop_user_return_notifiers(void *ignore)
 244 {
 245         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 246
 247         if (smsr->registered)
 248                 kvm_on_user_return(&smsr->urn);
 249 }
 250
 251 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 252 {
 253         return vcpu->arch.apic_base;
 254 }
 255 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 256
 257 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 258 {
 259         /* TODO: reserve bits check */
 260         kvm_lapic_set_base(vcpu, data);
 261 }
 262 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 263
 264 #define EXCPT_BENIGN            0
 265 #define EXCPT_CONTRIBUTORY      1
 266 #define EXCPT_PF                2
 267
 268 static int exception_class(int vector)
 269 {
 270         switch (vector) {
 271         case PF_VECTOR:
 272                 return EXCPT_PF;
 273         case DE_VECTOR:
 274         case TS_VECTOR:
 275         case NP_VECTOR:
 276         case SS_VECTOR:
 277         case GP_VECTOR:
 278                 return EXCPT_CONTRIBUTORY;
 279         default:
 280                 break;
 281         }
 282         return EXCPT_BENIGN;
 283 }
 284
 285 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 286                 unsigned nr, bool has_error, u32 error_code,
 287                 bool reinject)
 288 {
 289         u32 prev_nr;
 290         int class1, class2;
 291
 292         kvm_make_request(KVM_REQ_EVENT, vcpu);
 293
 294         if (!vcpu->arch.exception.pending) {
 295         queue:
 296                 vcpu->arch.exception.pending = true;
 297                 vcpu->arch.exception.has_error_code = has_error;
 298                 vcpu->arch.exception.nr = nr;
 299                 vcpu->arch.exception.error_code = error_code;
 300                 vcpu->arch.exception.reinject = reinject;
 301                 return;
 302         }
 303
 304         /* to check exception */
 305         prev_nr = vcpu->arch.exception.nr;
 306         if (prev_nr == DF_VECTOR) {
 307                 /* triple fault -> shutdown */
 308                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 309                 return;
 310         }
 311         class1 = exception_class(prev_nr);
 312         class2 = exception_class(nr);
 313         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 314                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 315                 /* generate double fault per SDM Table 5-5 */
 316                 vcpu->arch.exception.pending = true;
 317                 vcpu->arch.exception.has_error_code = true;
 318                 vcpu->arch.exception.nr = DF_VECTOR;
 319                 vcpu->arch.exception.error_code = 0;
 320         } else
 321                 /* replace previous exception with a new one in a hope
 322                    that instruction re-execution will regenerate lost
 323                    exception */
 324                 goto queue;
 325 }
 326
 327 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 328 {
 329         kvm_multiple_exception(vcpu, nr, false, 0, false);
 330 }
 331 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 332
 333 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 334 {
 335         kvm_multiple_exception(vcpu, nr, false, 0, true);
 336 }
 337 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 338
 339 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 340 {
 341         if (err)
 342                 kvm_inject_gp(vcpu, 0);
 343         else
 344                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 345 }
 346 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 347
 348 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 349 {
 350         ++vcpu->stat.pf_guest;
 351         vcpu->arch.cr2 = fault->address;
 352         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 353 }
 354 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 355
 356 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 357 {
 358         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 359                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 360         else
 361                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 362 }
 363
 364 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 365 {
 366         atomic_inc(&vcpu->arch.nmi_queued);
 367         kvm_make_request(KVM_REQ_NMI, vcpu);
 368 }
 369 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 370
 371 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 372 {
 373         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 374 }
 375 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 376
 377 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 378 {
 379         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 380 }
 381 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 382
 383 /*
 384  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 385  * a #GP and return false.
 386  */
 387 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 388 {
 389         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 390                 return true;
 391         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 392         return false;
 393 }
 394 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 395
 396 /*
 397  * This function will be used to read from the physical memory of the currently
 398  * running guest. The difference to kvm_read_guest_page is that this function
 399  * can read from guest physical or from the guest's guest physical memory.
 400  */
 401 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 402                             gfn_t ngfn, void *data, int offset, int len,
 403                             u32 access)
 404 {
 405         gfn_t real_gfn;
 406         gpa_t ngpa;
 407
 408         ngpa     = gfn_to_gpa(ngfn);
 409         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 410         if (real_gfn == UNMAPPED_GVA)
 411                 return -EFAULT;
 412
 413         real_gfn = gpa_to_gfn(real_gfn);
 414
 415         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 416 }
 417 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 418
 419 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 420                                void *data, int offset, int len, u32 access)
 421 {
 422         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 423                                        data, offset, len, access);
 424 }
 425
 426 /*
 427  * Load the pae pdptrs.  Return true is they are all valid.
 428  */
 429 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 430 {
 431         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 432         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 433         int i;
 434         int ret;
 435         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 436
 437         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 438                                       offset * sizeof(u64), sizeof(pdpte),
 439                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 440         if (ret < 0) {
 441                 ret = 0;
 442                 goto out;
 443         }
 444         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 445                 if (is_present_gpte(pdpte[i]) &&
 446                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 447                         ret = 0;
 448                         goto out;
 449                 }
 450         }
 451         ret = 1;
 452
 453         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 454         __set_bit(VCPU_EXREG_PDPTR,
 455                   (unsigned long *)&vcpu->arch.regs_avail);
 456         __set_bit(VCPU_EXREG_PDPTR,
 457                   (unsigned long *)&vcpu->arch.regs_dirty);
 458 out:
 459
 460         return ret;
 461 }
 462 EXPORT_SYMBOL_GPL(load_pdptrs);
 463
 464 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 465 {
 466         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 467         bool changed = true;
 468         int offset;
 469         gfn_t gfn;
 470         int r;
 471
 472         if (is_long_mode(vcpu) || !is_pae(vcpu))
 473                 return false;
 474
 475         if (!test_bit(VCPU_EXREG_PDPTR,
 476                       (unsigned long *)&vcpu->arch.regs_avail))
 477                 return true;
 478
 479         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 480         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 481         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 482                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 483         if (r < 0)
 484                 goto out;
 485         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 486 out:
 487
 488         return changed;
 489 }
 490
 491 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 492 {
 493         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 494         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 495                                     X86_CR0_CD | X86_CR0_NW;
 496
 497         cr0 |= X86_CR0_ET;
 498
 499 #ifdef CONFIG_X86_64
 500         if (cr0 & 0xffffffff00000000UL)
 501                 return 1;
 502 #endif
 503
 504         cr0 &= ~CR0_RESERVED_BITS;
 505
 506         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 507                 return 1;
 508
 509         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 510                 return 1;
 511
 512         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 513 #ifdef CONFIG_X86_64
 514                 if ((vcpu->arch.efer & EFER_LME)) {
 515                         int cs_db, cs_l;
 516
 517                         if (!is_pae(vcpu))
 518                                 return 1;
 519                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 520                         if (cs_l)
 521                                 return 1;
 522                 } else
 523 #endif
 524                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 525                                                  kvm_read_cr3(vcpu)))
 526                         return 1;
 527         }
 528
 529         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 530                 return 1;
 531
 532         kvm_x86_ops->set_cr0(vcpu, cr0);
 533
 534         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 535                 kvm_clear_async_pf_completion_queue(vcpu);
 536                 kvm_async_pf_hash_reset(vcpu);
 537         }
 538
 539         if ((cr0 ^ old_cr0) & update_bits)
 540                 kvm_mmu_reset_context(vcpu);
 541         return 0;
 542 }
 543 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 544
 545 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 546 {
 547         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 548 }
 549 EXPORT_SYMBOL_GPL(kvm_lmsw);
 550
 551 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 552 {
 553         u64 xcr0;
 554
 555         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 556         if (index != XCR_XFEATURE_ENABLED_MASK)
 557                 return 1;
 558         xcr0 = xcr;
 559         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 560                 return 1;
 561         if (!(xcr0 & XSTATE_FP))
 562                 return 1;
 563         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 564                 return 1;
 565         if (xcr0 & ~host_xcr0)
 566                 return 1;
 567         vcpu->arch.xcr0 = xcr0;
 568         vcpu->guest_xcr0_loaded = 0;
 569         return 0;
 570 }
 571
 572 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 573 {
 574         if (__kvm_set_xcr(vcpu, index, xcr)) {
 575                 kvm_inject_gp(vcpu, 0);
 576                 return 1;
 577         }
 578         return 0;
 579 }
 580 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 581
 582 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 583 {
 584         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 585         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 586                                    X86_CR4_PAE | X86_CR4_SMEP;
 587         if (cr4 & CR4_RESERVED_BITS)
 588                 return 1;
 589
 590         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 591                 return 1;
 592
 593         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 594                 return 1;
 595
 596         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 597                 return 1;
 598
 599         if (is_long_mode(vcpu)) {
 600                 if (!(cr4 & X86_CR4_PAE))
 601                         return 1;
 602         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 603                    && ((cr4 ^ old_cr4) & pdptr_bits)
 604                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 605                                    kvm_read_cr3(vcpu)))
 606                 return 1;
 607
 608         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 609                 if (!guest_cpuid_has_pcid(vcpu))
 610                         return 1;
 611
 612                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 613                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 614                         return 1;
 615         }
 616
 617         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 618                 return 1;
 619
 620         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 621             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 622                 kvm_mmu_reset_context(vcpu);
 623
 624         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 625                 kvm_update_cpuid(vcpu);
 626
 627         return 0;
 628 }
 629 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 630
 631 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 632 {
 633         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 634                 kvm_mmu_sync_roots(vcpu);
 635                 kvm_mmu_flush_tlb(vcpu);
 636                 return 0;
 637         }
 638
 639         if (is_long_mode(vcpu)) {
 640                 if (kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)) {
 641                         if (cr3 & CR3_PCID_ENABLED_RESERVED_BITS)
 642                                 return 1;
 643                 } else
 644                         if (cr3 & CR3_L_MODE_RESERVED_BITS)
 645                                 return 1;
 646         } else {
 647                 if (is_pae(vcpu)) {
 648                         if (cr3 & CR3_PAE_RESERVED_BITS)
 649                                 return 1;
 650                         if (is_paging(vcpu) &&
 651                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 652                                 return 1;
 653                 }
 654                 /*
 655                  * We don't check reserved bits in nonpae mode, because
 656                  * this isn't enforced, and VMware depends on this.
 657                  */
 658         }
 659
 660         /*
 661          * Does the new cr3 value map to physical memory? (Note, we
 662          * catch an invalid cr3 even in real-mode, because it would
 663          * cause trouble later on when we turn on paging anyway.)
 664          *
 665          * A real CPU would silently accept an invalid cr3 and would
 666          * attempt to use it - with largely undefined (and often hard
 667          * to debug) behavior on the guest side.
 668          */
 669         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 670                 return 1;
 671         vcpu->arch.cr3 = cr3;
 672         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 673         vcpu->arch.mmu.new_cr3(vcpu);
 674         return 0;
 675 }
 676 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 677
 678 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 679 {
 680         if (cr8 & CR8_RESERVED_BITS)
 681                 return 1;
 682         if (irqchip_in_kernel(vcpu->kvm))
 683                 kvm_lapic_set_tpr(vcpu, cr8);
 684         else
 685                 vcpu->arch.cr8 = cr8;
 686         return 0;
 687 }
 688 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 689
 690 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 691 {
 692         if (irqchip_in_kernel(vcpu->kvm))
 693                 return kvm_lapic_get_cr8(vcpu);
 694         else
 695                 return vcpu->arch.cr8;
 696 }
 697 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 698
 699 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 700 {
 701         unsigned long dr7;
 702
 703         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 704                 dr7 = vcpu->arch.guest_debug_dr7;
 705         else
 706                 dr7 = vcpu->arch.dr7;
 707         kvm_x86_ops->set_dr7(vcpu, dr7);
 708         vcpu->arch.switch_db_regs = (dr7 & DR7_BP_EN_MASK);
 709 }
 710
 711 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 712 {
 713         switch (dr) {
 714         case 0 ... 3:
 715                 vcpu->arch.db[dr] = val;
 716                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 717                         vcpu->arch.eff_db[dr] = val;
 718                 break;
 719         case 4:
 720                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 721                         return 1; /* #UD */
 722                 /* fall through */
 723         case 6:
 724                 if (val & 0xffffffff00000000ULL)
 725                         return -1; /* #GP */
 726                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 727                 break;
 728         case 5:
 729                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 730                         return 1; /* #UD */
 731                 /* fall through */
 732         default: /* 7 */
 733                 if (val & 0xffffffff00000000ULL)
 734                         return -1; /* #GP */
 735                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 736                 kvm_update_dr7(vcpu);
 737                 break;
 738         }
 739
 740         return 0;
 741 }
 742
 743 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 744 {
 745         int res;
 746
 747         res = __kvm_set_dr(vcpu, dr, val);
 748         if (res > 0)
 749                 kvm_queue_exception(vcpu, UD_VECTOR);
 750         else if (res < 0)
 751                 kvm_inject_gp(vcpu, 0);
 752
 753         return res;
 754 }
 755 EXPORT_SYMBOL_GPL(kvm_set_dr);
 756
 757 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 758 {
 759         switch (dr) {
 760         case 0 ... 3:
 761                 *val = vcpu->arch.db[dr];
 762                 break;
 763         case 4:
 764                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 765                         return 1;
 766                 /* fall through */
 767         case 6:
 768                 *val = vcpu->arch.dr6;
 769                 break;
 770         case 5:
 771                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 772                         return 1;
 773                 /* fall through */
 774         default: /* 7 */
 775                 *val = vcpu->arch.dr7;
 776                 break;
 777         }
 778
 779         return 0;
 780 }
 781
 782 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 783 {
 784         if (_kvm_get_dr(vcpu, dr, val)) {
 785                 kvm_queue_exception(vcpu, UD_VECTOR);
 786                 return 1;
 787         }
 788         return 0;
 789 }
 790 EXPORT_SYMBOL_GPL(kvm_get_dr);
 791
 792 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 793 {
 794         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 795         u64 data;
 796         int err;
 797
 798         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 799         if (err)
 800                 return err;
 801         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 802         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 803         return err;
 804 }
 805 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 806
 807 /*
 808  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 809  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 810  *
 811  * This list is modified at module load time to reflect the
 812  * capabilities of the host cpu. This capabilities test skips MSRs that are
 813  * kvm-specific. Those are put in the beginning of the list.
 814  */
 815
 816 #define KVM_SAVE_MSRS_BEGIN     10
 817 static u32 msrs_to_save[] = {
 818         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 819         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 820         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 821         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 822         MSR_KVM_PV_EOI_EN,
 823         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 824         MSR_STAR,
 825 #ifdef CONFIG_X86_64
 826         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 827 #endif
 828         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 829 };
 830
 831 static unsigned num_msrs_to_save;
 832
 833 static const u32 emulated_msrs[] = {
 834         MSR_IA32_TSC_ADJUST,
 835         MSR_IA32_TSCDEADLINE,
 836         MSR_IA32_MISC_ENABLE,
 837         MSR_IA32_MCG_STATUS,
 838         MSR_IA32_MCG_CTL,
 839 };
 840
 841 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 842 {
 843         u64 old_efer = vcpu->arch.efer;
 844
 845         if (efer & efer_reserved_bits)
 846                 return 1;
 847
 848         if (is_paging(vcpu)
 849             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 850                 return 1;
 851
 852         if (efer & EFER_FFXSR) {
 853                 struct kvm_cpuid_entry2 *feat;
 854
 855                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 856                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 857                         return 1;
 858         }
 859
 860         if (efer & EFER_SVME) {
 861                 struct kvm_cpuid_entry2 *feat;
 862
 863                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 864                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 865                         return 1;
 866         }
 867
 868         efer &= ~EFER_LMA;
 869         efer |= vcpu->arch.efer & EFER_LMA;
 870
 871         kvm_x86_ops->set_efer(vcpu, efer);
 872
 873         /* Update reserved bits */
 874         if ((efer ^ old_efer) & EFER_NX)
 875                 kvm_mmu_reset_context(vcpu);
 876
 877         return 0;
 878 }
 879
 880 void kvm_enable_efer_bits(u64 mask)
 881 {
 882        efer_reserved_bits &= ~mask;
 883 }
 884 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 885
 886
 887 /*
 888  * Writes msr value into into the appropriate "register".
 889  * Returns 0 on success, non-0 otherwise.
 890  * Assumes vcpu_load() was already called.
 891  */
 892 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
 893 {
 894         return kvm_x86_ops->set_msr(vcpu, msr);
 895 }
 896
 897 /*
 898  * Adapt set_msr() to msr_io()'s calling convention
 899  */
 900 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 901 {
 902         struct msr_data msr;
 903
 904         msr.data = *data;
 905         msr.index = index;
 906         msr.host_initiated = true;
 907         return kvm_set_msr(vcpu, &msr);
 908 }
 909
 910 #ifdef CONFIG_X86_64
 911 struct pvclock_gtod_data {
 912         seqcount_t      seq;
 913
 914         struct { /* extract of a clocksource struct */
 915                 int vclock_mode;
 916                 cycle_t cycle_last;
 917                 cycle_t mask;
 918                 u32     mult;
 919                 u32     shift;
 920         } clock;
 921
 922         /* open coded 'struct timespec' */
 923         u64             monotonic_time_snsec;
 924         time_t          monotonic_time_sec;
 925 };
 926
 927 static struct pvclock_gtod_data pvclock_gtod_data;
 928
 929 static void update_pvclock_gtod(struct timekeeper *tk)
 930 {
 931         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
 932
 933         write_seqcount_begin(&vdata->seq);
 934
 935         /* copy pvclock gtod data */
 936         vdata->clock.vclock_mode        = tk->clock->archdata.vclock_mode;
 937         vdata->clock.cycle_last         = tk->clock->cycle_last;
 938         vdata->clock.mask               = tk->clock->mask;
 939         vdata->clock.mult               = tk->mult;
 940         vdata->clock.shift              = tk->shift;
 941
 942         vdata->monotonic_time_sec       = tk->xtime_sec
 943                                         + tk->wall_to_monotonic.tv_sec;
 944         vdata->monotonic_time_snsec     = tk->xtime_nsec
 945                                         + (tk->wall_to_monotonic.tv_nsec
 946                                                 << tk->shift);
 947         while (vdata->monotonic_time_snsec >=
 948                                         (((u64)NSEC_PER_SEC) << tk->shift)) {
 949                 vdata->monotonic_time_snsec -=
 950                                         ((u64)NSEC_PER_SEC) << tk->shift;
 951                 vdata->monotonic_time_sec++;
 952         }
 953
 954         write_seqcount_end(&vdata->seq);
 955 }
 956 #endif
 957
 958
 959 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 960 {
 961         int version;
 962         int r;
 963         struct pvclock_wall_clock wc;
 964         struct timespec boot;
 965
 966         if (!wall_clock)
 967                 return;
 968
 969         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 970         if (r)
 971                 return;
 972
 973         if (version & 1)
 974                 ++version;  /* first time write, random junk */
 975
 976         ++version;
 977
 978         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 979
 980         /*
 981          * The guest calculates current wall clock time by adding
 982          * system time (updated by kvm_guest_time_update below) to the
 983          * wall clock specified here.  guest system time equals host
 984          * system time for us, thus we must fill in host boot time here.
 985          */
 986         getboottime(&boot);
 987
 988         if (kvm->arch.kvmclock_offset) {
 989                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
 990                 boot = timespec_sub(boot, ts);
 991         }
 992         wc.sec = boot.tv_sec;
 993         wc.nsec = boot.tv_nsec;
 994         wc.version = version;
 995
 996         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 997
 998         version++;
 999         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1000 }
1001
1002 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1003 {
1004         uint32_t quotient, remainder;
1005
1006         /* Don't try to replace with do_div(), this one calculates
1007          * "(dividend << 32) / divisor" */
1008         __asm__ ( "divl %4"
1009                   : "=a" (quotient), "=d" (remainder)
1010                   : "0" (0), "1" (dividend), "r" (divisor) );
1011         return quotient;
1012 }
1013
1014 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1015                                s8 *pshift, u32 *pmultiplier)
1016 {
1017         uint64_t scaled64;
1018         int32_t  shift = 0;
1019         uint64_t tps64;
1020         uint32_t tps32;
1021
1022         tps64 = base_khz * 1000LL;
1023         scaled64 = scaled_khz * 1000LL;
1024         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1025                 tps64 >>= 1;
1026                 shift--;
1027         }
1028
1029         tps32 = (uint32_t)tps64;
1030         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1031                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1032                         scaled64 >>= 1;
1033                 else
1034                         tps32 <<= 1;
1035                 shift++;
1036         }
1037
1038         *pshift = shift;
1039         *pmultiplier = div_frac(scaled64, tps32);
1040
1041         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1042                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1043 }
1044
1045 static inline u64 get_kernel_ns(void)
1046 {
1047         struct timespec ts;
1048
1049         WARN_ON(preemptible());
1050         ktime_get_ts(&ts);
1051         monotonic_to_bootbased(&ts);
1052         return timespec_to_ns(&ts);
1053 }
1054
1055 #ifdef CONFIG_X86_64
1056 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1057 #endif
1058
1059 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1060 unsigned long max_tsc_khz;
1061
1062 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1063 {
1064         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1065                                    vcpu->arch.virtual_tsc_shift);
1066 }
1067
1068 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1069 {
1070         u64 v = (u64)khz * (1000000 + ppm);
1071         do_div(v, 1000000);
1072         return v;
1073 }
1074
1075 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1076 {
1077         u32 thresh_lo, thresh_hi;
1078         int use_scaling = 0;
1079
1080         /* Compute a scale to convert nanoseconds in TSC cycles */
1081         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1082                            &vcpu->arch.virtual_tsc_shift,
1083                            &vcpu->arch.virtual_tsc_mult);
1084         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1085
1086         /*
1087          * Compute the variation in TSC rate which is acceptable
1088          * within the range of tolerance and decide if the
1089          * rate being applied is within that bounds of the hardware
1090          * rate.  If so, no scaling or compensation need be done.
1091          */
1092         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1093         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1094         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1095                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1096                 use_scaling = 1;
1097         }
1098         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1099 }
1100
1101 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1102 {
1103         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1104                                       vcpu->arch.virtual_tsc_mult,
1105                                       vcpu->arch.virtual_tsc_shift);
1106         tsc += vcpu->arch.this_tsc_write;
1107         return tsc;
1108 }
1109
1110 void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1111 {
1112 #ifdef CONFIG_X86_64
1113         bool vcpus_matched;
1114         bool do_request = false;
1115         struct kvm_arch *ka = &vcpu->kvm->arch;
1116         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1117
1118         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1119                          atomic_read(&vcpu->kvm->online_vcpus));
1120
1121         if (vcpus_matched && gtod->clock.vclock_mode == VCLOCK_TSC)
1122                 if (!ka->use_master_clock)
1123                         do_request = 1;
1124
1125         if (!vcpus_matched && ka->use_master_clock)
1126                         do_request = 1;
1127
1128         if (do_request)
1129                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1130
1131         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1132                             atomic_read(&vcpu->kvm->online_vcpus),
1133                             ka->use_master_clock, gtod->clock.vclock_mode);
1134 #endif
1135 }
1136
1137 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1138 {
1139         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1140         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1141 }
1142
1143 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1144 {
1145         struct kvm *kvm = vcpu->kvm;
1146         u64 offset, ns, elapsed;
1147         unsigned long flags;
1148         s64 usdiff;
1149         bool matched;
1150         u64 data = msr->data;
1151
1152         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1153         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1154         ns = get_kernel_ns();
1155         elapsed = ns - kvm->arch.last_tsc_nsec;
1156
1157         /* n.b - signed multiplication and division required */
1158         usdiff = data - kvm->arch.last_tsc_write;
1159 #ifdef CONFIG_X86_64
1160         usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1161 #else
1162         /* do_div() only does unsigned */
1163         asm("idivl %2; xor %%edx, %%edx"
1164             : "=A"(usdiff)
1165             : "A"(usdiff * 1000), "rm"(vcpu->arch.virtual_tsc_khz));
1166 #endif
1167         do_div(elapsed, 1000);
1168         usdiff -= elapsed;
1169         if (usdiff < 0)
1170                 usdiff = -usdiff;
1171
1172         /*
1173          * Special case: TSC write with a small delta (1 second) of virtual
1174          * cycle time against real time is interpreted as an attempt to
1175          * synchronize the CPU.
1176          *
1177          * For a reliable TSC, we can match TSC offsets, and for an unstable
1178          * TSC, we add elapsed time in this computation.  We could let the
1179          * compensation code attempt to catch up if we fall behind, but
1180          * it's better to try to match offsets from the beginning.
1181          */
1182         if (usdiff < USEC_PER_SEC &&
1183             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1184                 if (!check_tsc_unstable()) {
1185                         offset = kvm->arch.cur_tsc_offset;
1186                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1187                 } else {
1188                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1189                         data += delta;
1190                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1191                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1192                 }
1193                 matched = true;
1194         } else {
1195                 /*
1196                  * We split periods of matched TSC writes into generations.
1197                  * For each generation, we track the original measured
1198                  * nanosecond time, offset, and write, so if TSCs are in
1199                  * sync, we can match exact offset, and if not, we can match
1200                  * exact software computation in compute_guest_tsc()
1201                  *
1202                  * These values are tracked in kvm->arch.cur_xxx variables.
1203                  */
1204                 kvm->arch.cur_tsc_generation++;
1205                 kvm->arch.cur_tsc_nsec = ns;
1206                 kvm->arch.cur_tsc_write = data;
1207                 kvm->arch.cur_tsc_offset = offset;
1208                 matched = false;
1209                 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1210                          kvm->arch.cur_tsc_generation, data);
1211         }
1212
1213         /*
1214          * We also track th most recent recorded KHZ, write and time to
1215          * allow the matching interval to be extended at each write.
1216          */
1217         kvm->arch.last_tsc_nsec = ns;
1218         kvm->arch.last_tsc_write = data;
1219         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1220
1221         /* Reset of TSC must disable overshoot protection below */
1222         vcpu->arch.hv_clock.tsc_timestamp = 0;
1223         vcpu->arch.last_guest_tsc = data;
1224
1225         /* Keep track of which generation this VCPU has synchronized to */
1226         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1227         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1228         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1229
1230         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1231                 update_ia32_tsc_adjust_msr(vcpu, offset);
1232         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1233         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1234
1235         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1236         if (matched)
1237                 kvm->arch.nr_vcpus_matched_tsc++;
1238         else
1239                 kvm->arch.nr_vcpus_matched_tsc = 0;
1240
1241         kvm_track_tsc_matching(vcpu);
1242         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1243 }
1244
1245 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1246
1247 #ifdef CONFIG_X86_64
1248
1249 static cycle_t read_tsc(void)
1250 {
1251         cycle_t ret;
1252         u64 last;
1253
1254         /*
1255          * Empirically, a fence (of type that depends on the CPU)
1256          * before rdtsc is enough to ensure that rdtsc is ordered
1257          * with respect to loads.  The various CPU manuals are unclear
1258          * as to whether rdtsc can be reordered with later loads,
1259          * but no one has ever seen it happen.
1260          */
1261         rdtsc_barrier();
1262         ret = (cycle_t)vget_cycles();
1263
1264         last = pvclock_gtod_data.clock.cycle_last;
1265
1266         if (likely(ret >= last))
1267                 return ret;
1268
1269         /*
1270          * GCC likes to generate cmov here, but this branch is extremely
1271          * predictable (it's just a funciton of time and the likely is
1272          * very likely) and there's a data dependence, so force GCC
1273          * to generate a branch instead.  I don't barrier() because
1274          * we don't actually need a barrier, and if this function
1275          * ever gets inlined it will generate worse code.
1276          */
1277         asm volatile ("");
1278         return last;
1279 }
1280
1281 static inline u64 vgettsc(cycle_t *cycle_now)
1282 {
1283         long v;
1284         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1285
1286         *cycle_now = read_tsc();
1287
1288         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1289         return v * gtod->clock.mult;
1290 }
1291
1292 static int do_monotonic(struct timespec *ts, cycle_t *cycle_now)
1293 {
1294         unsigned long seq;
1295         u64 ns;
1296         int mode;
1297         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1298
1299         ts->tv_nsec = 0;
1300         do {
1301                 seq = read_seqcount_begin(&gtod->seq);
1302                 mode = gtod->clock.vclock_mode;
1303                 ts->tv_sec = gtod->monotonic_time_sec;
1304                 ns = gtod->monotonic_time_snsec;
1305                 ns += vgettsc(cycle_now);
1306                 ns >>= gtod->clock.shift;
1307         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1308         timespec_add_ns(ts, ns);
1309
1310         return mode;
1311 }
1312
1313 /* returns true if host is using tsc clocksource */
1314 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1315 {
1316         struct timespec ts;
1317
1318         /* checked again under seqlock below */
1319         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1320                 return false;
1321
1322         if (do_monotonic(&ts, cycle_now) != VCLOCK_TSC)
1323                 return false;
1324
1325         monotonic_to_bootbased(&ts);
1326         *kernel_ns = timespec_to_ns(&ts);
1327
1328         return true;
1329 }
1330 #endif
1331
1332 /*
1333  *
1334  * Assuming a stable TSC across physical CPUS, and a stable TSC
1335  * across virtual CPUs, the following condition is possible.
1336  * Each numbered line represents an event visible to both
1337  * CPUs at the next numbered event.
1338  *
1339  * "timespecX" represents host monotonic time. "tscX" represents
1340  * RDTSC value.
1341  *
1342  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1343  *
1344  * 1.  read timespec0,tsc0
1345  * 2.                                   | timespec1 = timespec0 + N
1346  *                                      | tsc1 = tsc0 + M
1347  * 3. transition to guest               | transition to guest
1348  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1349  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1350  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1351  *
1352  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1353  *
1354  *      - ret0 < ret1
1355  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1356  *              ...
1357  *      - 0 < N - M => M < N
1358  *
1359  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1360  * always the case (the difference between two distinct xtime instances
1361  * might be smaller then the difference between corresponding TSC reads,
1362  * when updating guest vcpus pvclock areas).
1363  *
1364  * To avoid that problem, do not allow visibility of distinct
1365  * system_timestamp/tsc_timestamp values simultaneously: use a master
1366  * copy of host monotonic time values. Update that master copy
1367  * in lockstep.
1368  *
1369  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1370  *
1371  */
1372
1373 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1374 {
1375 #ifdef CONFIG_X86_64
1376         struct kvm_arch *ka = &kvm->arch;
1377         int vclock_mode;
1378         bool host_tsc_clocksource, vcpus_matched;
1379
1380         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1381                         atomic_read(&kvm->online_vcpus));
1382
1383         /*
1384          * If the host uses TSC clock, then passthrough TSC as stable
1385          * to the guest.
1386          */
1387         host_tsc_clocksource = kvm_get_time_and_clockread(
1388                                         &ka->master_kernel_ns,
1389                                         &ka->master_cycle_now);
1390
1391         ka->use_master_clock = host_tsc_clocksource & vcpus_matched;
1392
1393         if (ka->use_master_clock)
1394                 atomic_set(&kvm_guest_has_master_clock, 1);
1395
1396         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1397         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1398                                         vcpus_matched);
1399 #endif
1400 }
1401
1402 static int kvm_guest_time_update(struct kvm_vcpu *v)
1403 {
1404         unsigned long flags, this_tsc_khz;
1405         struct kvm_vcpu_arch *vcpu = &v->arch;
1406         struct kvm_arch *ka = &v->kvm->arch;
1407         void *shared_kaddr;
1408         s64 kernel_ns, max_kernel_ns;
1409         u64 tsc_timestamp, host_tsc;
1410         struct pvclock_vcpu_time_info *guest_hv_clock;
1411         u8 pvclock_flags;
1412         bool use_master_clock;
1413
1414         kernel_ns = 0;
1415         host_tsc = 0;
1416
1417         /* Keep irq disabled to prevent changes to the clock */
1418         local_irq_save(flags);
1419         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1420         if (unlikely(this_tsc_khz == 0)) {
1421                 local_irq_restore(flags);
1422                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1423                 return 1;
1424         }
1425
1426         /*
1427          * If the host uses TSC clock, then passthrough TSC as stable
1428          * to the guest.
1429          */
1430         spin_lock(&ka->pvclock_gtod_sync_lock);
1431         use_master_clock = ka->use_master_clock;
1432         if (use_master_clock) {
1433                 host_tsc = ka->master_cycle_now;
1434                 kernel_ns = ka->master_kernel_ns;
1435         }
1436         spin_unlock(&ka->pvclock_gtod_sync_lock);
1437         if (!use_master_clock) {
1438                 host_tsc = native_read_tsc();
1439                 kernel_ns = get_kernel_ns();
1440         }
1441
1442         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1443
1444         /*
1445          * We may have to catch up the TSC to match elapsed wall clock
1446          * time for two reasons, even if kvmclock is used.
1447          *   1) CPU could have been running below the maximum TSC rate
1448          *   2) Broken TSC compensation resets the base at each VCPU
1449          *      entry to avoid unknown leaps of TSC even when running
1450          *      again on the same CPU.  This may cause apparent elapsed
1451          *      time to disappear, and the guest to stand still or run
1452          *      very slowly.
1453          */
1454         if (vcpu->tsc_catchup) {
1455                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1456                 if (tsc > tsc_timestamp) {
1457                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1458                         tsc_timestamp = tsc;
1459                 }
1460         }
1461
1462         local_irq_restore(flags);
1463
1464         if (!vcpu->time_page)
1465                 return 0;
1466
1467         /*
1468          * Time as measured by the TSC may go backwards when resetting the base
1469          * tsc_timestamp.  The reason for this is that the TSC resolution is
1470          * higher than the resolution of the other clock scales.  Thus, many
1471          * possible measurments of the TSC correspond to one measurement of any
1472          * other clock, and so a spread of values is possible.  This is not a
1473          * problem for the computation of the nanosecond clock; with TSC rates
1474          * around 1GHZ, there can only be a few cycles which correspond to one
1475          * nanosecond value, and any path through this code will inevitably
1476          * take longer than that.  However, with the kernel_ns value itself,
1477          * the precision may be much lower, down to HZ granularity.  If the
1478          * first sampling of TSC against kernel_ns ends in the low part of the
1479          * range, and the second in the high end of the range, we can get:
1480          *
1481          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1482          *
1483          * As the sampling errors potentially range in the thousands of cycles,
1484          * it is possible such a time value has already been observed by the
1485          * guest.  To protect against this, we must compute the system time as
1486          * observed by the guest and ensure the new system time is greater.
1487          */
1488         max_kernel_ns = 0;
1489         if (vcpu->hv_clock.tsc_timestamp) {
1490                 max_kernel_ns = vcpu->last_guest_tsc -
1491                                 vcpu->hv_clock.tsc_timestamp;
1492                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1493                                     vcpu->hv_clock.tsc_to_system_mul,
1494                                     vcpu->hv_clock.tsc_shift);
1495                 max_kernel_ns += vcpu->last_kernel_ns;
1496         }
1497
1498         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1499                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1500                                    &vcpu->hv_clock.tsc_shift,
1501                                    &vcpu->hv_clock.tsc_to_system_mul);
1502                 vcpu->hw_tsc_khz = this_tsc_khz;
1503         }
1504
1505         /* with a master <monotonic time, tsc value> tuple,
1506          * pvclock clock reads always increase at the (scaled) rate
1507          * of guest TSC - no need to deal with sampling errors.
1508          */
1509         if (!use_master_clock) {
1510                 if (max_kernel_ns > kernel_ns)
1511                         kernel_ns = max_kernel_ns;
1512         }
1513         /* With all the info we got, fill in the values */
1514         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1515         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1516         vcpu->last_kernel_ns = kernel_ns;
1517         vcpu->last_guest_tsc = tsc_timestamp;
1518
1519         /*
1520          * The interface expects us to write an even number signaling that the
1521          * update is finished. Since the guest won't see the intermediate
1522          * state, we just increase by 2 at the end.
1523          */
1524         vcpu->hv_clock.version += 2;
1525
1526         shared_kaddr = kmap_atomic(vcpu->time_page);
1527
1528         guest_hv_clock = shared_kaddr + vcpu->time_offset;
1529
1530         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1531         pvclock_flags = (guest_hv_clock->flags & PVCLOCK_GUEST_STOPPED);
1532
1533         if (vcpu->pvclock_set_guest_stopped_request) {
1534                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1535                 vcpu->pvclock_set_guest_stopped_request = false;
1536         }
1537
1538         /* If the host uses TSC clocksource, then it is stable */
1539         if (use_master_clock)
1540                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1541
1542         vcpu->hv_clock.flags = pvclock_flags;
1543
1544         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1545                sizeof(vcpu->hv_clock));
1546
1547         kunmap_atomic(shared_kaddr);
1548
1549         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1550         return 0;
1551 }
1552
1553 static bool msr_mtrr_valid(unsigned msr)
1554 {
1555         switch (msr) {
1556         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1557         case MSR_MTRRfix64K_00000:
1558         case MSR_MTRRfix16K_80000:
1559         case MSR_MTRRfix16K_A0000:
1560         case MSR_MTRRfix4K_C0000:
1561         case MSR_MTRRfix4K_C8000:
1562         case MSR_MTRRfix4K_D0000:
1563         case MSR_MTRRfix4K_D8000:
1564         case MSR_MTRRfix4K_E0000:
1565         case MSR_MTRRfix4K_E8000:
1566         case MSR_MTRRfix4K_F0000:
1567         case MSR_MTRRfix4K_F8000:
1568         case MSR_MTRRdefType:
1569         case MSR_IA32_CR_PAT:
1570                 return true;
1571         case 0x2f8:
1572                 return true;
1573         }
1574         return false;
1575 }
1576
1577 static bool valid_pat_type(unsigned t)
1578 {
1579         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1580 }
1581
1582 static bool valid_mtrr_type(unsigned t)
1583 {
1584         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1585 }
1586
1587 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1588 {
1589         int i;
1590
1591         if (!msr_mtrr_valid(msr))
1592                 return false;
1593
1594         if (msr == MSR_IA32_CR_PAT) {
1595                 for (i = 0; i < 8; i++)
1596                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1597                                 return false;
1598                 return true;
1599         } else if (msr == MSR_MTRRdefType) {
1600                 if (data & ~0xcff)
1601                         return false;
1602                 return valid_mtrr_type(data & 0xff);
1603         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1604                 for (i = 0; i < 8 ; i++)
1605                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1606                                 return false;
1607                 return true;
1608         }
1609
1610         /* variable MTRRs */
1611         return valid_mtrr_type(data & 0xff);
1612 }
1613
1614 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1615 {
1616         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1617
1618         if (!mtrr_valid(vcpu, msr, data))
1619                 return 1;
1620
1621         if (msr == MSR_MTRRdefType) {
1622                 vcpu->arch.mtrr_state.def_type = data;
1623                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1624         } else if (msr == MSR_MTRRfix64K_00000)
1625                 p[0] = data;
1626         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1627                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1628         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1629                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1630         else if (msr == MSR_IA32_CR_PAT)
1631                 vcpu->arch.pat = data;
1632         else {  /* Variable MTRRs */
1633                 int idx, is_mtrr_mask;
1634                 u64 *pt;
1635
1636                 idx = (msr - 0x200) / 2;
1637                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1638                 if (!is_mtrr_mask)
1639                         pt =
1640                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1641                 else
1642                         pt =
1643                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1644                 *pt = data;
1645         }
1646
1647         kvm_mmu_reset_context(vcpu);
1648         return 0;
1649 }
1650
1651 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1652 {
1653         u64 mcg_cap = vcpu->arch.mcg_cap;
1654         unsigned bank_num = mcg_cap & 0xff;
1655
1656         switch (msr) {
1657         case MSR_IA32_MCG_STATUS:
1658                 vcpu->arch.mcg_status = data;
1659                 break;
1660         case MSR_IA32_MCG_CTL:
1661                 if (!(mcg_cap & MCG_CTL_P))
1662                         return 1;
1663                 if (data != 0 && data != ~(u64)0)
1664                         return -1;
1665                 vcpu->arch.mcg_ctl = data;
1666                 break;
1667         default:
1668                 if (msr >= MSR_IA32_MC0_CTL &&
1669                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1670                         u32 offset = msr - MSR_IA32_MC0_CTL;
1671                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1672                          * some Linux kernels though clear bit 10 in bank 4 to
1673                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1674                          * this to avoid an uncatched #GP in the guest
1675                          */
1676                         if ((offset & 0x3) == 0 &&
1677                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1678                                 return -1;
1679                         vcpu->arch.mce_banks[offset] = data;
1680                         break;
1681                 }
1682                 return 1;
1683         }
1684         return 0;
1685 }
1686
1687 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1688 {
1689         struct kvm *kvm = vcpu->kvm;
1690         int lm = is_long_mode(vcpu);
1691         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1692                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1693         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1694                 : kvm->arch.xen_hvm_config.blob_size_32;
1695         u32 page_num = data & ~PAGE_MASK;
1696         u64 page_addr = data & PAGE_MASK;
1697         u8 *page;
1698         int r;
1699
1700         r = -E2BIG;
1701         if (page_num >= blob_size)
1702                 goto out;
1703         r = -ENOMEM;
1704         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1705         if (IS_ERR(page)) {
1706                 r = PTR_ERR(page);
1707                 goto out;
1708         }
1709         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1710                 goto out_free;
1711         r = 0;
1712 out_free:
1713         kfree(page);
1714 out:
1715         return r;
1716 }
1717
1718 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1719 {
1720         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1721 }
1722
1723 static bool kvm_hv_msr_partition_wide(u32 msr)
1724 {
1725         bool r = false;
1726         switch (msr) {
1727         case HV_X64_MSR_GUEST_OS_ID:
1728         case HV_X64_MSR_HYPERCALL:
1729                 r = true;
1730                 break;
1731         }
1732
1733         return r;
1734 }
1735
1736 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1737 {
1738         struct kvm *kvm = vcpu->kvm;
1739
1740         switch (msr) {
1741         case HV_X64_MSR_GUEST_OS_ID:
1742                 kvm->arch.hv_guest_os_id = data;
1743                 /* setting guest os id to zero disables hypercall page */
1744                 if (!kvm->arch.hv_guest_os_id)
1745                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1746                 break;
1747         case HV_X64_MSR_HYPERCALL: {
1748                 u64 gfn;
1749                 unsigned long addr;
1750                 u8 instructions[4];
1751
1752                 /* if guest os id is not set hypercall should remain disabled */
1753                 if (!kvm->arch.hv_guest_os_id)
1754                         break;
1755                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1756                         kvm->arch.hv_hypercall = data;
1757                         break;
1758                 }
1759                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1760                 addr = gfn_to_hva(kvm, gfn);
1761                 if (kvm_is_error_hva(addr))
1762                         return 1;
1763                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1764                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1765                 if (__copy_to_user((void __user *)addr, instructions, 4))
1766                         return 1;
1767                 kvm->arch.hv_hypercall = data;
1768                 break;
1769         }
1770         default:
1771                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1772                             "data 0x%llx\n", msr, data);
1773                 return 1;
1774         }
1775         return 0;
1776 }
1777
1778 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1779 {
1780         switch (msr) {
1781         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1782                 unsigned long addr;
1783
1784                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1785                         vcpu->arch.hv_vapic = data;
1786                         break;
1787                 }
1788                 addr = gfn_to_hva(vcpu->kvm, data >>
1789                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1790                 if (kvm_is_error_hva(addr))
1791                         return 1;
1792                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1793                         return 1;
1794                 vcpu->arch.hv_vapic = data;
1795                 break;
1796         }
1797         case HV_X64_MSR_EOI:
1798                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1799         case HV_X64_MSR_ICR:
1800                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1801         case HV_X64_MSR_TPR:
1802                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1803         default:
1804                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1805                             "data 0x%llx\n", msr, data);
1806                 return 1;
1807         }
1808
1809         return 0;
1810 }
1811
1812 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1813 {
1814         gpa_t gpa = data & ~0x3f;
1815
1816         /* Bits 2:5 are reserved, Should be zero */
1817         if (data & 0x3c)
1818                 return 1;
1819
1820         vcpu->arch.apf.msr_val = data;
1821
1822         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1823                 kvm_clear_async_pf_completion_queue(vcpu);
1824                 kvm_async_pf_hash_reset(vcpu);
1825                 return 0;
1826         }
1827
1828         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1829                 return 1;
1830
1831         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1832         kvm_async_pf_wakeup_all(vcpu);
1833         return 0;
1834 }
1835
1836 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1837 {
1838         if (vcpu->arch.time_page) {
1839                 kvm_release_page_dirty(vcpu->arch.time_page);
1840                 vcpu->arch.time_page = NULL;
1841         }
1842 }
1843
1844 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1845 {
1846         u64 delta;
1847
1848         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1849                 return;
1850
1851         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1852         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1853         vcpu->arch.st.accum_steal = delta;
1854 }
1855
1856 static void record_steal_time(struct kvm_vcpu *vcpu)
1857 {
1858         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1859                 return;
1860
1861         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1862                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1863                 return;
1864
1865         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1866         vcpu->arch.st.steal.version += 2;
1867         vcpu->arch.st.accum_steal = 0;
1868
1869         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1870                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1871 }
1872
1873 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1874 {
1875         bool pr = false;
1876         u32 msr = msr_info->index;
1877         u64 data = msr_info->data;
1878
1879         switch (msr) {
1880         case MSR_EFER:
1881                 return set_efer(vcpu, data);
1882         case MSR_K7_HWCR:
1883                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1884                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1885                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
1886                 if (data != 0) {
1887                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1888                                     data);
1889                         return 1;
1890                 }
1891                 break;
1892         case MSR_FAM10H_MMIO_CONF_BASE:
1893                 if (data != 0) {
1894                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1895                                     "0x%llx\n", data);
1896                         return 1;
1897                 }
1898                 break;
1899         case MSR_AMD64_NB_CFG:
1900                 break;
1901         case MSR_IA32_DEBUGCTLMSR:
1902                 if (!data) {
1903                         /* We support the non-activated case already */
1904                         break;
1905                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1906                         /* Values other than LBR and BTF are vendor-specific,
1907                            thus reserved and should throw a #GP */
1908                         return 1;
1909                 }
1910                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1911                             __func__, data);
1912                 break;
1913         case MSR_IA32_UCODE_REV:
1914         case MSR_IA32_UCODE_WRITE:
1915         case MSR_VM_HSAVE_PA:
1916         case MSR_AMD64_PATCH_LOADER:
1917                 break;
1918         case 0x200 ... 0x2ff:
1919                 return set_msr_mtrr(vcpu, msr, data);
1920         case MSR_IA32_APICBASE:
1921                 kvm_set_apic_base(vcpu, data);
1922                 break;
1923         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1924                 return kvm_x2apic_msr_write(vcpu, msr, data);
1925         case MSR_IA32_TSCDEADLINE:
1926                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1927                 break;
1928         case MSR_IA32_TSC_ADJUST:
1929                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
1930                         if (!msr_info->host_initiated) {
1931                                 u64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
1932                                 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
1933                         }
1934                         vcpu->arch.ia32_tsc_adjust_msr = data;
1935                 }
1936                 break;
1937         case MSR_IA32_MISC_ENABLE:
1938                 vcpu->arch.ia32_misc_enable_msr = data;
1939                 break;
1940         case MSR_KVM_WALL_CLOCK_NEW:
1941         case MSR_KVM_WALL_CLOCK:
1942                 vcpu->kvm->arch.wall_clock = data;
1943                 kvm_write_wall_clock(vcpu->kvm, data);
1944                 break;
1945         case MSR_KVM_SYSTEM_TIME_NEW:
1946         case MSR_KVM_SYSTEM_TIME: {
1947                 kvmclock_reset(vcpu);
1948
1949                 vcpu->arch.time = data;
1950                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1951
1952                 /* we verify if the enable bit is set... */
1953                 if (!(data & 1))
1954                         break;
1955
1956                 /* ...but clean it before doing the actual write */
1957                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1958
1959                 vcpu->arch.time_page =
1960                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1961
1962                 if (is_error_page(vcpu->arch.time_page))
1963                         vcpu->arch.time_page = NULL;
1964
1965                 break;
1966         }
1967         case MSR_KVM_ASYNC_PF_EN:
1968                 if (kvm_pv_enable_async_pf(vcpu, data))
1969                         return 1;
1970                 break;
1971         case MSR_KVM_STEAL_TIME:
1972
1973                 if (unlikely(!sched_info_on()))
1974                         return 1;
1975
1976                 if (data & KVM_STEAL_RESERVED_MASK)
1977                         return 1;
1978
1979                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1980                                                         data & KVM_STEAL_VALID_BITS))
1981                         return 1;
1982
1983                 vcpu->arch.st.msr_val = data;
1984
1985                 if (!(data & KVM_MSR_ENABLED))
1986                         break;
1987
1988                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1989
1990                 preempt_disable();
1991                 accumulate_steal_time(vcpu);
1992                 preempt_enable();
1993
1994                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1995
1996                 break;
1997         case MSR_KVM_PV_EOI_EN:
1998                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
1999                         return 1;
2000                 break;
2001
2002         case MSR_IA32_MCG_CTL:
2003         case MSR_IA32_MCG_STATUS:
2004         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2005                 return set_msr_mce(vcpu, msr, data);
2006
2007         /* Performance counters are not protected by a CPUID bit,
2008          * so we should check all of them in the generic path for the sake of
2009          * cross vendor migration.
2010          * Writing a zero into the event select MSRs disables them,
2011          * which we perfectly emulate ;-). Any other value should be at least
2012          * reported, some guests depend on them.
2013          */
2014         case MSR_K7_EVNTSEL0:
2015         case MSR_K7_EVNTSEL1:
2016         case MSR_K7_EVNTSEL2:
2017         case MSR_K7_EVNTSEL3:
2018                 if (data != 0)
2019                         vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2020                                     "0x%x data 0x%llx\n", msr, data);
2021                 break;
2022         /* at least RHEL 4 unconditionally writes to the perfctr registers,
2023          * so we ignore writes to make it happy.
2024          */
2025         case MSR_K7_PERFCTR0:
2026         case MSR_K7_PERFCTR1:
2027         case MSR_K7_PERFCTR2:
2028         case MSR_K7_PERFCTR3:
2029                 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2030                             "0x%x data 0x%llx\n", msr, data);
2031                 break;
2032         case MSR_P6_PERFCTR0:
2033         case MSR_P6_PERFCTR1:
2034                 pr = true;
2035         case MSR_P6_EVNTSEL0:
2036         case MSR_P6_EVNTSEL1:
2037                 if (kvm_pmu_msr(vcpu, msr))
2038                         return kvm_pmu_set_msr(vcpu, msr, data);
2039
2040                 if (pr || data != 0)
2041                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2042                                     "0x%x data 0x%llx\n", msr, data);
2043                 break;
2044         case MSR_K7_CLK_CTL:
2045                 /*
2046                  * Ignore all writes to this no longer documented MSR.
2047                  * Writes are only relevant for old K7 processors,
2048                  * all pre-dating SVM, but a recommended workaround from
2049                  * AMD for these chips. It is possible to specify the
2050                  * affected processor models on the command line, hence
2051                  * the need to ignore the workaround.
2052                  */
2053                 break;
2054         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2055                 if (kvm_hv_msr_partition_wide(msr)) {
2056                         int r;
2057                         mutex_lock(&vcpu->kvm->lock);
2058                         r = set_msr_hyperv_pw(vcpu, msr, data);
2059                         mutex_unlock(&vcpu->kvm->lock);
2060                         return r;
2061                 } else
2062                         return set_msr_hyperv(vcpu, msr, data);
2063                 break;
2064         case MSR_IA32_BBL_CR_CTL3:
2065                 /* Drop writes to this legacy MSR -- see rdmsr
2066                  * counterpart for further detail.
2067                  */
2068                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2069                 break;
2070         case MSR_AMD64_OSVW_ID_LENGTH:
2071                 if (!guest_cpuid_has_osvw(vcpu))
2072                         return 1;
2073                 vcpu->arch.osvw.length = data;
2074                 break;
2075         case MSR_AMD64_OSVW_STATUS:
2076                 if (!guest_cpuid_has_osvw(vcpu))
2077                         return 1;
2078                 vcpu->arch.osvw.status = data;
2079                 break;
2080         default:
2081                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2082                         return xen_hvm_config(vcpu, data);
2083                 if (kvm_pmu_msr(vcpu, msr))
2084                         return kvm_pmu_set_msr(vcpu, msr, data);
2085                 if (!ignore_msrs) {
2086                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2087                                     msr, data);
2088                         return 1;
2089                 } else {
2090                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2091                                     msr, data);
2092                         break;
2093                 }
2094         }
2095         return 0;
2096 }
2097 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2098
2099
2100 /*
2101  * Reads an msr value (of 'msr_index') into 'pdata'.
2102  * Returns 0 on success, non-0 otherwise.
2103  * Assumes vcpu_load() was already called.
2104  */
2105 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2106 {
2107         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
2108 }
2109
2110 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2111 {
2112         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
2113
2114         if (!msr_mtrr_valid(msr))
2115                 return 1;
2116
2117         if (msr == MSR_MTRRdefType)
2118                 *pdata = vcpu->arch.mtrr_state.def_type +
2119                          (vcpu->arch.mtrr_state.enabled << 10);
2120         else if (msr == MSR_MTRRfix64K_00000)
2121                 *pdata = p[0];
2122         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
2123                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
2124         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
2125                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
2126         else if (msr == MSR_IA32_CR_PAT)
2127                 *pdata = vcpu->arch.pat;
2128         else {  /* Variable MTRRs */
2129                 int idx, is_mtrr_mask;
2130                 u64 *pt;
2131
2132                 idx = (msr - 0x200) / 2;
2133                 is_mtrr_mask = msr - 0x200 - 2 * idx;
2134                 if (!is_mtrr_mask)
2135                         pt =
2136                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
2137                 else
2138                         pt =
2139                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
2140                 *pdata = *pt;
2141         }
2142
2143         return 0;
2144 }
2145
2146 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2147 {
2148         u64 data;
2149         u64 mcg_cap = vcpu->arch.mcg_cap;
2150         unsigned bank_num = mcg_cap & 0xff;
2151
2152         switch (msr) {
2153         case MSR_IA32_P5_MC_ADDR:
2154         case MSR_IA32_P5_MC_TYPE:
2155                 data = 0;
2156                 break;
2157         case MSR_IA32_MCG_CAP:
2158                 data = vcpu->arch.mcg_cap;
2159                 break;
2160         case MSR_IA32_MCG_CTL:
2161                 if (!(mcg_cap & MCG_CTL_P))
2162                         return 1;
2163                 data = vcpu->arch.mcg_ctl;
2164                 break;
2165         case MSR_IA32_MCG_STATUS:
2166                 data = vcpu->arch.mcg_status;
2167                 break;
2168         default:
2169                 if (msr >= MSR_IA32_MC0_CTL &&
2170                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
2171                         u32 offset = msr - MSR_IA32_MC0_CTL;
2172                         data = vcpu->arch.mce_banks[offset];
2173                         break;
2174                 }
2175                 return 1;
2176         }
2177         *pdata = data;
2178         return 0;
2179 }
2180
2181 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2182 {
2183         u64 data = 0;
2184         struct kvm *kvm = vcpu->kvm;
2185
2186         switch (msr) {
2187         case HV_X64_MSR_GUEST_OS_ID:
2188                 data = kvm->arch.hv_guest_os_id;
2189                 break;
2190         case HV_X64_MSR_HYPERCALL:
2191                 data = kvm->arch.hv_hypercall;
2192                 break;
2193         default:
2194                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2195                 return 1;
2196         }
2197
2198         *pdata = data;
2199         return 0;
2200 }
2201
2202 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2203 {
2204         u64 data = 0;
2205
2206         switch (msr) {
2207         case HV_X64_MSR_VP_INDEX: {
2208                 int r;
2209                 struct kvm_vcpu *v;
2210                 kvm_for_each_vcpu(r, v, vcpu->kvm)
2211                         if (v == vcpu)
2212                                 data = r;
2213                 break;
2214         }
2215         case HV_X64_MSR_EOI:
2216                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
2217         case HV_X64_MSR_ICR:
2218                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
2219         case HV_X64_MSR_TPR:
2220                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
2221         case HV_X64_MSR_APIC_ASSIST_PAGE:
2222                 data = vcpu->arch.hv_vapic;
2223                 break;
2224         default:
2225                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2226                 return 1;
2227         }
2228         *pdata = data;
2229         return 0;
2230 }
2231
2232 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2233 {
2234         u64 data;
2235
2236         switch (msr) {
2237         case MSR_IA32_PLATFORM_ID:
2238         case MSR_IA32_EBL_CR_POWERON:
2239         case MSR_IA32_DEBUGCTLMSR:
2240         case MSR_IA32_LASTBRANCHFROMIP:
2241         case MSR_IA32_LASTBRANCHTOIP:
2242         case MSR_IA32_LASTINTFROMIP:
2243         case MSR_IA32_LASTINTTOIP:
2244         case MSR_K8_SYSCFG:
2245         case MSR_K7_HWCR:
2246         case MSR_VM_HSAVE_PA:
2247         case MSR_K7_EVNTSEL0:
2248         case MSR_K7_PERFCTR0:
2249         case MSR_K8_INT_PENDING_MSG:
2250         case MSR_AMD64_NB_CFG:
2251         case MSR_FAM10H_MMIO_CONF_BASE:
2252                 data = 0;
2253                 break;
2254         case MSR_P6_PERFCTR0:
2255         case MSR_P6_PERFCTR1:
2256         case MSR_P6_EVNTSEL0:
2257         case MSR_P6_EVNTSEL1:
2258                 if (kvm_pmu_msr(vcpu, msr))
2259                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2260                 data = 0;
2261                 break;
2262         case MSR_IA32_UCODE_REV:
2263                 data = 0x100000000ULL;
2264                 break;
2265         case MSR_MTRRcap:
2266                 data = 0x500 | KVM_NR_VAR_MTRR;
2267                 break;
2268         case 0x200 ... 0x2ff:
2269                 return get_msr_mtrr(vcpu, msr, pdata);
2270         case 0xcd: /* fsb frequency */
2271                 data = 3;
2272                 break;
2273                 /*
2274                  * MSR_EBC_FREQUENCY_ID
2275                  * Conservative value valid for even the basic CPU models.
2276                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2277                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2278                  * and 266MHz for model 3, or 4. Set Core Clock
2279                  * Frequency to System Bus Frequency Ratio to 1 (bits
2280                  * 31:24) even though these are only valid for CPU
2281                  * models > 2, however guests may end up dividing or
2282                  * multiplying by zero otherwise.
2283                  */
2284         case MSR_EBC_FREQUENCY_ID:
2285                 data = 1 << 24;
2286                 break;
2287         case MSR_IA32_APICBASE:
2288                 data = kvm_get_apic_base(vcpu);
2289                 break;
2290         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2291                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
2292                 break;
2293         case MSR_IA32_TSCDEADLINE:
2294                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
2295                 break;
2296         case MSR_IA32_TSC_ADJUST:
2297                 data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2298                 break;
2299         case MSR_IA32_MISC_ENABLE:
2300                 data = vcpu->arch.ia32_misc_enable_msr;
2301                 break;
2302         case MSR_IA32_PERF_STATUS:
2303                 /* TSC increment by tick */
2304                 data = 1000ULL;
2305                 /* CPU multiplier */
2306                 data |= (((uint64_t)4ULL) << 40);
2307                 break;
2308         case MSR_EFER:
2309                 data = vcpu->arch.efer;
2310                 break;
2311         case MSR_KVM_WALL_CLOCK:
2312         case MSR_KVM_WALL_CLOCK_NEW:
2313                 data = vcpu->kvm->arch.wall_clock;
2314                 break;
2315         case MSR_KVM_SYSTEM_TIME:
2316         case MSR_KVM_SYSTEM_TIME_NEW:
2317                 data = vcpu->arch.time;
2318                 break;
2319         case MSR_KVM_ASYNC_PF_EN:
2320                 data = vcpu->arch.apf.msr_val;
2321                 break;
2322         case MSR_KVM_STEAL_TIME:
2323                 data = vcpu->arch.st.msr_val;
2324                 break;
2325         case MSR_KVM_PV_EOI_EN:
2326                 data = vcpu->arch.pv_eoi.msr_val;
2327                 break;
2328         case MSR_IA32_P5_MC_ADDR:
2329         case MSR_IA32_P5_MC_TYPE:
2330         case MSR_IA32_MCG_CAP:
2331         case MSR_IA32_MCG_CTL:
2332         case MSR_IA32_MCG_STATUS:
2333         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2334                 return get_msr_mce(vcpu, msr, pdata);
2335         case MSR_K7_CLK_CTL:
2336                 /*
2337                  * Provide expected ramp-up count for K7. All other
2338                  * are set to zero, indicating minimum divisors for
2339                  * every field.
2340                  *
2341                  * This prevents guest kernels on AMD host with CPU
2342                  * type 6, model 8 and higher from exploding due to
2343                  * the rdmsr failing.
2344                  */
2345                 data = 0x20000000;
2346                 break;
2347         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2348                 if (kvm_hv_msr_partition_wide(msr)) {
2349                         int r;
2350                         mutex_lock(&vcpu->kvm->lock);
2351                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
2352                         mutex_unlock(&vcpu->kvm->lock);
2353                         return r;
2354                 } else
2355                         return get_msr_hyperv(vcpu, msr, pdata);
2356                 break;
2357         case MSR_IA32_BBL_CR_CTL3:
2358                 /* This legacy MSR exists but isn't fully documented in current
2359                  * silicon.  It is however accessed by winxp in very narrow
2360                  * scenarios where it sets bit #19, itself documented as
2361                  * a "reserved" bit.  Best effort attempt to source coherent
2362                  * read data here should the balance of the register be
2363                  * interpreted by the guest:
2364                  *
2365                  * L2 cache control register 3: 64GB range, 256KB size,
2366                  * enabled, latency 0x1, configured
2367                  */
2368                 data = 0xbe702111;
2369                 break;
2370         case MSR_AMD64_OSVW_ID_LENGTH:
2371                 if (!guest_cpuid_has_osvw(vcpu))
2372                         return 1;
2373                 data = vcpu->arch.osvw.length;
2374                 break;
2375         case MSR_AMD64_OSVW_STATUS:
2376                 if (!guest_cpuid_has_osvw(vcpu))
2377                         return 1;
2378                 data = vcpu->arch.osvw.status;
2379                 break;
2380         default:
2381                 if (kvm_pmu_msr(vcpu, msr))
2382                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2383                 if (!ignore_msrs) {
2384                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2385                         return 1;
2386                 } else {
2387                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2388                         data = 0;
2389                 }
2390                 break;
2391         }
2392         *pdata = data;
2393         return 0;
2394 }
2395 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2396
2397 /*
2398  * Read or write a bunch of msrs. All parameters are kernel addresses.
2399  *
2400  * @return number of msrs set successfully.
2401  */
2402 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2403                     struct kvm_msr_entry *entries,
2404                     int (*do_msr)(struct kvm_vcpu *vcpu,
2405                                   unsigned index, u64 *data))
2406 {
2407         int i, idx;
2408
2409         idx = srcu_read_lock(&vcpu->kvm->srcu);
2410         for (i = 0; i < msrs->nmsrs; ++i)
2411                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2412                         break;
2413         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2414
2415         return i;
2416 }
2417
2418 /*
2419  * Read or write a bunch of msrs. Parameters are user addresses.
2420  *
2421  * @return number of msrs set successfully.
2422  */
2423 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2424                   int (*do_msr)(struct kvm_vcpu *vcpu,
2425                                 unsigned index, u64 *data),
2426                   int writeback)
2427 {
2428         struct kvm_msrs msrs;
2429         struct kvm_msr_entry *entries;
2430         int r, n;
2431         unsigned size;
2432
2433         r = -EFAULT;
2434         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2435                 goto out;
2436
2437         r = -E2BIG;
2438         if (msrs.nmsrs >= MAX_IO_MSRS)
2439                 goto out;
2440
2441         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2442         entries = memdup_user(user_msrs->entries, size);
2443         if (IS_ERR(entries)) {
2444                 r = PTR_ERR(entries);
2445                 goto out;
2446         }
2447
2448         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2449         if (r < 0)
2450                 goto out_free;
2451
2452         r = -EFAULT;
2453         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2454                 goto out_free;
2455
2456         r = n;
2457
2458 out_free:
2459         kfree(entries);
2460 out:
2461         return r;
2462 }
2463
2464 int kvm_dev_ioctl_check_extension(long ext)
2465 {
2466         int r;
2467
2468         switch (ext) {
2469         case KVM_CAP_IRQCHIP:
2470         case KVM_CAP_HLT:
2471         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2472         case KVM_CAP_SET_TSS_ADDR:
2473         case KVM_CAP_EXT_CPUID:
2474         case KVM_CAP_CLOCKSOURCE:
2475         case KVM_CAP_PIT:
2476         case KVM_CAP_NOP_IO_DELAY:
2477         case KVM_CAP_MP_STATE:
2478         case KVM_CAP_SYNC_MMU:
2479         case KVM_CAP_USER_NMI:
2480         case KVM_CAP_REINJECT_CONTROL:
2481         case KVM_CAP_IRQ_INJECT_STATUS:
2482         case KVM_CAP_ASSIGN_DEV_IRQ:
2483         case KVM_CAP_IRQFD:
2484         case KVM_CAP_IOEVENTFD:
2485         case KVM_CAP_PIT2:
2486         case KVM_CAP_PIT_STATE2:
2487         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2488         case KVM_CAP_XEN_HVM:
2489         case KVM_CAP_ADJUST_CLOCK:
2490         case KVM_CAP_VCPU_EVENTS:
2491         case KVM_CAP_HYPERV:
2492         case KVM_CAP_HYPERV_VAPIC:
2493         case KVM_CAP_HYPERV_SPIN:
2494         case KVM_CAP_PCI_SEGMENT:
2495         case KVM_CAP_DEBUGREGS:
2496         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2497         case KVM_CAP_XSAVE:
2498         case KVM_CAP_ASYNC_PF:
2499         case KVM_CAP_GET_TSC_KHZ:
2500         case KVM_CAP_PCI_2_3:
2501         case KVM_CAP_KVMCLOCK_CTRL:
2502         case KVM_CAP_READONLY_MEM:
2503         case KVM_CAP_IRQFD_RESAMPLE:
2504                 r = 1;
2505                 break;
2506         case KVM_CAP_COALESCED_MMIO:
2507                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2508                 break;
2509         case KVM_CAP_VAPIC:
2510                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2511                 break;
2512         case KVM_CAP_NR_VCPUS:
2513                 r = KVM_SOFT_MAX_VCPUS;
2514                 break;
2515         case KVM_CAP_MAX_VCPUS:
2516                 r = KVM_MAX_VCPUS;
2517                 break;
2518         case KVM_CAP_NR_MEMSLOTS:
2519                 r = KVM_USER_MEM_SLOTS;
2520                 break;
2521         case KVM_CAP_PV_MMU:    /* obsolete */
2522                 r = 0;
2523                 break;
2524         case KVM_CAP_IOMMU:
2525                 r = iommu_present(&pci_bus_type);
2526                 break;
2527         case KVM_CAP_MCE:
2528                 r = KVM_MAX_MCE_BANKS;
2529                 break;
2530         case KVM_CAP_XCRS:
2531                 r = cpu_has_xsave;
2532                 break;
2533         case KVM_CAP_TSC_CONTROL:
2534                 r = kvm_has_tsc_control;
2535                 break;
2536         case KVM_CAP_TSC_DEADLINE_TIMER:
2537                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2538                 break;
2539         default:
2540                 r = 0;
2541                 break;
2542         }
2543         return r;
2544
2545 }
2546
2547 long kvm_arch_dev_ioctl(struct file *filp,
2548                         unsigned int ioctl, unsigned long arg)
2549 {
2550         void __user *argp = (void __user *)arg;
2551         long r;
2552
2553         switch (ioctl) {
2554         case KVM_GET_MSR_INDEX_LIST: {
2555                 struct kvm_msr_list __user *user_msr_list = argp;
2556                 struct kvm_msr_list msr_list;
2557                 unsigned n;
2558
2559                 r = -EFAULT;
2560                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2561                         goto out;
2562                 n = msr_list.nmsrs;
2563                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2564                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2565                         goto out;
2566                 r = -E2BIG;
2567                 if (n < msr_list.nmsrs)
2568                         goto out;
2569                 r = -EFAULT;
2570                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2571                                  num_msrs_to_save * sizeof(u32)))
2572                         goto out;
2573                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2574                                  &emulated_msrs,
2575                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2576                         goto out;
2577                 r = 0;
2578                 break;
2579         }
2580         case KVM_GET_SUPPORTED_CPUID: {
2581                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2582                 struct kvm_cpuid2 cpuid;
2583
2584                 r = -EFAULT;
2585                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2586                         goto out;
2587                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2588                                                       cpuid_arg->entries);
2589                 if (r)
2590                         goto out;
2591
2592                 r = -EFAULT;
2593                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2594                         goto out;
2595                 r = 0;
2596                 break;
2597         }
2598         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2599                 u64 mce_cap;
2600
2601                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2602                 r = -EFAULT;
2603                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2604                         goto out;
2605                 r = 0;
2606                 break;
2607         }
2608         default:
2609                 r = -EINVAL;
2610         }
2611 out:
2612         return r;
2613 }
2614
2615 static void wbinvd_ipi(void *garbage)
2616 {
2617         wbinvd();
2618 }
2619
2620 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2621 {
2622         return vcpu->kvm->arch.iommu_domain &&
2623                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2624 }
2625
2626 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2627 {
2628         /* Address WBINVD may be executed by guest */
2629         if (need_emulate_wbinvd(vcpu)) {
2630                 if (kvm_x86_ops->has_wbinvd_exit())
2631                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2632                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2633                         smp_call_function_single(vcpu->cpu,
2634                                         wbinvd_ipi, NULL, 1);
2635         }
2636
2637         kvm_x86_ops->vcpu_load(vcpu, cpu);
2638
2639         /* Apply any externally detected TSC adjustments (due to suspend) */
2640         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2641                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2642                 vcpu->arch.tsc_offset_adjustment = 0;
2643                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2644         }
2645
2646         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2647                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2648                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2649                 if (tsc_delta < 0)
2650                         mark_tsc_unstable("KVM discovered backwards TSC");
2651                 if (check_tsc_unstable()) {
2652                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2653                                                 vcpu->arch.last_guest_tsc);
2654                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2655                         vcpu->arch.tsc_catchup = 1;
2656                 }
2657                 /*
2658                  * On a host with synchronized TSC, there is no need to update
2659                  * kvmclock on vcpu->cpu migration
2660                  */
2661                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2662                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2663                 if (vcpu->cpu != cpu)
2664                         kvm_migrate_timers(vcpu);
2665                 vcpu->cpu = cpu;
2666         }
2667
2668         accumulate_steal_time(vcpu);
2669         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2670 }
2671
2672 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2673 {
2674         kvm_x86_ops->vcpu_put(vcpu);
2675         kvm_put_guest_fpu(vcpu);
2676         vcpu->arch.last_host_tsc = native_read_tsc();
2677 }
2678
2679 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2680                                     struct kvm_lapic_state *s)
2681 {
2682         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2683
2684         return 0;
2685 }
2686
2687 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2688                                     struct kvm_lapic_state *s)
2689 {
2690         kvm_apic_post_state_restore(vcpu, s);
2691         update_cr8_intercept(vcpu);
2692
2693         return 0;
2694 }
2695
2696 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2697                                     struct kvm_interrupt *irq)
2698 {
2699         if (irq->irq < 0 || irq->irq >= KVM_NR_INTERRUPTS)
2700                 return -EINVAL;
2701         if (irqchip_in_kernel(vcpu->kvm))
2702                 return -ENXIO;
2703
2704         kvm_queue_interrupt(vcpu, irq->irq, false);
2705         kvm_make_request(KVM_REQ_EVENT, vcpu);
2706
2707         return 0;
2708 }
2709
2710 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2711 {
2712         kvm_inject_nmi(vcpu);
2713
2714         return 0;
2715 }
2716
2717 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2718                                            struct kvm_tpr_access_ctl *tac)
2719 {
2720         if (tac->flags)
2721                 return -EINVAL;
2722         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2723         return 0;
2724 }
2725
2726 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2727                                         u64 mcg_cap)
2728 {
2729         int r;
2730         unsigned bank_num = mcg_cap & 0xff, bank;
2731
2732         r = -EINVAL;
2733         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2734                 goto out;
2735         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2736                 goto out;
2737         r = 0;
2738         vcpu->arch.mcg_cap = mcg_cap;
2739         /* Init IA32_MCG_CTL to all 1s */
2740         if (mcg_cap & MCG_CTL_P)
2741                 vcpu->arch.mcg_ctl = ~(u64)0;
2742         /* Init IA32_MCi_CTL to all 1s */
2743         for (bank = 0; bank < bank_num; bank++)
2744                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2745 out:
2746         return r;
2747 }
2748
2749 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2750                                       struct kvm_x86_mce *mce)
2751 {
2752         u64 mcg_cap = vcpu->arch.mcg_cap;
2753         unsigned bank_num = mcg_cap & 0xff;
2754         u64 *banks = vcpu->arch.mce_banks;
2755
2756         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2757                 return -EINVAL;
2758         /*
2759          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2760          * reporting is disabled
2761          */
2762         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2763             vcpu->arch.mcg_ctl != ~(u64)0)
2764                 return 0;
2765         banks += 4 * mce->bank;
2766         /*
2767          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2768          * reporting is disabled for the bank
2769          */
2770         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2771                 return 0;
2772         if (mce->status & MCI_STATUS_UC) {
2773                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2774                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2775                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2776                         return 0;
2777                 }
2778                 if (banks[1] & MCI_STATUS_VAL)
2779                         mce->status |= MCI_STATUS_OVER;
2780                 banks[2] = mce->addr;
2781                 banks[3] = mce->misc;
2782                 vcpu->arch.mcg_status = mce->mcg_status;
2783                 banks[1] = mce->status;
2784                 kvm_queue_exception(vcpu, MC_VECTOR);
2785         } else if (!(banks[1] & MCI_STATUS_VAL)
2786                    || !(banks[1] & MCI_STATUS_UC)) {
2787                 if (banks[1] & MCI_STATUS_VAL)
2788                         mce->status |= MCI_STATUS_OVER;
2789                 banks[2] = mce->addr;
2790                 banks[3] = mce->misc;
2791                 banks[1] = mce->status;
2792         } else
2793                 banks[1] |= MCI_STATUS_OVER;
2794         return 0;
2795 }
2796
2797 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2798                                                struct kvm_vcpu_events *events)
2799 {
2800         process_nmi(vcpu);
2801         events->exception.injected =
2802                 vcpu->arch.exception.pending &&
2803                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2804         events->exception.nr = vcpu->arch.exception.nr;
2805         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2806         events->exception.pad = 0;
2807         events->exception.error_code = vcpu->arch.exception.error_code;
2808
2809         events->interrupt.injected =
2810                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2811         events->interrupt.nr = vcpu->arch.interrupt.nr;
2812         events->interrupt.soft = 0;
2813         events->interrupt.shadow =
2814                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2815                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2816
2817         events->nmi.injected = vcpu->arch.nmi_injected;
2818         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2819         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2820         events->nmi.pad = 0;
2821
2822         events->sipi_vector = vcpu->arch.sipi_vector;
2823
2824         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2825                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2826                          | KVM_VCPUEVENT_VALID_SHADOW);
2827         memset(&events->reserved, 0, sizeof(events->reserved));
2828 }
2829
2830 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2831                                               struct kvm_vcpu_events *events)
2832 {
2833         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2834                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2835                               | KVM_VCPUEVENT_VALID_SHADOW))
2836                 return -EINVAL;
2837
2838         process_nmi(vcpu);
2839         vcpu->arch.exception.pending = events->exception.injected;
2840         vcpu->arch.exception.nr = events->exception.nr;
2841         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2842         vcpu->arch.exception.error_code = events->exception.error_code;
2843
2844         vcpu->arch.interrupt.pending = events->interrupt.injected;
2845         vcpu->arch.interrupt.nr = events->interrupt.nr;
2846         vcpu->arch.interrupt.soft = events->interrupt.soft;
2847         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2848                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2849                                                   events->interrupt.shadow);
2850
2851         vcpu->arch.nmi_injected = events->nmi.injected;
2852         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2853                 vcpu->arch.nmi_pending = events->nmi.pending;
2854         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2855
2856         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2857                 vcpu->arch.sipi_vector = events->sipi_vector;
2858
2859         kvm_make_request(KVM_REQ_EVENT, vcpu);
2860
2861         return 0;
2862 }
2863
2864 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2865                                              struct kvm_debugregs *dbgregs)
2866 {
2867         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2868         dbgregs->dr6 = vcpu->arch.dr6;
2869         dbgregs->dr7 = vcpu->arch.dr7;
2870         dbgregs->flags = 0;
2871         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2872 }
2873
2874 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2875                                             struct kvm_debugregs *dbgregs)
2876 {
2877         if (dbgregs->flags)
2878                 return -EINVAL;
2879
2880         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2881         vcpu->arch.dr6 = dbgregs->dr6;
2882         vcpu->arch.dr7 = dbgregs->dr7;
2883
2884         return 0;
2885 }
2886
2887 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2888                                          struct kvm_xsave *guest_xsave)
2889 {
2890         if (cpu_has_xsave)
2891                 memcpy(guest_xsave->region,
2892                         &vcpu->arch.guest_fpu.state->xsave,
2893                         xstate_size);
2894         else {
2895                 memcpy(guest_xsave->region,
2896                         &vcpu->arch.guest_fpu.state->fxsave,
2897                         sizeof(struct i387_fxsave_struct));
2898                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2899                         XSTATE_FPSSE;
2900         }
2901 }
2902
2903 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2904                                         struct kvm_xsave *guest_xsave)
2905 {
2906         u64 xstate_bv =
2907                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2908
2909         if (cpu_has_xsave)
2910                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2911                         guest_xsave->region, xstate_size);
2912         else {
2913                 if (xstate_bv & ~XSTATE_FPSSE)
2914                         return -EINVAL;
2915                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2916                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2917         }
2918         return 0;
2919 }
2920
2921 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2922                                         struct kvm_xcrs *guest_xcrs)
2923 {
2924         if (!cpu_has_xsave) {
2925                 guest_xcrs->nr_xcrs = 0;
2926                 return;
2927         }
2928
2929         guest_xcrs->nr_xcrs = 1;
2930         guest_xcrs->flags = 0;
2931         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2932         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2933 }
2934
2935 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2936                                        struct kvm_xcrs *guest_xcrs)
2937 {
2938         int i, r = 0;
2939
2940         if (!cpu_has_xsave)
2941                 return -EINVAL;
2942
2943         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2944                 return -EINVAL;
2945
2946         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2947                 /* Only support XCR0 currently */
2948                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2949                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2950                                 guest_xcrs->xcrs[0].value);
2951                         break;
2952                 }
2953         if (r)
2954                 r = -EINVAL;
2955         return r;
2956 }
2957
2958 /*
2959  * kvm_set_guest_paused() indicates to the guest kernel that it has been
2960  * stopped by the hypervisor.  This function will be called from the host only.
2961  * EINVAL is returned when the host attempts to set the flag for a guest that
2962  * does not support pv clocks.
2963  */
2964 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
2965 {
2966         if (!vcpu->arch.time_page)
2967                 return -EINVAL;
2968         vcpu->arch.pvclock_set_guest_stopped_request = true;
2969         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2970         return 0;
2971 }
2972
2973 long kvm_arch_vcpu_ioctl(struct file *filp,
2974                          unsigned int ioctl, unsigned long arg)
2975 {
2976         struct kvm_vcpu *vcpu = filp->private_data;
2977         void __user *argp = (void __user *)arg;
2978         int r;
2979         union {
2980                 struct kvm_lapic_state *lapic;
2981                 struct kvm_xsave *xsave;
2982                 struct kvm_xcrs *xcrs;
2983                 void *buffer;
2984         } u;
2985
2986         u.buffer = NULL;
2987         switch (ioctl) {
2988         case KVM_GET_LAPIC: {
2989                 r = -EINVAL;
2990                 if (!vcpu->arch.apic)
2991                         goto out;
2992                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2993
2994                 r = -ENOMEM;
2995                 if (!u.lapic)
2996                         goto out;
2997                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2998                 if (r)
2999                         goto out;
3000                 r = -EFAULT;
3001                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3002                         goto out;
3003                 r = 0;
3004                 break;
3005         }
3006         case KVM_SET_LAPIC: {
3007                 r = -EINVAL;
3008                 if (!vcpu->arch.apic)
3009                         goto out;
3010                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3011                 if (IS_ERR(u.lapic))
3012                         return PTR_ERR(u.lapic);
3013
3014                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3015                 break;
3016         }
3017         case KVM_INTERRUPT: {
3018                 struct kvm_interrupt irq;
3019
3020                 r = -EFAULT;
3021                 if (copy_from_user(&irq, argp, sizeof irq))
3022                         goto out;
3023                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3024                 break;
3025         }
3026         case KVM_NMI: {
3027                 r = kvm_vcpu_ioctl_nmi(vcpu);
3028                 break;
3029         }
3030         case KVM_SET_CPUID: {
3031                 struct kvm_cpuid __user *cpuid_arg = argp;
3032                 struct kvm_cpuid cpuid;
3033
3034                 r = -EFAULT;
3035                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3036                         goto out;
3037                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3038                 break;
3039         }
3040         case KVM_SET_CPUID2: {
3041                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3042                 struct kvm_cpuid2 cpuid;
3043
3044                 r = -EFAULT;
3045                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3046                         goto out;
3047                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3048                                               cpuid_arg->entries);
3049                 break;
3050         }
3051         case KVM_GET_CPUID2: {
3052                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3053                 struct kvm_cpuid2 cpuid;
3054
3055                 r = -EFAULT;
3056                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3057                         goto out;
3058                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3059                                               cpuid_arg->entries);
3060                 if (r)
3061                         goto out;
3062                 r = -EFAULT;
3063                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3064                         goto out;
3065                 r = 0;
3066                 break;
3067         }
3068         case KVM_GET_MSRS:
3069                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3070                 break;
3071         case KVM_SET_MSRS:
3072                 r = msr_io(vcpu, argp, do_set_msr, 0);
3073                 break;
3074         case KVM_TPR_ACCESS_REPORTING: {
3075                 struct kvm_tpr_access_ctl tac;
3076
3077                 r = -EFAULT;
3078                 if (copy_from_user(&tac, argp, sizeof tac))
3079                         goto out;
3080                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3081                 if (r)
3082                         goto out;
3083                 r = -EFAULT;
3084                 if (copy_to_user(argp, &tac, sizeof tac))
3085                         goto out;
3086                 r = 0;
3087                 break;
3088         };
3089         case KVM_SET_VAPIC_ADDR: {
3090                 struct kvm_vapic_addr va;
3091
3092                 r = -EINVAL;
3093                 if (!irqchip_in_kernel(vcpu->kvm))
3094                         goto out;
3095                 r = -EFAULT;
3096                 if (copy_from_user(&va, argp, sizeof va))
3097                         goto out;
3098                 r = 0;
3099                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3100                 break;
3101         }
3102         case KVM_X86_SETUP_MCE: {
3103                 u64 mcg_cap;
3104
3105                 r = -EFAULT;
3106                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3107                         goto out;
3108                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3109                 break;
3110         }
3111         case KVM_X86_SET_MCE: {
3112                 struct kvm_x86_mce mce;
3113
3114                 r = -EFAULT;
3115                 if (copy_from_user(&mce, argp, sizeof mce))
3116                         goto out;
3117                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3118                 break;
3119         }
3120         case KVM_GET_VCPU_EVENTS: {
3121                 struct kvm_vcpu_events events;
3122
3123                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3124
3125                 r = -EFAULT;
3126                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3127                         break;
3128                 r = 0;
3129                 break;
3130         }
3131         case KVM_SET_VCPU_EVENTS: {
3132                 struct kvm_vcpu_events events;
3133
3134                 r = -EFAULT;
3135                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3136                         break;
3137
3138                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3139                 break;
3140         }
3141         case KVM_GET_DEBUGREGS: {
3142                 struct kvm_debugregs dbgregs;
3143
3144                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3145
3146                 r = -EFAULT;
3147                 if (copy_to_user(argp, &dbgregs,
3148                                  sizeof(struct kvm_debugregs)))
3149                         break;
3150                 r = 0;
3151                 break;
3152         }
3153         case KVM_SET_DEBUGREGS: {
3154                 struct kvm_debugregs dbgregs;
3155
3156                 r = -EFAULT;
3157                 if (copy_from_user(&dbgregs, argp,
3158                                    sizeof(struct kvm_debugregs)))
3159                         break;
3160
3161                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3162                 break;
3163         }
3164         case KVM_GET_XSAVE: {
3165                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3166                 r = -ENOMEM;
3167                 if (!u.xsave)
3168                         break;
3169
3170                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3171
3172                 r = -EFAULT;
3173                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3174                         break;
3175                 r = 0;
3176                 break;
3177         }
3178         case KVM_SET_XSAVE: {
3179                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3180                 if (IS_ERR(u.xsave))
3181                         return PTR_ERR(u.xsave);
3182
3183                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3184                 break;
3185         }
3186         case KVM_GET_XCRS: {
3187                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3188                 r = -ENOMEM;
3189                 if (!u.xcrs)
3190                         break;
3191
3192                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3193
3194                 r = -EFAULT;
3195                 if (copy_to_user(argp, u.xcrs,
3196                                  sizeof(struct kvm_xcrs)))
3197                         break;
3198                 r = 0;
3199                 break;
3200         }
3201         case KVM_SET_XCRS: {
3202                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3203                 if (IS_ERR(u.xcrs))
3204                         return PTR_ERR(u.xcrs);
3205
3206                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3207                 break;
3208         }
3209         case KVM_SET_TSC_KHZ: {
3210                 u32 user_tsc_khz;
3211
3212                 r = -EINVAL;
3213                 user_tsc_khz = (u32)arg;
3214
3215                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3216                         goto out;
3217
3218                 if (user_tsc_khz == 0)
3219                         user_tsc_khz = tsc_khz;
3220
3221                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3222
3223                 r = 0;
3224                 goto out;
3225         }
3226         case KVM_GET_TSC_KHZ: {
3227                 r = vcpu->arch.virtual_tsc_khz;
3228                 goto out;
3229         }
3230         case KVM_KVMCLOCK_CTRL: {
3231                 r = kvm_set_guest_paused(vcpu);
3232                 goto out;
3233         }
3234         default:
3235                 r = -EINVAL;
3236         }
3237 out:
3238         kfree(u.buffer);
3239         return r;
3240 }
3241
3242 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3243 {
3244         return VM_FAULT_SIGBUS;
3245 }
3246
3247 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3248 {
3249         int ret;
3250
3251         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3252                 return -EINVAL;
3253         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3254         return ret;
3255 }
3256
3257 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3258                                               u64 ident_addr)
3259 {
3260         kvm->arch.ept_identity_map_addr = ident_addr;
3261         return 0;
3262 }
3263
3264 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3265                                           u32 kvm_nr_mmu_pages)
3266 {
3267         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3268                 return -EINVAL;
3269
3270         mutex_lock(&kvm->slots_lock);
3271
3272         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3273         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3274
3275         mutex_unlock(&kvm->slots_lock);
3276         return 0;
3277 }
3278
3279 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3280 {
3281         return kvm->arch.n_max_mmu_pages;
3282 }
3283
3284 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3285 {
3286         int r;
3287
3288         r = 0;
3289         switch (chip->chip_id) {
3290         case KVM_IRQCHIP_PIC_MASTER:
3291                 memcpy(&chip->chip.pic,
3292                         &pic_irqchip(kvm)->pics[0],
3293                         sizeof(struct kvm_pic_state));
3294                 break;
3295         case KVM_IRQCHIP_PIC_SLAVE:
3296                 memcpy(&chip->chip.pic,
3297                         &pic_irqchip(kvm)->pics[1],
3298                         sizeof(struct kvm_pic_state));
3299                 break;
3300         case KVM_IRQCHIP_IOAPIC:
3301                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3302                 break;
3303         default:
3304                 r = -EINVAL;
3305                 break;
3306         }
3307         return r;
3308 }
3309
3310 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3311 {
3312         int r;
3313
3314         r = 0;
3315         switch (chip->chip_id) {
3316         case KVM_IRQCHIP_PIC_MASTER:
3317                 spin_lock(&pic_irqchip(kvm)->lock);
3318                 memcpy(&pic_irqchip(kvm)->pics[0],
3319                         &chip->chip.pic,
3320                         sizeof(struct kvm_pic_state));
3321                 spin_unlock(&pic_irqchip(kvm)->lock);
3322                 break;
3323         case KVM_IRQCHIP_PIC_SLAVE:
3324                 spin_lock(&pic_irqchip(kvm)->lock);
3325                 memcpy(&pic_irqchip(kvm)->pics[1],
3326                         &chip->chip.pic,
3327                         sizeof(struct kvm_pic_state));
3328                 spin_unlock(&pic_irqchip(kvm)->lock);
3329                 break;
3330         case KVM_IRQCHIP_IOAPIC:
3331                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3332                 break;
3333         default:
3334                 r = -EINVAL;
3335                 break;
3336         }
3337         kvm_pic_update_irq(pic_irqchip(kvm));
3338         return r;
3339 }
3340
3341 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3342 {
3343         int r = 0;
3344
3345         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3346         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3347         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3348         return r;
3349 }
3350
3351 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3352 {
3353         int r = 0;
3354
3355         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3356         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3357         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3358         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3359         return r;
3360 }
3361
3362 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3363 {
3364         int r = 0;
3365
3366         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3367         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3368                 sizeof(ps->channels));
3369         ps->flags = kvm->arch.vpit->pit_state.flags;
3370         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3371         memset(&ps->reserved, 0, sizeof(ps->reserved));
3372         return r;
3373 }
3374
3375 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3376 {
3377         int r = 0, start = 0;
3378         u32 prev_legacy, cur_legacy;
3379         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3380         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3381         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3382         if (!prev_legacy && cur_legacy)
3383                 start = 1;
3384         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3385                sizeof(kvm->arch.vpit->pit_state.channels));
3386         kvm->arch.vpit->pit_state.flags = ps->flags;
3387         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3388         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3389         return r;
3390 }
3391
3392 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3393                                  struct kvm_reinject_control *control)
3394 {
3395         if (!kvm->arch.vpit)
3396                 return -ENXIO;
3397         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3398         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3399         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3400         return 0;
3401 }
3402
3403 /**
3404  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3405  * @kvm: kvm instance
3406  * @log: slot id and address to which we copy the log
3407  *
3408  * We need to keep it in mind that VCPU threads can write to the bitmap
3409  * concurrently.  So, to avoid losing data, we keep the following order for
3410  * each bit:
3411  *
3412  *   1. Take a snapshot of the bit and clear it if needed.
3413  *   2. Write protect the corresponding page.
3414  *   3. Flush TLB's if needed.
3415  *   4. Copy the snapshot to the userspace.
3416  *
3417  * Between 2 and 3, the guest may write to the page using the remaining TLB
3418  * entry.  This is not a problem because the page will be reported dirty at
3419  * step 4 using the snapshot taken before and step 3 ensures that successive
3420  * writes will be logged for the next call.
3421  */
3422 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3423 {
3424         int r;
3425         struct kvm_memory_slot *memslot;
3426         unsigned long n, i;
3427         unsigned long *dirty_bitmap;
3428         unsigned long *dirty_bitmap_buffer;
3429         bool is_dirty = false;
3430
3431         mutex_lock(&kvm->slots_lock);
3432
3433         r = -EINVAL;
3434         if (log->slot >= KVM_USER_MEM_SLOTS)
3435                 goto out;
3436
3437         memslot = id_to_memslot(kvm->memslots, log->slot);
3438
3439         dirty_bitmap = memslot->dirty_bitmap;
3440         r = -ENOENT;
3441         if (!dirty_bitmap)
3442                 goto out;
3443
3444         n = kvm_dirty_bitmap_bytes(memslot);
3445
3446         dirty_bitmap_buffer = dirty_bitmap + n / sizeof(long);
3447         memset(dirty_bitmap_buffer, 0, n);
3448
3449         spin_lock(&kvm->mmu_lock);
3450
3451         for (i = 0; i < n / sizeof(long); i++) {
3452                 unsigned long mask;
3453                 gfn_t offset;
3454
3455                 if (!dirty_bitmap[i])
3456                         continue;
3457
3458                 is_dirty = true;
3459
3460                 mask = xchg(&dirty_bitmap[i], 0);
3461                 dirty_bitmap_buffer[i] = mask;
3462
3463                 offset = i * BITS_PER_LONG;
3464                 kvm_mmu_write_protect_pt_masked(kvm, memslot, offset, mask);
3465         }
3466         if (is_dirty)
3467                 kvm_flush_remote_tlbs(kvm);
3468
3469         spin_unlock(&kvm->mmu_lock);
3470
3471         r = -EFAULT;
3472         if (copy_to_user(log->dirty_bitmap, dirty_bitmap_buffer, n))
3473                 goto out;
3474
3475         r = 0;
3476 out:
3477         mutex_unlock(&kvm->slots_lock);
3478         return r;
3479 }
3480
3481 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event)
3482 {
3483         if (!irqchip_in_kernel(kvm))
3484                 return -ENXIO;
3485
3486         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3487                                         irq_event->irq, irq_event->level);
3488         return 0;
3489 }
3490
3491 long kvm_arch_vm_ioctl(struct file *filp,
3492                        unsigned int ioctl, unsigned long arg)
3493 {
3494         struct kvm *kvm = filp->private_data;
3495         void __user *argp = (void __user *)arg;
3496         int r = -ENOTTY;
3497         /*
3498          * This union makes it completely explicit to gcc-3.x
3499          * that these two variables' stack usage should be
3500          * combined, not added together.
3501          */
3502         union {
3503                 struct kvm_pit_state ps;
3504                 struct kvm_pit_state2 ps2;
3505                 struct kvm_pit_config pit_config;
3506         } u;
3507
3508         switch (ioctl) {
3509         case KVM_SET_TSS_ADDR:
3510                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3511                 break;
3512         case KVM_SET_IDENTITY_MAP_ADDR: {
3513                 u64 ident_addr;
3514
3515                 r = -EFAULT;
3516                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3517                         goto out;
3518                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3519                 break;
3520         }
3521         case KVM_SET_NR_MMU_PAGES:
3522                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3523                 break;
3524         case KVM_GET_NR_MMU_PAGES:
3525                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3526                 break;
3527         case KVM_CREATE_IRQCHIP: {
3528                 struct kvm_pic *vpic;
3529
3530                 mutex_lock(&kvm->lock);
3531                 r = -EEXIST;
3532                 if (kvm->arch.vpic)
3533                         goto create_irqchip_unlock;
3534                 r = -EINVAL;
3535                 if (atomic_read(&kvm->online_vcpus))
3536                         goto create_irqchip_unlock;
3537                 r = -ENOMEM;
3538                 vpic = kvm_create_pic(kvm);
3539                 if (vpic) {
3540                         r = kvm_ioapic_init(kvm);
3541                         if (r) {
3542                                 mutex_lock(&kvm->slots_lock);
3543                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3544                                                           &vpic->dev_master);
3545                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3546                                                           &vpic->dev_slave);
3547                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3548                                                           &vpic->dev_eclr);
3549                                 mutex_unlock(&kvm->slots_lock);
3550                                 kfree(vpic);
3551                                 goto create_irqchip_unlock;
3552                         }
3553                 } else
3554                         goto create_irqchip_unlock;
3555                 smp_wmb();
3556                 kvm->arch.vpic = vpic;
3557                 smp_wmb();
3558                 r = kvm_setup_default_irq_routing(kvm);
3559                 if (r) {
3560                         mutex_lock(&kvm->slots_lock);
3561                         mutex_lock(&kvm->irq_lock);
3562                         kvm_ioapic_destroy(kvm);
3563                         kvm_destroy_pic(kvm);
3564                         mutex_unlock(&kvm->irq_lock);
3565                         mutex_unlock(&kvm->slots_lock);
3566                 }
3567         create_irqchip_unlock:
3568                 mutex_unlock(&kvm->lock);
3569                 break;
3570         }
3571         case KVM_CREATE_PIT:
3572                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3573                 goto create_pit;
3574         case KVM_CREATE_PIT2:
3575                 r = -EFAULT;
3576                 if (copy_from_user(&u.pit_config, argp,
3577                                    sizeof(struct kvm_pit_config)))
3578                         goto out;
3579         create_pit:
3580                 mutex_lock(&kvm->slots_lock);
3581                 r = -EEXIST;
3582                 if (kvm->arch.vpit)
3583                         goto create_pit_unlock;
3584                 r = -ENOMEM;
3585                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3586                 if (kvm->arch.vpit)
3587                         r = 0;
3588         create_pit_unlock:
3589                 mutex_unlock(&kvm->slots_lock);
3590                 break;
3591         case KVM_GET_IRQCHIP: {
3592                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3593                 struct kvm_irqchip *chip;
3594
3595                 chip = memdup_user(argp, sizeof(*chip));
3596                 if (IS_ERR(chip)) {
3597                         r = PTR_ERR(chip);
3598                         goto out;
3599                 }
3600
3601                 r = -ENXIO;
3602                 if (!irqchip_in_kernel(kvm))
3603                         goto get_irqchip_out;
3604                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3605                 if (r)
3606                         goto get_irqchip_out;
3607                 r = -EFAULT;
3608                 if (copy_to_user(argp, chip, sizeof *chip))
3609                         goto get_irqchip_out;
3610                 r = 0;
3611         get_irqchip_out:
3612                 kfree(chip);
3613                 break;
3614         }
3615         case KVM_SET_IRQCHIP: {
3616                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3617                 struct kvm_irqchip *chip;
3618
3619                 chip = memdup_user(argp, sizeof(*chip));
3620                 if (IS_ERR(chip)) {
3621                         r = PTR_ERR(chip);
3622                         goto out;
3623                 }
3624
3625                 r = -ENXIO;
3626                 if (!irqchip_in_kernel(kvm))
3627                         goto set_irqchip_out;
3628                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3629                 if (r)
3630                         goto set_irqchip_out;
3631                 r = 0;
3632         set_irqchip_out:
3633                 kfree(chip);
3634                 break;
3635         }
3636         case KVM_GET_PIT: {
3637                 r = -EFAULT;
3638                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3639                         goto out;
3640                 r = -ENXIO;
3641                 if (!kvm->arch.vpit)
3642                         goto out;
3643                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3644                 if (r)
3645                         goto out;
3646                 r = -EFAULT;
3647                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3648                         goto out;
3649                 r = 0;
3650                 break;
3651         }
3652         case KVM_SET_PIT: {
3653                 r = -EFAULT;
3654                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3655                         goto out;
3656                 r = -ENXIO;
3657                 if (!kvm->arch.vpit)
3658                         goto out;
3659                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3660                 break;
3661         }
3662         case KVM_GET_PIT2: {
3663                 r = -ENXIO;
3664                 if (!kvm->arch.vpit)
3665                         goto out;
3666                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3667                 if (r)
3668                         goto out;
3669                 r = -EFAULT;
3670                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3671                         goto out;
3672                 r = 0;
3673                 break;
3674         }
3675         case KVM_SET_PIT2: {
3676                 r = -EFAULT;
3677                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3678                         goto out;
3679                 r = -ENXIO;
3680                 if (!kvm->arch.vpit)
3681                         goto out;
3682                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3683                 break;
3684         }
3685         case KVM_REINJECT_CONTROL: {
3686                 struct kvm_reinject_control control;
3687                 r =  -EFAULT;
3688                 if (copy_from_user(&control, argp, sizeof(control)))
3689                         goto out;
3690                 r = kvm_vm_ioctl_reinject(kvm, &control);
3691                 break;
3692         }
3693         case KVM_XEN_HVM_CONFIG: {
3694                 r = -EFAULT;
3695                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3696                                    sizeof(struct kvm_xen_hvm_config)))
3697                         goto out;
3698                 r = -EINVAL;
3699                 if (kvm->arch.xen_hvm_config.flags)
3700                         goto out;
3701                 r = 0;
3702                 break;
3703         }
3704         case KVM_SET_CLOCK: {
3705                 struct kvm_clock_data user_ns;
3706                 u64 now_ns;
3707                 s64 delta;
3708
3709                 r = -EFAULT;
3710                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3711                         goto out;
3712
3713                 r = -EINVAL;
3714                 if (user_ns.flags)
3715                         goto out;
3716
3717                 r = 0;
3718                 local_irq_disable();
3719                 now_ns = get_kernel_ns();
3720                 delta = user_ns.clock - now_ns;
3721                 local_irq_enable();
3722                 kvm->arch.kvmclock_offset = delta;
3723                 break;
3724         }
3725         case KVM_GET_CLOCK: {
3726                 struct kvm_clock_data user_ns;
3727                 u64 now_ns;
3728
3729                 local_irq_disable();
3730                 now_ns = get_kernel_ns();
3731                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3732                 local_irq_enable();
3733                 user_ns.flags = 0;
3734                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3735
3736                 r = -EFAULT;
3737                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3738                         goto out;
3739                 r = 0;
3740                 break;
3741         }
3742
3743         default:
3744                 ;
3745         }
3746 out:
3747         return r;
3748 }
3749
3750 static void kvm_init_msr_list(void)
3751 {
3752         u32 dummy[2];
3753         unsigned i, j;
3754
3755         /* skip the first msrs in the list. KVM-specific */
3756         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3757                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3758                         continue;
3759                 if (j < i)
3760                         msrs_to_save[j] = msrs_to_save[i];
3761                 j++;
3762         }
3763         num_msrs_to_save = j;
3764 }
3765
3766 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3767                            const void *v)
3768 {
3769         int handled = 0;
3770         int n;
3771
3772         do {
3773                 n = min(len, 8);
3774                 if (!(vcpu->arch.apic &&
3775                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3776                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3777                         break;
3778                 handled += n;
3779                 addr += n;
3780                 len -= n;
3781                 v += n;
3782         } while (len);
3783
3784         return handled;
3785 }
3786
3787 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3788 {
3789         int handled = 0;
3790         int n;
3791
3792         do {
3793                 n = min(len, 8);
3794                 if (!(vcpu->arch.apic &&
3795                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3796                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3797                         break;
3798                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3799                 handled += n;
3800                 addr += n;
3801                 len -= n;
3802                 v += n;
3803         } while (len);
3804
3805         return handled;
3806 }
3807
3808 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3809                         struct kvm_segment *var, int seg)
3810 {
3811         kvm_x86_ops->set_segment(vcpu, var, seg);
3812 }
3813
3814 void kvm_get_segment(struct kvm_vcpu *vcpu,
3815                      struct kvm_segment *var, int seg)
3816 {
3817         kvm_x86_ops->get_segment(vcpu, var, seg);
3818 }
3819
3820 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3821 {
3822         gpa_t t_gpa;
3823         struct x86_exception exception;
3824
3825         BUG_ON(!mmu_is_nested(vcpu));
3826
3827         /* NPT walks are always user-walks */
3828         access |= PFERR_USER_MASK;
3829         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3830
3831         return t_gpa;
3832 }
3833
3834 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3835                               struct x86_exception *exception)
3836 {
3837         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3838         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3839 }
3840
3841  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3842                                 struct x86_exception *exception)
3843 {
3844         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3845         access |= PFERR_FETCH_MASK;
3846         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3847 }
3848
3849 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3850                                struct x86_exception *exception)
3851 {
3852         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3853         access |= PFERR_WRITE_MASK;
3854         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3855 }
3856
3857 /* uses this to access any guest's mapped memory without checking CPL */
3858 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3859                                 struct x86_exception *exception)
3860 {
3861         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3862 }
3863
3864 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3865                                       struct kvm_vcpu *vcpu, u32 access,
3866                                       struct x86_exception *exception)
3867 {
3868         void *data = val;
3869         int r = X86EMUL_CONTINUE;
3870
3871         while (bytes) {
3872                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3873                                                             exception);
3874                 unsigned offset = addr & (PAGE_SIZE-1);
3875                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3876                 int ret;
3877
3878                 if (gpa == UNMAPPED_GVA)
3879                         return X86EMUL_PROPAGATE_FAULT;
3880                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3881                 if (ret < 0) {
3882                         r = X86EMUL_IO_NEEDED;
3883                         goto out;
3884                 }
3885
3886                 bytes -= toread;
3887                 data += toread;
3888                 addr += toread;
3889         }
3890 out:
3891         return r;
3892 }
3893
3894 /* used for instruction fetching */
3895 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3896                                 gva_t addr, void *val, unsigned int bytes,
3897                                 struct x86_exception *exception)
3898 {
3899         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3900         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3901
3902         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3903                                           access | PFERR_FETCH_MASK,
3904                                           exception);
3905 }
3906
3907 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3908                                gva_t addr, void *val, unsigned int bytes,
3909                                struct x86_exception *exception)
3910 {
3911         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3912         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3913
3914         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3915                                           exception);
3916 }
3917 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3918
3919 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3920                                       gva_t addr, void *val, unsigned int bytes,
3921                                       struct x86_exception *exception)
3922 {
3923         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3924         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3925 }
3926
3927 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3928                                        gva_t addr, void *val,
3929                                        unsigned int bytes,
3930                                        struct x86_exception *exception)
3931 {
3932         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3933         void *data = val;
3934         int r = X86EMUL_CONTINUE;
3935
3936         while (bytes) {
3937                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3938                                                              PFERR_WRITE_MASK,
3939                                                              exception);
3940                 unsigned offset = addr & (PAGE_SIZE-1);
3941                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3942                 int ret;
3943
3944                 if (gpa == UNMAPPED_GVA)
3945                         return X86EMUL_PROPAGATE_FAULT;
3946                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3947                 if (ret < 0) {
3948                         r = X86EMUL_IO_NEEDED;
3949                         goto out;
3950                 }
3951
3952                 bytes -= towrite;
3953                 data += towrite;
3954                 addr += towrite;
3955         }
3956 out:
3957         return r;
3958 }
3959 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
3960
3961 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
3962                                 gpa_t *gpa, struct x86_exception *exception,
3963                                 bool write)
3964 {
3965         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
3966                 | (write ? PFERR_WRITE_MASK : 0);
3967
3968         if (vcpu_match_mmio_gva(vcpu, gva)
3969             && !permission_fault(vcpu->arch.walk_mmu, vcpu->arch.access, access)) {
3970                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
3971                                         (gva & (PAGE_SIZE - 1));
3972                 trace_vcpu_match_mmio(gva, *gpa, write, false);
3973                 return 1;
3974         }
3975
3976         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3977
3978         if (*gpa == UNMAPPED_GVA)
3979                 return -1;
3980
3981         /* For APIC access vmexit */
3982         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3983                 return 1;
3984
3985         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
3986                 trace_vcpu_match_mmio(gva, *gpa, write, true);
3987                 return 1;
3988         }
3989
3990         return 0;
3991 }
3992
3993 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3994                         const void *val, int bytes)
3995 {
3996         int ret;
3997
3998         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3999         if (ret < 0)
4000                 return 0;
4001         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4002         return 1;
4003 }
4004
4005 struct read_write_emulator_ops {
4006         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4007                                   int bytes);
4008         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4009                                   void *val, int bytes);
4010         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4011                                int bytes, void *val);
4012         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4013                                     void *val, int bytes);
4014         bool write;
4015 };
4016
4017 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4018 {
4019         if (vcpu->mmio_read_completed) {
4020                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4021                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4022                 vcpu->mmio_read_completed = 0;
4023                 return 1;
4024         }
4025
4026         return 0;
4027 }
4028
4029 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4030                         void *val, int bytes)
4031 {
4032         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4033 }
4034
4035 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4036                          void *val, int bytes)
4037 {
4038         return emulator_write_phys(vcpu, gpa, val, bytes);
4039 }
4040
4041 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4042 {
4043         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4044         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4045 }
4046
4047 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4048                           void *val, int bytes)
4049 {
4050         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4051         return X86EMUL_IO_NEEDED;
4052 }
4053
4054 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4055                            void *val, int bytes)
4056 {
4057         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4058
4059         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4060         return X86EMUL_CONTINUE;
4061 }
4062
4063 static const struct read_write_emulator_ops read_emultor = {
4064         .read_write_prepare = read_prepare,
4065         .read_write_emulate = read_emulate,
4066         .read_write_mmio = vcpu_mmio_read,
4067         .read_write_exit_mmio = read_exit_mmio,
4068 };
4069
4070 static const struct read_write_emulator_ops write_emultor = {
4071         .read_write_emulate = write_emulate,
4072         .read_write_mmio = write_mmio,
4073         .read_write_exit_mmio = write_exit_mmio,
4074         .write = true,
4075 };
4076
4077 static int emulator_read_write_onepage(unsigned long addr, void *val,
4078                                        unsigned int bytes,
4079                                        struct x86_exception *exception,
4080                                        struct kvm_vcpu *vcpu,
4081                                        const struct read_write_emulator_ops *ops)
4082 {
4083         gpa_t gpa;
4084         int handled, ret;
4085         bool write = ops->write;
4086         struct kvm_mmio_fragment *frag;
4087
4088         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4089
4090         if (ret < 0)
4091                 return X86EMUL_PROPAGATE_FAULT;
4092
4093         /* For APIC access vmexit */
4094         if (ret)
4095                 goto mmio;
4096
4097         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4098                 return X86EMUL_CONTINUE;
4099
4100 mmio:
4101         /*
4102          * Is this MMIO handled locally?
4103          */
4104         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4105         if (handled == bytes)
4106                 return X86EMUL_CONTINUE;
4107
4108         gpa += handled;
4109         bytes -= handled;
4110         val += handled;
4111
4112         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4113         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4114         frag->gpa = gpa;
4115         frag->data = val;
4116         frag->len = bytes;
4117         return X86EMUL_CONTINUE;
4118 }
4119
4120 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4121                         void *val, unsigned int bytes,
4122                         struct x86_exception *exception,
4123                         const struct read_write_emulator_ops *ops)
4124 {
4125         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4126         gpa_t gpa;
4127         int rc;
4128
4129         if (ops->read_write_prepare &&
4130                   ops->read_write_prepare(vcpu, val, bytes))
4131                 return X86EMUL_CONTINUE;
4132
4133         vcpu->mmio_nr_fragments = 0;
4134
4135         /* Crossing a page boundary? */
4136         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4137                 int now;
4138
4139                 now = -addr & ~PAGE_MASK;
4140                 rc = emulator_read_write_onepage(addr, val, now, exception,
4141                                                  vcpu, ops);
4142
4143                 if (rc != X86EMUL_CONTINUE)
4144                         return rc;
4145                 addr += now;
4146                 val += now;
4147                 bytes -= now;
4148         }
4149
4150         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4151                                          vcpu, ops);
4152         if (rc != X86EMUL_CONTINUE)
4153                 return rc;
4154
4155         if (!vcpu->mmio_nr_fragments)
4156                 return rc;
4157
4158         gpa = vcpu->mmio_fragments[0].gpa;
4159
4160         vcpu->mmio_needed = 1;
4161         vcpu->mmio_cur_fragment = 0;
4162
4163         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4164         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4165         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4166         vcpu->run->mmio.phys_addr = gpa;
4167
4168         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4169 }
4170
4171 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4172                                   unsigned long addr,
4173                                   void *val,
4174                                   unsigned int bytes,
4175                                   struct x86_exception *exception)
4176 {
4177         return emulator_read_write(ctxt, addr, val, bytes,
4178                                    exception, &read_emultor);
4179 }
4180
4181 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4182                             unsigned long addr,
4183                             const void *val,
4184                             unsigned int bytes,
4185                             struct x86_exception *exception)
4186 {
4187         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4188                                    exception, &write_emultor);
4189 }
4190
4191 #define CMPXCHG_TYPE(t, ptr, old, new) \
4192         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4193
4194 #ifdef CONFIG_X86_64
4195 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4196 #else
4197 #  define CMPXCHG64(ptr, old, new) \
4198         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4199 #endif
4200
4201 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4202                                      unsigned long addr,
4203                                      const void *old,
4204                                      const void *new,
4205                                      unsigned int bytes,
4206                                      struct x86_exception *exception)
4207 {
4208         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4209         gpa_t gpa;
4210         struct page *page;
4211         char *kaddr;
4212         bool exchanged;
4213
4214         /* guests cmpxchg8b have to be emulated atomically */
4215         if (bytes > 8 || (bytes & (bytes - 1)))
4216                 goto emul_write;
4217
4218         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4219
4220         if (gpa == UNMAPPED_GVA ||
4221             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4222                 goto emul_write;
4223
4224         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4225                 goto emul_write;
4226
4227         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4228         if (is_error_page(page))
4229                 goto emul_write;
4230
4231         kaddr = kmap_atomic(page);
4232         kaddr += offset_in_page(gpa);
4233         switch (bytes) {
4234         case 1:
4235                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4236                 break;
4237         case 2:
4238                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4239                 break;
4240         case 4:
4241                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4242                 break;
4243         case 8:
4244                 exchanged = CMPXCHG64(kaddr, old, new);
4245                 break;
4246         default:
4247                 BUG();
4248         }
4249         kunmap_atomic(kaddr);
4250         kvm_release_page_dirty(page);
4251
4252         if (!exchanged)
4253                 return X86EMUL_CMPXCHG_FAILED;
4254
4255         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4256
4257         return X86EMUL_CONTINUE;
4258
4259 emul_write:
4260         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4261
4262         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4263 }
4264
4265 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4266 {
4267         /* TODO: String I/O for in kernel device */
4268         int r;
4269
4270         if (vcpu->arch.pio.in)
4271                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4272                                     vcpu->arch.pio.size, pd);
4273         else
4274                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4275                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4276                                      pd);
4277         return r;
4278 }
4279
4280 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4281                                unsigned short port, void *val,
4282                                unsigned int count, bool in)
4283 {
4284         trace_kvm_pio(!in, port, size, count);
4285
4286         vcpu->arch.pio.port = port;
4287         vcpu->arch.pio.in = in;
4288         vcpu->arch.pio.count  = count;
4289         vcpu->arch.pio.size = size;
4290
4291         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4292                 vcpu->arch.pio.count = 0;
4293                 return 1;
4294         }
4295
4296         vcpu->run->exit_reason = KVM_EXIT_IO;
4297         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4298         vcpu->run->io.size = size;
4299         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4300         vcpu->run->io.count = count;
4301         vcpu->run->io.port = port;
4302
4303         return 0;
4304 }
4305
4306 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4307                                     int size, unsigned short port, void *val,
4308                                     unsigned int count)
4309 {
4310         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4311         int ret;
4312
4313         if (vcpu->arch.pio.count)
4314                 goto data_avail;
4315
4316         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4317         if (ret) {
4318 data_avail:
4319                 memcpy(val, vcpu->arch.pio_data, size * count);
4320                 vcpu->arch.pio.count = 0;
4321                 return 1;
4322         }
4323
4324         return 0;
4325 }
4326
4327 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4328                                      int size, unsigned short port,
4329                                      const void *val, unsigned int count)
4330 {
4331         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4332
4333         memcpy(vcpu->arch.pio_data, val, size * count);
4334         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4335 }
4336
4337 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4338 {
4339         return kvm_x86_ops->get_segment_base(vcpu, seg);
4340 }
4341
4342 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4343 {
4344         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4345 }
4346
4347 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4348 {
4349         if (!need_emulate_wbinvd(vcpu))
4350                 return X86EMUL_CONTINUE;
4351
4352         if (kvm_x86_ops->has_wbinvd_exit()) {
4353                 int cpu = get_cpu();
4354
4355                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4356                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4357                                 wbinvd_ipi, NULL, 1);
4358                 put_cpu();
4359                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4360         } else
4361                 wbinvd();
4362         return X86EMUL_CONTINUE;
4363 }
4364 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4365
4366 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4367 {
4368         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4369 }
4370
4371 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4372 {
4373         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4374 }
4375
4376 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4377 {
4378
4379         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4380 }
4381
4382 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4383 {
4384         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4385 }
4386
4387 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4388 {
4389         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4390         unsigned long value;
4391
4392         switch (cr) {
4393         case 0:
4394                 value = kvm_read_cr0(vcpu);
4395                 break;
4396         case 2:
4397                 value = vcpu->arch.cr2;
4398                 break;
4399         case 3:
4400                 value = kvm_read_cr3(vcpu);
4401                 break;
4402         case 4:
4403                 value = kvm_read_cr4(vcpu);
4404                 break;
4405         case 8:
4406                 value = kvm_get_cr8(vcpu);
4407                 break;
4408         default:
4409                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4410                 return 0;
4411         }
4412
4413         return value;
4414 }
4415
4416 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4417 {
4418         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4419         int res = 0;
4420
4421         switch (cr) {
4422         case 0:
4423                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4424                 break;
4425         case 2:
4426                 vcpu->arch.cr2 = val;
4427                 break;
4428         case 3:
4429                 res = kvm_set_cr3(vcpu, val);
4430                 break;
4431         case 4:
4432                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4433                 break;
4434         case 8:
4435                 res = kvm_set_cr8(vcpu, val);
4436                 break;
4437         default:
4438                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4439                 res = -1;
4440         }
4441
4442         return res;
4443 }
4444
4445 static void emulator_set_rflags(struct x86_emulate_ctxt *ctxt, ulong val)
4446 {
4447         kvm_set_rflags(emul_to_vcpu(ctxt), val);
4448 }
4449
4450 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4451 {
4452         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4453 }
4454
4455 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4456 {
4457         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4458 }
4459
4460 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4461 {
4462         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4463 }
4464
4465 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4466 {
4467         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4468 }
4469
4470 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4471 {
4472         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4473 }
4474
4475 static unsigned long emulator_get_cached_segment_base(
4476         struct x86_emulate_ctxt *ctxt, int seg)
4477 {
4478         return get_segment_base(emul_to_vcpu(ctxt), seg);
4479 }
4480
4481 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4482                                  struct desc_struct *desc, u32 *base3,
4483                                  int seg)
4484 {
4485         struct kvm_segment var;
4486
4487         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4488         *selector = var.selector;
4489
4490         if (var.unusable) {
4491                 memset(desc, 0, sizeof(*desc));
4492                 return false;
4493         }
4494
4495         if (var.g)
4496                 var.limit >>= 12;
4497         set_desc_limit(desc, var.limit);
4498         set_desc_base(desc, (unsigned long)var.base);
4499 #ifdef CONFIG_X86_64
4500         if (base3)
4501                 *base3 = var.base >> 32;
4502 #endif
4503         desc->type = var.type;
4504         desc->s = var.s;
4505         desc->dpl = var.dpl;
4506         desc->p = var.present;
4507         desc->avl = var.avl;
4508         desc->l = var.l;
4509         desc->d = var.db;
4510         desc->g = var.g;
4511
4512         return true;
4513 }
4514
4515 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4516                                  struct desc_struct *desc, u32 base3,
4517                                  int seg)
4518 {
4519         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4520         struct kvm_segment var;
4521
4522         var.selector = selector;
4523         var.base = get_desc_base(desc);
4524 #ifdef CONFIG_X86_64
4525         var.base |= ((u64)base3) << 32;
4526 #endif
4527         var.limit = get_desc_limit(desc);
4528         if (desc->g)
4529                 var.limit = (var.limit << 12) | 0xfff;
4530         var.type = desc->type;
4531         var.present = desc->p;
4532         var.dpl = desc->dpl;
4533         var.db = desc->d;
4534         var.s = desc->s;
4535         var.l = desc->l;
4536         var.g = desc->g;
4537         var.avl = desc->avl;
4538         var.present = desc->p;
4539         var.unusable = !var.present;
4540         var.padding = 0;
4541
4542         kvm_set_segment(vcpu, &var, seg);
4543         return;
4544 }
4545
4546 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4547                             u32 msr_index, u64 *pdata)
4548 {
4549         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4550 }
4551
4552 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4553                             u32 msr_index, u64 data)
4554 {
4555         struct msr_data msr;
4556
4557         msr.data = data;
4558         msr.index = msr_index;
4559         msr.host_initiated = false;
4560         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4561 }
4562
4563 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4564                              u32 pmc, u64 *pdata)
4565 {
4566         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4567 }
4568
4569 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4570 {
4571         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4572 }
4573
4574 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4575 {
4576         preempt_disable();
4577         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4578         /*
4579          * CR0.TS may reference the host fpu state, not the guest fpu state,
4580          * so it may be clear at this point.
4581          */
4582         clts();
4583 }
4584
4585 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4586 {
4587         preempt_enable();
4588 }
4589
4590 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4591                               struct x86_instruction_info *info,
4592                               enum x86_intercept_stage stage)
4593 {
4594         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4595 }
4596
4597 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4598                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4599 {
4600         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4601 }
4602
4603 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4604 {
4605         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4606 }
4607
4608 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4609 {
4610         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4611 }
4612
4613 static const struct x86_emulate_ops emulate_ops = {
4614         .read_gpr            = emulator_read_gpr,
4615         .write_gpr           = emulator_write_gpr,
4616         .read_std            = kvm_read_guest_virt_system,
4617         .write_std           = kvm_write_guest_virt_system,
4618         .fetch               = kvm_fetch_guest_virt,
4619         .read_emulated       = emulator_read_emulated,
4620         .write_emulated      = emulator_write_emulated,
4621         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4622         .invlpg              = emulator_invlpg,
4623         .pio_in_emulated     = emulator_pio_in_emulated,
4624         .pio_out_emulated    = emulator_pio_out_emulated,
4625         .get_segment         = emulator_get_segment,
4626         .set_segment         = emulator_set_segment,
4627         .get_cached_segment_base = emulator_get_cached_segment_base,
4628         .get_gdt             = emulator_get_gdt,
4629         .get_idt             = emulator_get_idt,
4630         .set_gdt             = emulator_set_gdt,
4631         .set_idt             = emulator_set_idt,
4632         .get_cr              = emulator_get_cr,
4633         .set_cr              = emulator_set_cr,
4634         .set_rflags          = emulator_set_rflags,
4635         .cpl                 = emulator_get_cpl,
4636         .get_dr              = emulator_get_dr,
4637         .set_dr              = emulator_set_dr,
4638         .set_msr             = emulator_set_msr,
4639         .get_msr             = emulator_get_msr,
4640         .read_pmc            = emulator_read_pmc,
4641         .halt                = emulator_halt,
4642         .wbinvd              = emulator_wbinvd,
4643         .fix_hypercall       = emulator_fix_hypercall,
4644         .get_fpu             = emulator_get_fpu,
4645         .put_fpu             = emulator_put_fpu,
4646         .intercept           = emulator_intercept,
4647         .get_cpuid           = emulator_get_cpuid,
4648 };
4649
4650 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4651 {
4652         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4653         /*
4654          * an sti; sti; sequence only disable interrupts for the first
4655          * instruction. So, if the last instruction, be it emulated or
4656          * not, left the system with the INT_STI flag enabled, it
4657          * means that the last instruction is an sti. We should not
4658          * leave the flag on in this case. The same goes for mov ss
4659          */
4660         if (!(int_shadow & mask))
4661                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4662 }
4663
4664 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4665 {
4666         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4667         if (ctxt->exception.vector == PF_VECTOR)
4668                 kvm_propagate_fault(vcpu, &ctxt->exception);
4669         else if (ctxt->exception.error_code_valid)
4670                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4671                                       ctxt->exception.error_code);
4672         else
4673                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4674 }
4675
4676 static void init_decode_cache(struct x86_emulate_ctxt *ctxt)
4677 {
4678         memset(&ctxt->twobyte, 0,
4679                (void *)&ctxt->_regs - (void *)&ctxt->twobyte);
4680
4681         ctxt->fetch.start = 0;
4682         ctxt->fetch.end = 0;
4683         ctxt->io_read.pos = 0;
4684         ctxt->io_read.end = 0;
4685         ctxt->mem_read.pos = 0;
4686         ctxt->mem_read.end = 0;
4687 }
4688
4689 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4690 {
4691         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4692         int cs_db, cs_l;
4693
4694         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4695
4696         ctxt->eflags = kvm_get_rflags(vcpu);
4697         ctxt->eip = kvm_rip_read(vcpu);
4698         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4699                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4700                      cs_l                               ? X86EMUL_MODE_PROT64 :
4701                      cs_db                              ? X86EMUL_MODE_PROT32 :
4702                                                           X86EMUL_MODE_PROT16;
4703         ctxt->guest_mode = is_guest_mode(vcpu);
4704
4705         init_decode_cache(ctxt);
4706         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4707 }
4708
4709 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4710 {
4711         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4712         int ret;
4713
4714         init_emulate_ctxt(vcpu);
4715
4716         ctxt->op_bytes = 2;
4717         ctxt->ad_bytes = 2;
4718         ctxt->_eip = ctxt->eip + inc_eip;
4719         ret = emulate_int_real(ctxt, irq);
4720
4721         if (ret != X86EMUL_CONTINUE)
4722                 return EMULATE_FAIL;
4723
4724         ctxt->eip = ctxt->_eip;
4725         kvm_rip_write(vcpu, ctxt->eip);
4726         kvm_set_rflags(vcpu, ctxt->eflags);
4727
4728         if (irq == NMI_VECTOR)
4729                 vcpu->arch.nmi_pending = 0;
4730         else
4731                 vcpu->arch.interrupt.pending = false;
4732
4733         return EMULATE_DONE;
4734 }
4735 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4736
4737 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4738 {
4739         int r = EMULATE_DONE;
4740
4741         ++vcpu->stat.insn_emulation_fail;
4742         trace_kvm_emulate_insn_failed(vcpu);
4743         if (!is_guest_mode(vcpu)) {
4744                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4745                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4746                 vcpu->run->internal.ndata = 0;
4747                 r = EMULATE_FAIL;
4748         }
4749         kvm_queue_exception(vcpu, UD_VECTOR);
4750
4751         return r;
4752 }
4753
4754 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
4755                                   bool write_fault_to_shadow_pgtable)
4756 {
4757         gpa_t gpa = cr2;
4758         pfn_t pfn;
4759
4760         if (!vcpu->arch.mmu.direct_map) {
4761                 /*
4762                  * Write permission should be allowed since only
4763                  * write access need to be emulated.
4764                  */
4765                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4766
4767                 /*
4768                  * If the mapping is invalid in guest, let cpu retry
4769                  * it to generate fault.
4770                  */
4771                 if (gpa == UNMAPPED_GVA)
4772                         return true;
4773         }
4774
4775         /*
4776          * Do not retry the unhandleable instruction if it faults on the
4777          * readonly host memory, otherwise it will goto a infinite loop:
4778          * retry instruction -> write #PF -> emulation fail -> retry
4779          * instruction -> ...
4780          */
4781         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
4782
4783         /*
4784          * If the instruction failed on the error pfn, it can not be fixed,
4785          * report the error to userspace.
4786          */
4787         if (is_error_noslot_pfn(pfn))
4788                 return false;
4789
4790         kvm_release_pfn_clean(pfn);
4791
4792         /* The instructions are well-emulated on direct mmu. */
4793         if (vcpu->arch.mmu.direct_map) {
4794                 unsigned int indirect_shadow_pages;
4795
4796                 spin_lock(&vcpu->kvm->mmu_lock);
4797                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
4798                 spin_unlock(&vcpu->kvm->mmu_lock);
4799
4800                 if (indirect_shadow_pages)
4801                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4802
4803                 return true;
4804         }
4805
4806         /*
4807          * if emulation was due to access to shadowed page table
4808          * and it failed try to unshadow page and re-enter the
4809          * guest to let CPU execute the instruction.
4810          */
4811         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4812
4813         /*
4814          * If the access faults on its page table, it can not
4815          * be fixed by unprotecting shadow page and it should
4816          * be reported to userspace.
4817          */
4818         return !write_fault_to_shadow_pgtable;
4819 }
4820
4821 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4822                               unsigned long cr2,  int emulation_type)
4823 {
4824         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4825         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4826
4827         last_retry_eip = vcpu->arch.last_retry_eip;
4828         last_retry_addr = vcpu->arch.last_retry_addr;
4829
4830         /*
4831          * If the emulation is caused by #PF and it is non-page_table
4832          * writing instruction, it means the VM-EXIT is caused by shadow
4833          * page protected, we can zap the shadow page and retry this
4834          * instruction directly.
4835          *
4836          * Note: if the guest uses a non-page-table modifying instruction
4837          * on the PDE that points to the instruction, then we will unmap
4838          * the instruction and go to an infinite loop. So, we cache the
4839          * last retried eip and the last fault address, if we meet the eip
4840          * and the address again, we can break out of the potential infinite
4841          * loop.
4842          */
4843         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4844
4845         if (!(emulation_type & EMULTYPE_RETRY))
4846                 return false;
4847
4848         if (x86_page_table_writing_insn(ctxt))
4849                 return false;
4850
4851         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4852                 return false;
4853
4854         vcpu->arch.last_retry_eip = ctxt->eip;
4855         vcpu->arch.last_retry_addr = cr2;
4856
4857         if (!vcpu->arch.mmu.direct_map)
4858                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4859
4860         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4861
4862         return true;
4863 }
4864
4865 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
4866 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
4867
4868 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4869                             unsigned long cr2,
4870                             int emulation_type,
4871                             void *insn,
4872                             int insn_len)
4873 {
4874         int r;
4875         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4876         bool writeback = true;
4877         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
4878
4879         /*
4880          * Clear write_fault_to_shadow_pgtable here to ensure it is
4881          * never reused.
4882          */
4883         vcpu->arch.write_fault_to_shadow_pgtable = false;
4884         kvm_clear_exception_queue(vcpu);
4885
4886         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4887                 init_emulate_ctxt(vcpu);
4888                 ctxt->interruptibility = 0;
4889                 ctxt->have_exception = false;
4890                 ctxt->perm_ok = false;
4891
4892                 ctxt->only_vendor_specific_insn
4893                         = emulation_type & EMULTYPE_TRAP_UD;
4894
4895                 r = x86_decode_insn(ctxt, insn, insn_len);
4896
4897                 trace_kvm_emulate_insn_start(vcpu);
4898                 ++vcpu->stat.insn_emulation;
4899                 if (r != EMULATION_OK)  {
4900                         if (emulation_type & EMULTYPE_TRAP_UD)
4901                                 return EMULATE_FAIL;
4902                         if (reexecute_instruction(vcpu, cr2,
4903                                                   write_fault_to_spt))
4904                                 return EMULATE_DONE;
4905                         if (emulation_type & EMULTYPE_SKIP)
4906                                 return EMULATE_FAIL;
4907                         return handle_emulation_failure(vcpu);
4908                 }
4909         }
4910
4911         if (emulation_type & EMULTYPE_SKIP) {
4912                 kvm_rip_write(vcpu, ctxt->_eip);
4913                 return EMULATE_DONE;
4914         }
4915
4916         if (retry_instruction(ctxt, cr2, emulation_type))
4917                 return EMULATE_DONE;
4918
4919         /* this is needed for vmware backdoor interface to work since it
4920            changes registers values  during IO operation */
4921         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4922                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4923                 emulator_invalidate_register_cache(ctxt);
4924         }
4925
4926 restart:
4927         r = x86_emulate_insn(ctxt);
4928
4929         if (r == EMULATION_INTERCEPTED)
4930                 return EMULATE_DONE;
4931
4932         if (r == EMULATION_FAILED) {
4933                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt))
4934                         return EMULATE_DONE;
4935
4936                 return handle_emulation_failure(vcpu);
4937         }
4938
4939         if (ctxt->have_exception) {
4940                 inject_emulated_exception(vcpu);
4941                 r = EMULATE_DONE;
4942         } else if (vcpu->arch.pio.count) {
4943                 if (!vcpu->arch.pio.in)
4944                         vcpu->arch.pio.count = 0;
4945                 else {
4946                         writeback = false;
4947                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
4948                 }
4949                 r = EMULATE_DO_MMIO;
4950         } else if (vcpu->mmio_needed) {
4951                 if (!vcpu->mmio_is_write)
4952                         writeback = false;
4953                 r = EMULATE_DO_MMIO;
4954                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
4955         } else if (r == EMULATION_RESTART)
4956                 goto restart;
4957         else
4958                 r = EMULATE_DONE;
4959
4960         if (writeback) {
4961                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4962                 kvm_set_rflags(vcpu, ctxt->eflags);
4963                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4964                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4965                 kvm_rip_write(vcpu, ctxt->eip);
4966         } else
4967                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4968
4969         return r;
4970 }
4971 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4972
4973 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4974 {
4975         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4976         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4977                                             size, port, &val, 1);
4978         /* do not return to emulator after return from userspace */
4979         vcpu->arch.pio.count = 0;
4980         return ret;
4981 }
4982 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4983
4984 static void tsc_bad(void *info)
4985 {
4986         __this_cpu_write(cpu_tsc_khz, 0);
4987 }
4988
4989 static void tsc_khz_changed(void *data)
4990 {
4991         struct cpufreq_freqs *freq = data;
4992         unsigned long khz = 0;
4993
4994         if (data)
4995                 khz = freq->new;
4996         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4997                 khz = cpufreq_quick_get(raw_smp_processor_id());
4998         if (!khz)
4999                 khz = tsc_khz;
5000         __this_cpu_write(cpu_tsc_khz, khz);
5001 }
5002
5003 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5004                                      void *data)
5005 {
5006         struct cpufreq_freqs *freq = data;
5007         struct kvm *kvm;
5008         struct kvm_vcpu *vcpu;
5009         int i, send_ipi = 0;
5010
5011         /*
5012          * We allow guests to temporarily run on slowing clocks,
5013          * provided we notify them after, or to run on accelerating
5014          * clocks, provided we notify them before.  Thus time never
5015          * goes backwards.
5016          *
5017          * However, we have a problem.  We can't atomically update
5018          * the frequency of a given CPU from this function; it is
5019          * merely a notifier, which can be called from any CPU.
5020          * Changing the TSC frequency at arbitrary points in time
5021          * requires a recomputation of local variables related to
5022          * the TSC for each VCPU.  We must flag these local variables
5023          * to be updated and be sure the update takes place with the
5024          * new frequency before any guests proceed.
5025          *
5026          * Unfortunately, the combination of hotplug CPU and frequency
5027          * change creates an intractable locking scenario; the order
5028          * of when these callouts happen is undefined with respect to
5029          * CPU hotplug, and they can race with each other.  As such,
5030          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5031          * undefined; you can actually have a CPU frequency change take
5032          * place in between the computation of X and the setting of the
5033          * variable.  To protect against this problem, all updates of
5034          * the per_cpu tsc_khz variable are done in an interrupt
5035          * protected IPI, and all callers wishing to update the value
5036          * must wait for a synchronous IPI to complete (which is trivial
5037          * if the caller is on the CPU already).  This establishes the
5038          * necessary total order on variable updates.
5039          *
5040          * Note that because a guest time update may take place
5041          * anytime after the setting of the VCPU's request bit, the
5042          * correct TSC value must be set before the request.  However,
5043          * to ensure the update actually makes it to any guest which
5044          * starts running in hardware virtualization between the set
5045          * and the acquisition of the spinlock, we must also ping the
5046          * CPU after setting the request bit.
5047          *
5048          */
5049
5050         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5051                 return 0;
5052         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5053                 return 0;
5054
5055         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5056
5057         raw_spin_lock(&kvm_lock);
5058         list_for_each_entry(kvm, &vm_list, vm_list) {
5059                 kvm_for_each_vcpu(i, vcpu, kvm) {
5060                         if (vcpu->cpu != freq->cpu)
5061                                 continue;
5062                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5063                         if (vcpu->cpu != smp_processor_id())
5064                                 send_ipi = 1;
5065                 }
5066         }
5067         raw_spin_unlock(&kvm_lock);
5068
5069         if (freq->old < freq->new && send_ipi) {
5070                 /*
5071                  * We upscale the frequency.  Must make the guest
5072                  * doesn't see old kvmclock values while running with
5073                  * the new frequency, otherwise we risk the guest sees
5074                  * time go backwards.
5075                  *
5076                  * In case we update the frequency for another cpu
5077                  * (which might be in guest context) send an interrupt
5078                  * to kick the cpu out of guest context.  Next time
5079                  * guest context is entered kvmclock will be updated,
5080                  * so the guest will not see stale values.
5081                  */
5082                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5083         }
5084         return 0;
5085 }
5086
5087 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5088         .notifier_call  = kvmclock_cpufreq_notifier
5089 };
5090
5091 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5092                                         unsigned long action, void *hcpu)
5093 {
5094         unsigned int cpu = (unsigned long)hcpu;
5095
5096         switch (action) {
5097                 case CPU_ONLINE:
5098                 case CPU_DOWN_FAILED:
5099                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5100                         break;
5101                 case CPU_DOWN_PREPARE:
5102                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5103                         break;
5104         }
5105         return NOTIFY_OK;
5106 }
5107
5108 static struct notifier_block kvmclock_cpu_notifier_block = {
5109         .notifier_call  = kvmclock_cpu_notifier,
5110         .priority = -INT_MAX
5111 };
5112
5113 static void kvm_timer_init(void)
5114 {
5115         int cpu;
5116
5117         max_tsc_khz = tsc_khz;
5118         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5119         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5120 #ifdef CONFIG_CPU_FREQ
5121                 struct cpufreq_policy policy;
5122                 memset(&policy, 0, sizeof(policy));
5123                 cpu = get_cpu();
5124                 cpufreq_get_policy(&policy, cpu);
5125                 if (policy.cpuinfo.max_freq)
5126                         max_tsc_khz = policy.cpuinfo.max_freq;
5127                 put_cpu();
5128 #endif
5129                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5130                                           CPUFREQ_TRANSITION_NOTIFIER);
5131         }
5132         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5133         for_each_online_cpu(cpu)
5134                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5135 }
5136
5137 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5138
5139 int kvm_is_in_guest(void)
5140 {
5141         return __this_cpu_read(current_vcpu) != NULL;
5142 }
5143
5144 static int kvm_is_user_mode(void)
5145 {
5146         int user_mode = 3;
5147
5148         if (__this_cpu_read(current_vcpu))
5149                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5150
5151         return user_mode != 0;
5152 }
5153
5154 static unsigned long kvm_get_guest_ip(void)
5155 {
5156         unsigned long ip = 0;
5157
5158         if (__this_cpu_read(current_vcpu))
5159                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5160
5161         return ip;
5162 }
5163
5164 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5165         .is_in_guest            = kvm_is_in_guest,
5166         .is_user_mode           = kvm_is_user_mode,
5167         .get_guest_ip           = kvm_get_guest_ip,
5168 };
5169
5170 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5171 {
5172         __this_cpu_write(current_vcpu, vcpu);
5173 }
5174 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5175
5176 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5177 {
5178         __this_cpu_write(current_vcpu, NULL);
5179 }
5180 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5181
5182 static void kvm_set_mmio_spte_mask(void)
5183 {
5184         u64 mask;
5185         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5186
5187         /*
5188          * Set the reserved bits and the present bit of an paging-structure
5189          * entry to generate page fault with PFER.RSV = 1.
5190          */
5191         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
5192         mask |= 1ull;
5193
5194 #ifdef CONFIG_X86_64
5195         /*
5196          * If reserved bit is not supported, clear the present bit to disable
5197          * mmio page fault.
5198          */
5199         if (maxphyaddr == 52)
5200                 mask &= ~1ull;
5201 #endif
5202
5203         kvm_mmu_set_mmio_spte_mask(mask);
5204 }
5205
5206 #ifdef CONFIG_X86_64
5207 static void pvclock_gtod_update_fn(struct work_struct *work)
5208 {
5209         struct kvm *kvm;
5210
5211         struct kvm_vcpu *vcpu;
5212         int i;
5213
5214         raw_spin_lock(&kvm_lock);
5215         list_for_each_entry(kvm, &vm_list, vm_list)
5216                 kvm_for_each_vcpu(i, vcpu, kvm)
5217                         set_bit(KVM_REQ_MASTERCLOCK_UPDATE, &vcpu->requests);
5218         atomic_set(&kvm_guest_has_master_clock, 0);
5219         raw_spin_unlock(&kvm_lock);
5220 }
5221
5222 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5223
5224 /*
5225  * Notification about pvclock gtod data update.
5226  */
5227 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5228                                void *priv)
5229 {
5230         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5231         struct timekeeper *tk = priv;
5232
5233         update_pvclock_gtod(tk);
5234
5235         /* disable master clock if host does not trust, or does not
5236          * use, TSC clocksource
5237          */
5238         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5239             atomic_read(&kvm_guest_has_master_clock) != 0)
5240                 queue_work(system_long_wq, &pvclock_gtod_work);
5241
5242         return 0;
5243 }
5244
5245 static struct notifier_block pvclock_gtod_notifier = {
5246         .notifier_call = pvclock_gtod_notify,
5247 };
5248 #endif
5249
5250 int kvm_arch_init(void *opaque)
5251 {
5252         int r;
5253         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
5254
5255         if (kvm_x86_ops) {
5256                 printk(KERN_ERR "kvm: already loaded the other module\n");
5257                 r = -EEXIST;
5258                 goto out;
5259         }
5260
5261         if (!ops->cpu_has_kvm_support()) {
5262                 printk(KERN_ERR "kvm: no hardware support\n");
5263                 r = -EOPNOTSUPP;
5264                 goto out;
5265         }
5266         if (ops->disabled_by_bios()) {
5267                 printk(KERN_ERR "kvm: disabled by bios\n");
5268                 r = -EOPNOTSUPP;
5269                 goto out;
5270         }
5271
5272         r = kvm_mmu_module_init();
5273         if (r)
5274                 goto out;
5275
5276         kvm_set_mmio_spte_mask();
5277         kvm_init_msr_list();
5278
5279         kvm_x86_ops = ops;
5280         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5281                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5282
5283         kvm_timer_init();
5284
5285         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5286
5287         if (cpu_has_xsave)
5288                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5289
5290         kvm_lapic_init();
5291 #ifdef CONFIG_X86_64
5292         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5293 #endif
5294
5295         return 0;
5296
5297 out:
5298         return r;
5299 }
5300
5301 void kvm_arch_exit(void)
5302 {
5303         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5304
5305         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5306                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5307                                             CPUFREQ_TRANSITION_NOTIFIER);
5308         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5309 #ifdef CONFIG_X86_64
5310         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5311 #endif
5312         kvm_x86_ops = NULL;
5313         kvm_mmu_module_exit();
5314 }
5315
5316 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5317 {
5318         ++vcpu->stat.halt_exits;
5319         if (irqchip_in_kernel(vcpu->kvm)) {
5320                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5321                 return 1;
5322         } else {
5323                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5324                 return 0;
5325         }
5326 }
5327 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5328
5329 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5330 {
5331         u64 param, ingpa, outgpa, ret;
5332         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5333         bool fast, longmode;
5334         int cs_db, cs_l;
5335
5336         /*
5337          * hypercall generates UD from non zero cpl and real mode
5338          * per HYPER-V spec
5339          */
5340         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5341                 kvm_queue_exception(vcpu, UD_VECTOR);
5342                 return 0;
5343         }
5344
5345         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5346         longmode = is_long_mode(vcpu) && cs_l == 1;
5347
5348         if (!longmode) {
5349                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5350                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5351                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5352                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5353                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5354                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5355         }
5356 #ifdef CONFIG_X86_64
5357         else {
5358                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5359                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5360                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5361         }
5362 #endif
5363
5364         code = param & 0xffff;
5365         fast = (param >> 16) & 0x1;
5366         rep_cnt = (param >> 32) & 0xfff;
5367         rep_idx = (param >> 48) & 0xfff;
5368
5369         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5370
5371         switch (code) {
5372         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5373                 kvm_vcpu_on_spin(vcpu);
5374                 break;
5375         default:
5376                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5377                 break;
5378         }
5379
5380         ret = res | (((u64)rep_done & 0xfff) << 32);
5381         if (longmode) {
5382                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5383         } else {
5384                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5385                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5386         }
5387
5388         return 1;
5389 }
5390
5391 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5392 {
5393         unsigned long nr, a0, a1, a2, a3, ret;
5394         int r = 1;
5395
5396         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5397                 return kvm_hv_hypercall(vcpu);
5398
5399         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5400         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5401         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5402         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5403         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5404
5405         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5406
5407         if (!is_long_mode(vcpu)) {
5408                 nr &= 0xFFFFFFFF;
5409                 a0 &= 0xFFFFFFFF;
5410                 a1 &= 0xFFFFFFFF;
5411                 a2 &= 0xFFFFFFFF;
5412                 a3 &= 0xFFFFFFFF;
5413         }
5414
5415         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5416                 ret = -KVM_EPERM;
5417                 goto out;
5418         }
5419
5420         switch (nr) {
5421         case KVM_HC_VAPIC_POLL_IRQ:
5422                 ret = 0;
5423                 break;
5424         default:
5425                 ret = -KVM_ENOSYS;
5426                 break;
5427         }
5428 out:
5429         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5430         ++vcpu->stat.hypercalls;
5431         return r;
5432 }
5433 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5434
5435 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5436 {
5437         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5438         char instruction[3];
5439         unsigned long rip = kvm_rip_read(vcpu);
5440
5441         /*
5442          * Blow out the MMU to ensure that no other VCPU has an active mapping
5443          * to ensure that the updated hypercall appears atomically across all
5444          * VCPUs.
5445          */
5446         kvm_mmu_zap_all(vcpu->kvm);
5447
5448         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5449
5450         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5451 }
5452
5453 /*
5454  * Check if userspace requested an interrupt window, and that the
5455  * interrupt window is open.
5456  *
5457  * No need to exit to userspace if we already have an interrupt queued.
5458  */
5459 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5460 {
5461         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5462                 vcpu->run->request_interrupt_window &&
5463                 kvm_arch_interrupt_allowed(vcpu));
5464 }
5465
5466 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5467 {
5468         struct kvm_run *kvm_run = vcpu->run;
5469
5470         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5471         kvm_run->cr8 = kvm_get_cr8(vcpu);
5472         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5473         if (irqchip_in_kernel(vcpu->kvm))
5474                 kvm_run->ready_for_interrupt_injection = 1;
5475         else
5476                 kvm_run->ready_for_interrupt_injection =
5477                         kvm_arch_interrupt_allowed(vcpu) &&
5478                         !kvm_cpu_has_interrupt(vcpu) &&
5479                         !kvm_event_needs_reinjection(vcpu);
5480 }
5481
5482 static int vapic_enter(struct kvm_vcpu *vcpu)
5483 {
5484         struct kvm_lapic *apic = vcpu->arch.apic;
5485         struct page *page;
5486
5487         if (!apic || !apic->vapic_addr)
5488                 return 0;
5489
5490         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5491         if (is_error_page(page))
5492                 return -EFAULT;
5493
5494         vcpu->arch.apic->vapic_page = page;
5495         return 0;
5496 }
5497
5498 static void vapic_exit(struct kvm_vcpu *vcpu)
5499 {
5500         struct kvm_lapic *apic = vcpu->arch.apic;
5501         int idx;
5502
5503         if (!apic || !apic->vapic_addr)
5504                 return;
5505
5506         idx = srcu_read_lock(&vcpu->kvm->srcu);
5507         kvm_release_page_dirty(apic->vapic_page);
5508         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5509         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5510 }
5511
5512 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5513 {
5514         int max_irr, tpr;
5515
5516         if (!kvm_x86_ops->update_cr8_intercept)
5517                 return;
5518
5519         if (!vcpu->arch.apic)
5520                 return;
5521
5522         if (!vcpu->arch.apic->vapic_addr)
5523                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5524         else
5525                 max_irr = -1;
5526
5527         if (max_irr != -1)
5528                 max_irr >>= 4;
5529
5530         tpr = kvm_lapic_get_cr8(vcpu);
5531
5532         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5533 }
5534
5535 static void inject_pending_event(struct kvm_vcpu *vcpu)
5536 {
5537         /* try to reinject previous events if any */
5538         if (vcpu->arch.exception.pending) {
5539                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5540                                         vcpu->arch.exception.has_error_code,
5541                                         vcpu->arch.exception.error_code);
5542                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5543                                           vcpu->arch.exception.has_error_code,
5544                                           vcpu->arch.exception.error_code,
5545                                           vcpu->arch.exception.reinject);
5546                 return;
5547         }
5548
5549         if (vcpu->arch.nmi_injected) {
5550                 kvm_x86_ops->set_nmi(vcpu);
5551                 return;
5552         }
5553
5554         if (vcpu->arch.interrupt.pending) {
5555                 kvm_x86_ops->set_irq(vcpu);
5556                 return;
5557         }
5558
5559         /* try to inject new event if pending */
5560         if (vcpu->arch.nmi_pending) {
5561                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5562                         --vcpu->arch.nmi_pending;
5563                         vcpu->arch.nmi_injected = true;
5564                         kvm_x86_ops->set_nmi(vcpu);
5565                 }
5566         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
5567                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5568                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5569                                             false);
5570                         kvm_x86_ops->set_irq(vcpu);
5571                 }
5572         }
5573 }
5574
5575 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5576 {
5577         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5578                         !vcpu->guest_xcr0_loaded) {
5579                 /* kvm_set_xcr() also depends on this */
5580                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5581                 vcpu->guest_xcr0_loaded = 1;
5582         }
5583 }
5584
5585 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5586 {
5587         if (vcpu->guest_xcr0_loaded) {
5588                 if (vcpu->arch.xcr0 != host_xcr0)
5589                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5590                 vcpu->guest_xcr0_loaded = 0;
5591         }
5592 }
5593
5594 static void process_nmi(struct kvm_vcpu *vcpu)
5595 {
5596         unsigned limit = 2;
5597
5598         /*
5599          * x86 is limited to one NMI running, and one NMI pending after it.
5600          * If an NMI is already in progress, limit further NMIs to just one.
5601          * Otherwise, allow two (and we'll inject the first one immediately).
5602          */
5603         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5604                 limit = 1;
5605
5606         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5607         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5608         kvm_make_request(KVM_REQ_EVENT, vcpu);
5609 }
5610
5611 static void kvm_gen_update_masterclock(struct kvm *kvm)
5612 {
5613 #ifdef CONFIG_X86_64
5614         int i;
5615         struct kvm_vcpu *vcpu;
5616         struct kvm_arch *ka = &kvm->arch;
5617
5618         spin_lock(&ka->pvclock_gtod_sync_lock);
5619         kvm_make_mclock_inprogress_request(kvm);
5620         /* no guest entries from this point */
5621         pvclock_update_vm_gtod_copy(kvm);
5622
5623         kvm_for_each_vcpu(i, vcpu, kvm)
5624                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
5625
5626         /* guest entries allowed */
5627         kvm_for_each_vcpu(i, vcpu, kvm)
5628                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
5629
5630         spin_unlock(&ka->pvclock_gtod_sync_lock);
5631 #endif
5632 }
5633
5634 static void update_eoi_exitmap(struct kvm_vcpu *vcpu)
5635 {
5636         u64 eoi_exit_bitmap[4];
5637
5638         memset(eoi_exit_bitmap, 0, 32);
5639
5640         kvm_ioapic_calculate_eoi_exitmap(vcpu, eoi_exit_bitmap);
5641         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
5642 }
5643
5644 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5645 {
5646         int r;
5647         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5648                 vcpu->run->request_interrupt_window;
5649         bool req_immediate_exit = 0;
5650
5651         if (vcpu->requests) {
5652                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5653                         kvm_mmu_unload(vcpu);
5654                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5655                         __kvm_migrate_timers(vcpu);
5656                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
5657                         kvm_gen_update_masterclock(vcpu->kvm);
5658                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5659                         r = kvm_guest_time_update(vcpu);
5660                         if (unlikely(r))
5661                                 goto out;
5662                 }
5663                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5664                         kvm_mmu_sync_roots(vcpu);
5665                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5666                         kvm_x86_ops->tlb_flush(vcpu);
5667                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5668                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5669                         r = 0;
5670                         goto out;
5671                 }
5672                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5673                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5674                         r = 0;
5675                         goto out;
5676                 }
5677                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5678                         vcpu->fpu_active = 0;
5679                         kvm_x86_ops->fpu_deactivate(vcpu);
5680                 }
5681                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5682                         /* Page is swapped out. Do synthetic halt */
5683                         vcpu->arch.apf.halted = true;
5684                         r = 1;
5685                         goto out;
5686                 }
5687                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5688                         record_steal_time(vcpu);
5689                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5690                         process_nmi(vcpu);
5691                 req_immediate_exit =
5692                         kvm_check_request(KVM_REQ_IMMEDIATE_EXIT, vcpu);
5693                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5694                         kvm_handle_pmu_event(vcpu);
5695                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5696                         kvm_deliver_pmi(vcpu);
5697                 if (kvm_check_request(KVM_REQ_EOIBITMAP, vcpu))
5698                         update_eoi_exitmap(vcpu);
5699         }
5700
5701         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5702                 inject_pending_event(vcpu);
5703
5704                 /* enable NMI/IRQ window open exits if needed */
5705                 if (vcpu->arch.nmi_pending)
5706                         kvm_x86_ops->enable_nmi_window(vcpu);
5707                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
5708                         kvm_x86_ops->enable_irq_window(vcpu);
5709
5710                 if (kvm_lapic_enabled(vcpu)) {
5711                         /*
5712                          * Update architecture specific hints for APIC
5713                          * virtual interrupt delivery.
5714                          */
5715                         if (kvm_x86_ops->hwapic_irr_update)
5716                                 kvm_x86_ops->hwapic_irr_update(vcpu,
5717                                         kvm_lapic_find_highest_irr(vcpu));
5718                         update_cr8_intercept(vcpu);
5719                         kvm_lapic_sync_to_vapic(vcpu);
5720                 }
5721         }
5722
5723         r = kvm_mmu_reload(vcpu);
5724         if (unlikely(r)) {
5725                 goto cancel_injection;
5726         }
5727
5728         preempt_disable();
5729
5730         kvm_x86_ops->prepare_guest_switch(vcpu);
5731         if (vcpu->fpu_active)
5732                 kvm_load_guest_fpu(vcpu);
5733         kvm_load_guest_xcr0(vcpu);
5734
5735         vcpu->mode = IN_GUEST_MODE;
5736
5737         /* We should set ->mode before check ->requests,
5738          * see the comment in make_all_cpus_request.
5739          */
5740         smp_mb();
5741
5742         local_irq_disable();
5743
5744         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5745             || need_resched() || signal_pending(current)) {
5746                 vcpu->mode = OUTSIDE_GUEST_MODE;
5747                 smp_wmb();
5748                 local_irq_enable();
5749                 preempt_enable();
5750                 r = 1;
5751                 goto cancel_injection;
5752         }
5753
5754         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5755
5756         if (req_immediate_exit)
5757                 smp_send_reschedule(vcpu->cpu);
5758
5759         kvm_guest_enter();
5760
5761         if (unlikely(vcpu->arch.switch_db_regs)) {
5762                 set_debugreg(0, 7);
5763                 set_debugreg(vcpu->arch.eff_db[0], 0);
5764                 set_debugreg(vcpu->arch.eff_db[1], 1);
5765                 set_debugreg(vcpu->arch.eff_db[2], 2);
5766                 set_debugreg(vcpu->arch.eff_db[3], 3);
5767         }
5768
5769         trace_kvm_entry(vcpu->vcpu_id);
5770         kvm_x86_ops->run(vcpu);
5771
5772         /*
5773          * If the guest has used debug registers, at least dr7
5774          * will be disabled while returning to the host.
5775          * If we don't have active breakpoints in the host, we don't
5776          * care about the messed up debug address registers. But if
5777          * we have some of them active, restore the old state.
5778          */
5779         if (hw_breakpoint_active())
5780                 hw_breakpoint_restore();
5781
5782         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
5783                                                            native_read_tsc());
5784
5785         vcpu->mode = OUTSIDE_GUEST_MODE;
5786         smp_wmb();
5787         local_irq_enable();
5788
5789         ++vcpu->stat.exits;
5790
5791         /*
5792          * We must have an instruction between local_irq_enable() and
5793          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5794          * the interrupt shadow.  The stat.exits increment will do nicely.
5795          * But we need to prevent reordering, hence this barrier():
5796          */
5797         barrier();
5798
5799         kvm_guest_exit();
5800
5801         preempt_enable();
5802
5803         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5804
5805         /*
5806          * Profile KVM exit RIPs:
5807          */
5808         if (unlikely(prof_on == KVM_PROFILING)) {
5809                 unsigned long rip = kvm_rip_read(vcpu);
5810                 profile_hit(KVM_PROFILING, (void *)rip);
5811         }
5812
5813         if (unlikely(vcpu->arch.tsc_always_catchup))
5814                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5815
5816         if (vcpu->arch.apic_attention)
5817                 kvm_lapic_sync_from_vapic(vcpu);
5818
5819         r = kvm_x86_ops->handle_exit(vcpu);
5820         return r;
5821
5822 cancel_injection:
5823         kvm_x86_ops->cancel_injection(vcpu);
5824         if (unlikely(vcpu->arch.apic_attention))
5825                 kvm_lapic_sync_from_vapic(vcpu);
5826 out:
5827         return r;
5828 }
5829
5830
5831 static int __vcpu_run(struct kvm_vcpu *vcpu)
5832 {
5833         int r;
5834         struct kvm *kvm = vcpu->kvm;
5835
5836         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5837                 pr_debug("vcpu %d received sipi with vector # %x\n",
5838                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5839                 kvm_lapic_reset(vcpu);
5840                 r = kvm_vcpu_reset(vcpu);
5841                 if (r)
5842                         return r;
5843                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5844         }
5845
5846         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5847         r = vapic_enter(vcpu);
5848         if (r) {
5849                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5850                 return r;
5851         }
5852
5853         r = 1;
5854         while (r > 0) {
5855                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5856                     !vcpu->arch.apf.halted)
5857                         r = vcpu_enter_guest(vcpu);
5858                 else {
5859                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5860                         kvm_vcpu_block(vcpu);
5861                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5862                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5863                         {
5864                                 switch(vcpu->arch.mp_state) {
5865                                 case KVM_MP_STATE_HALTED:
5866                                         vcpu->arch.mp_state =
5867                                                 KVM_MP_STATE_RUNNABLE;
5868                                 case KVM_MP_STATE_RUNNABLE:
5869                                         vcpu->arch.apf.halted = false;
5870                                         break;
5871                                 case KVM_MP_STATE_SIPI_RECEIVED:
5872                                 default:
5873                                         r = -EINTR;
5874                                         break;
5875                                 }
5876                         }
5877                 }
5878
5879                 if (r <= 0)
5880                         break;
5881
5882                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5883                 if (kvm_cpu_has_pending_timer(vcpu))
5884                         kvm_inject_pending_timer_irqs(vcpu);
5885
5886                 if (dm_request_for_irq_injection(vcpu)) {
5887                         r = -EINTR;
5888                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5889                         ++vcpu->stat.request_irq_exits;
5890                 }
5891
5892                 kvm_check_async_pf_completion(vcpu);
5893
5894                 if (signal_pending(current)) {
5895                         r = -EINTR;
5896                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5897                         ++vcpu->stat.signal_exits;
5898                 }
5899                 if (need_resched()) {
5900                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5901                         kvm_resched(vcpu);
5902                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5903                 }
5904         }
5905
5906         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5907
5908         vapic_exit(vcpu);
5909
5910         return r;
5911 }
5912
5913 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
5914 {
5915         int r;
5916         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5917         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5918         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5919         if (r != EMULATE_DONE)
5920                 return 0;
5921         return 1;
5922 }
5923
5924 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
5925 {
5926         BUG_ON(!vcpu->arch.pio.count);
5927
5928         return complete_emulated_io(vcpu);
5929 }
5930
5931 /*
5932  * Implements the following, as a state machine:
5933  *
5934  * read:
5935  *   for each fragment
5936  *     for each mmio piece in the fragment
5937  *       write gpa, len
5938  *       exit
5939  *       copy data
5940  *   execute insn
5941  *
5942  * write:
5943  *   for each fragment
5944  *     for each mmio piece in the fragment
5945  *       write gpa, len
5946  *       copy data
5947  *       exit
5948  */
5949 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
5950 {
5951         struct kvm_run *run = vcpu->run;
5952         struct kvm_mmio_fragment *frag;
5953         unsigned len;
5954
5955         BUG_ON(!vcpu->mmio_needed);
5956
5957         /* Complete previous fragment */
5958         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
5959         len = min(8u, frag->len);
5960         if (!vcpu->mmio_is_write)
5961                 memcpy(frag->data, run->mmio.data, len);
5962
5963         if (frag->len <= 8) {
5964                 /* Switch to the next fragment. */
5965                 frag++;
5966                 vcpu->mmio_cur_fragment++;
5967         } else {
5968                 /* Go forward to the next mmio piece. */
5969                 frag->data += len;
5970                 frag->gpa += len;
5971                 frag->len -= len;
5972         }
5973
5974         if (vcpu->mmio_cur_fragment == vcpu->mmio_nr_fragments) {
5975                 vcpu->mmio_needed = 0;
5976                 if (vcpu->mmio_is_write)
5977                         return 1;
5978                 vcpu->mmio_read_completed = 1;
5979                 return complete_emulated_io(vcpu);
5980         }
5981
5982         run->exit_reason = KVM_EXIT_MMIO;
5983         run->mmio.phys_addr = frag->gpa;
5984         if (vcpu->mmio_is_write)
5985                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
5986         run->mmio.len = min(8u, frag->len);
5987         run->mmio.is_write = vcpu->mmio_is_write;
5988         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5989         return 0;
5990 }
5991
5992
5993 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5994 {
5995         int r;
5996         sigset_t sigsaved;
5997
5998         if (!tsk_used_math(current) && init_fpu(current))
5999                 return -ENOMEM;
6000
6001         if (vcpu->sigset_active)
6002                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6003
6004         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6005                 kvm_vcpu_block(vcpu);
6006                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6007                 r = -EAGAIN;
6008                 goto out;
6009         }
6010
6011         /* re-sync apic's tpr */
6012         if (!irqchip_in_kernel(vcpu->kvm)) {
6013                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6014                         r = -EINVAL;
6015                         goto out;
6016                 }
6017         }
6018
6019         if (unlikely(vcpu->arch.complete_userspace_io)) {
6020                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6021                 vcpu->arch.complete_userspace_io = NULL;
6022                 r = cui(vcpu);
6023                 if (r <= 0)
6024                         goto out;
6025         } else
6026                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6027
6028         r = __vcpu_run(vcpu);
6029
6030 out:
6031         post_kvm_run_save(vcpu);
6032         if (vcpu->sigset_active)
6033                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6034
6035         return r;
6036 }
6037
6038 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6039 {
6040         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6041                 /*
6042                  * We are here if userspace calls get_regs() in the middle of
6043                  * instruction emulation. Registers state needs to be copied
6044                  * back from emulation context to vcpu. Userspace shouldn't do
6045                  * that usually, but some bad designed PV devices (vmware
6046                  * backdoor interface) need this to work
6047                  */
6048                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6049                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6050         }
6051         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6052         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6053         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6054         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6055         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6056         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6057         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6058         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6059 #ifdef CONFIG_X86_64
6060         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6061         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6062         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6063         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6064         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6065         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6066         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6067         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6068 #endif
6069
6070         regs->rip = kvm_rip_read(vcpu);
6071         regs->rflags = kvm_get_rflags(vcpu);
6072
6073         return 0;
6074 }
6075
6076 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6077 {
6078         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6079         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6080
6081         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6082         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6083         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6084         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6085         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6086         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6087         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6088         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6089 #ifdef CONFIG_X86_64
6090         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6091         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6092         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6093         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6094         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6095         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6096         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6097         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6098 #endif
6099
6100         kvm_rip_write(vcpu, regs->rip);
6101         kvm_set_rflags(vcpu, regs->rflags);
6102
6103         vcpu->arch.exception.pending = false;
6104
6105         kvm_make_request(KVM_REQ_EVENT, vcpu);
6106
6107         return 0;
6108 }
6109
6110 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6111 {
6112         struct kvm_segment cs;
6113
6114         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6115         *db = cs.db;
6116         *l = cs.l;
6117 }
6118 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6119
6120 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6121                                   struct kvm_sregs *sregs)
6122 {
6123         struct desc_ptr dt;
6124
6125         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6126         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6127         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6128         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6129         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6130         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6131
6132         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6133         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6134
6135         kvm_x86_ops->get_idt(vcpu, &dt);
6136         sregs->idt.limit = dt.size;
6137         sregs->idt.base = dt.address;
6138         kvm_x86_ops->get_gdt(vcpu, &dt);
6139         sregs->gdt.limit = dt.size;
6140         sregs->gdt.base = dt.address;
6141
6142         sregs->cr0 = kvm_read_cr0(vcpu);
6143         sregs->cr2 = vcpu->arch.cr2;
6144         sregs->cr3 = kvm_read_cr3(vcpu);
6145         sregs->cr4 = kvm_read_cr4(vcpu);
6146         sregs->cr8 = kvm_get_cr8(vcpu);
6147         sregs->efer = vcpu->arch.efer;
6148         sregs->apic_base = kvm_get_apic_base(vcpu);
6149
6150         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6151
6152         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6153                 set_bit(vcpu->arch.interrupt.nr,
6154                         (unsigned long *)sregs->interrupt_bitmap);
6155
6156         return 0;
6157 }
6158
6159 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6160                                     struct kvm_mp_state *mp_state)
6161 {
6162         mp_state->mp_state = vcpu->arch.mp_state;
6163         return 0;
6164 }
6165
6166 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6167                                     struct kvm_mp_state *mp_state)
6168 {
6169         vcpu->arch.mp_state = mp_state->mp_state;
6170         kvm_make_request(KVM_REQ_EVENT, vcpu);
6171         return 0;
6172 }
6173
6174 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6175                     int reason, bool has_error_code, u32 error_code)
6176 {
6177         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6178         int ret;
6179
6180         init_emulate_ctxt(vcpu);
6181
6182         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6183                                    has_error_code, error_code);
6184
6185         if (ret)
6186                 return EMULATE_FAIL;
6187
6188         kvm_rip_write(vcpu, ctxt->eip);
6189         kvm_set_rflags(vcpu, ctxt->eflags);
6190         kvm_make_request(KVM_REQ_EVENT, vcpu);
6191         return EMULATE_DONE;
6192 }
6193 EXPORT_SYMBOL_GPL(kvm_task_switch);
6194
6195 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6196                                   struct kvm_sregs *sregs)
6197 {
6198         int mmu_reset_needed = 0;
6199         int pending_vec, max_bits, idx;
6200         struct desc_ptr dt;
6201
6202         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6203                 return -EINVAL;
6204
6205         dt.size = sregs->idt.limit;
6206         dt.address = sregs->idt.base;
6207         kvm_x86_ops->set_idt(vcpu, &dt);
6208         dt.size = sregs->gdt.limit;
6209         dt.address = sregs->gdt.base;
6210         kvm_x86_ops->set_gdt(vcpu, &dt);
6211
6212         vcpu->arch.cr2 = sregs->cr2;
6213         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6214         vcpu->arch.cr3 = sregs->cr3;
6215         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6216
6217         kvm_set_cr8(vcpu, sregs->cr8);
6218
6219         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6220         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6221         kvm_set_apic_base(vcpu, sregs->apic_base);
6222
6223         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6224         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6225         vcpu->arch.cr0 = sregs->cr0;
6226
6227         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6228         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6229         if (sregs->cr4 & X86_CR4_OSXSAVE)
6230                 kvm_update_cpuid(vcpu);
6231
6232         idx = srcu_read_lock(&vcpu->kvm->srcu);
6233         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6234                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6235                 mmu_reset_needed = 1;
6236         }
6237         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6238
6239         if (mmu_reset_needed)
6240                 kvm_mmu_reset_context(vcpu);
6241
6242         max_bits = KVM_NR_INTERRUPTS;
6243         pending_vec = find_first_bit(
6244                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6245         if (pending_vec < max_bits) {
6246                 kvm_queue_interrupt(vcpu, pending_vec, false);
6247                 pr_debug("Set back pending irq %d\n", pending_vec);
6248         }
6249
6250         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6251         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6252         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6253         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6254         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6255         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6256
6257         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6258         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6259
6260         update_cr8_intercept(vcpu);
6261
6262         /* Older userspace won't unhalt the vcpu on reset. */
6263         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6264             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6265             !is_protmode(vcpu))
6266                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6267
6268         kvm_make_request(KVM_REQ_EVENT, vcpu);
6269
6270         return 0;
6271 }
6272
6273 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6274                                         struct kvm_guest_debug *dbg)
6275 {
6276         unsigned long rflags;
6277         int i, r;
6278
6279         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6280                 r = -EBUSY;
6281                 if (vcpu->arch.exception.pending)
6282                         goto out;
6283                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6284                         kvm_queue_exception(vcpu, DB_VECTOR);
6285                 else
6286                         kvm_queue_exception(vcpu, BP_VECTOR);
6287         }
6288
6289         /*
6290          * Read rflags as long as potentially injected trace flags are still
6291          * filtered out.
6292          */
6293         rflags = kvm_get_rflags(vcpu);
6294
6295         vcpu->guest_debug = dbg->control;
6296         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6297                 vcpu->guest_debug = 0;
6298
6299         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6300                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6301                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6302                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6303         } else {
6304                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6305                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6306         }
6307         kvm_update_dr7(vcpu);
6308
6309         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6310                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6311                         get_segment_base(vcpu, VCPU_SREG_CS);
6312
6313         /*
6314          * Trigger an rflags update that will inject or remove the trace
6315          * flags.
6316          */
6317         kvm_set_rflags(vcpu, rflags);
6318
6319         kvm_x86_ops->update_db_bp_intercept(vcpu);
6320
6321         r = 0;
6322
6323 out:
6324
6325         return r;
6326 }
6327
6328 /*
6329  * Translate a guest virtual address to a guest physical address.
6330  */
6331 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6332                                     struct kvm_translation *tr)
6333 {
6334         unsigned long vaddr = tr->linear_address;
6335         gpa_t gpa;
6336         int idx;
6337
6338         idx = srcu_read_lock(&vcpu->kvm->srcu);
6339         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6340         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6341         tr->physical_address = gpa;
6342         tr->valid = gpa != UNMAPPED_GVA;
6343         tr->writeable = 1;
6344         tr->usermode = 0;
6345
6346         return 0;
6347 }
6348
6349 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6350 {
6351         struct i387_fxsave_struct *fxsave =
6352                         &vcpu->arch.guest_fpu.state->fxsave;
6353
6354         memcpy(fpu->fpr, fxsave->st_space, 128);
6355         fpu->fcw = fxsave->cwd;
6356         fpu->fsw = fxsave->swd;
6357         fpu->ftwx = fxsave->twd;
6358         fpu->last_opcode = fxsave->fop;
6359         fpu->last_ip = fxsave->rip;
6360         fpu->last_dp = fxsave->rdp;
6361         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6362
6363         return 0;
6364 }
6365
6366 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6367 {
6368         struct i387_fxsave_struct *fxsave =
6369                         &vcpu->arch.guest_fpu.state->fxsave;
6370
6371         memcpy(fxsave->st_space, fpu->fpr, 128);
6372         fxsave->cwd = fpu->fcw;
6373         fxsave->swd = fpu->fsw;
6374         fxsave->twd = fpu->ftwx;
6375         fxsave->fop = fpu->last_opcode;
6376         fxsave->rip = fpu->last_ip;
6377         fxsave->rdp = fpu->last_dp;
6378         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6379
6380         return 0;
6381 }
6382
6383 int fx_init(struct kvm_vcpu *vcpu)
6384 {
6385         int err;
6386
6387         err = fpu_alloc(&vcpu->arch.guest_fpu);
6388         if (err)
6389                 return err;
6390
6391         fpu_finit(&vcpu->arch.guest_fpu);
6392
6393         /*
6394          * Ensure guest xcr0 is valid for loading
6395          */
6396         vcpu->arch.xcr0 = XSTATE_FP;
6397
6398         vcpu->arch.cr0 |= X86_CR0_ET;
6399
6400         return 0;
6401 }
6402 EXPORT_SYMBOL_GPL(fx_init);
6403
6404 static void fx_free(struct kvm_vcpu *vcpu)
6405 {
6406         fpu_free(&vcpu->arch.guest_fpu);
6407 }
6408
6409 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6410 {
6411         if (vcpu->guest_fpu_loaded)
6412                 return;
6413
6414         /*
6415          * Restore all possible states in the guest,
6416          * and assume host would use all available bits.
6417          * Guest xcr0 would be loaded later.
6418          */
6419         kvm_put_guest_xcr0(vcpu);
6420         vcpu->guest_fpu_loaded = 1;
6421         __kernel_fpu_begin();
6422         fpu_restore_checking(&vcpu->arch.guest_fpu);
6423         trace_kvm_fpu(1);
6424 }
6425
6426 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6427 {
6428         kvm_put_guest_xcr0(vcpu);
6429
6430         if (!vcpu->guest_fpu_loaded)
6431                 return;
6432
6433         vcpu->guest_fpu_loaded = 0;
6434         fpu_save_init(&vcpu->arch.guest_fpu);
6435         __kernel_fpu_end();
6436         ++vcpu->stat.fpu_reload;
6437         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6438         trace_kvm_fpu(0);
6439 }
6440
6441 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6442 {
6443         kvmclock_reset(vcpu);
6444
6445         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6446         fx_free(vcpu);
6447         kvm_x86_ops->vcpu_free(vcpu);
6448 }
6449
6450 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6451                                                 unsigned int id)
6452 {
6453         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6454                 printk_once(KERN_WARNING
6455                 "kvm: SMP vm created on host with unstable TSC; "
6456                 "guest TSC will not be reliable\n");
6457         return kvm_x86_ops->vcpu_create(kvm, id);
6458 }
6459
6460 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6461 {
6462         int r;
6463
6464         vcpu->arch.mtrr_state.have_fixed = 1;
6465         r = vcpu_load(vcpu);
6466         if (r)
6467                 return r;
6468         r = kvm_vcpu_reset(vcpu);
6469         if (r == 0)
6470                 r = kvm_mmu_setup(vcpu);
6471         vcpu_put(vcpu);
6472
6473         return r;
6474 }
6475
6476 int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
6477 {
6478         int r;
6479         struct msr_data msr;
6480
6481         r = vcpu_load(vcpu);
6482         if (r)
6483                 return r;
6484         msr.data = 0x0;
6485         msr.index = MSR_IA32_TSC;
6486         msr.host_initiated = true;
6487         kvm_write_tsc(vcpu, &msr);
6488         vcpu_put(vcpu);
6489
6490         return r;
6491 }
6492
6493 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6494 {
6495         int r;
6496         vcpu->arch.apf.msr_val = 0;
6497
6498         r = vcpu_load(vcpu);
6499         BUG_ON(r);
6500         kvm_mmu_unload(vcpu);
6501         vcpu_put(vcpu);
6502
6503         fx_free(vcpu);
6504         kvm_x86_ops->vcpu_free(vcpu);
6505 }
6506
6507 static int kvm_vcpu_reset(struct kvm_vcpu *vcpu)
6508 {
6509         atomic_set(&vcpu->arch.nmi_queued, 0);
6510         vcpu->arch.nmi_pending = 0;
6511         vcpu->arch.nmi_injected = false;
6512
6513         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6514         vcpu->arch.dr6 = DR6_FIXED_1;
6515         vcpu->arch.dr7 = DR7_FIXED_1;
6516         kvm_update_dr7(vcpu);
6517
6518         kvm_make_request(KVM_REQ_EVENT, vcpu);
6519         vcpu->arch.apf.msr_val = 0;
6520         vcpu->arch.st.msr_val = 0;
6521
6522         kvmclock_reset(vcpu);
6523
6524         kvm_clear_async_pf_completion_queue(vcpu);
6525         kvm_async_pf_hash_reset(vcpu);
6526         vcpu->arch.apf.halted = false;
6527
6528         kvm_pmu_reset(vcpu);
6529
6530         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
6531         vcpu->arch.regs_avail = ~0;
6532         vcpu->arch.regs_dirty = ~0;
6533
6534         return kvm_x86_ops->vcpu_reset(vcpu);
6535 }
6536
6537 int kvm_arch_hardware_enable(void *garbage)
6538 {
6539         struct kvm *kvm;
6540         struct kvm_vcpu *vcpu;
6541         int i;
6542         int ret;
6543         u64 local_tsc;
6544         u64 max_tsc = 0;
6545         bool stable, backwards_tsc = false;
6546
6547         kvm_shared_msr_cpu_online();
6548         ret = kvm_x86_ops->hardware_enable(garbage);
6549         if (ret != 0)
6550                 return ret;
6551
6552         local_tsc = native_read_tsc();
6553         stable = !check_tsc_unstable();
6554         list_for_each_entry(kvm, &vm_list, vm_list) {
6555                 kvm_for_each_vcpu(i, vcpu, kvm) {
6556                         if (!stable && vcpu->cpu == smp_processor_id())
6557                                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6558                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6559                                 backwards_tsc = true;
6560                                 if (vcpu->arch.last_host_tsc > max_tsc)
6561                                         max_tsc = vcpu->arch.last_host_tsc;
6562                         }
6563                 }
6564         }
6565
6566         /*
6567          * Sometimes, even reliable TSCs go backwards.  This happens on
6568          * platforms that reset TSC during suspend or hibernate actions, but
6569          * maintain synchronization.  We must compensate.  Fortunately, we can
6570          * detect that condition here, which happens early in CPU bringup,
6571          * before any KVM threads can be running.  Unfortunately, we can't
6572          * bring the TSCs fully up to date with real time, as we aren't yet far
6573          * enough into CPU bringup that we know how much real time has actually
6574          * elapsed; our helper function, get_kernel_ns() will be using boot
6575          * variables that haven't been updated yet.
6576          *
6577          * So we simply find the maximum observed TSC above, then record the
6578          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
6579          * the adjustment will be applied.  Note that we accumulate
6580          * adjustments, in case multiple suspend cycles happen before some VCPU
6581          * gets a chance to run again.  In the event that no KVM threads get a
6582          * chance to run, we will miss the entire elapsed period, as we'll have
6583          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6584          * loose cycle time.  This isn't too big a deal, since the loss will be
6585          * uniform across all VCPUs (not to mention the scenario is extremely
6586          * unlikely). It is possible that a second hibernate recovery happens
6587          * much faster than a first, causing the observed TSC here to be
6588          * smaller; this would require additional padding adjustment, which is
6589          * why we set last_host_tsc to the local tsc observed here.
6590          *
6591          * N.B. - this code below runs only on platforms with reliable TSC,
6592          * as that is the only way backwards_tsc is set above.  Also note
6593          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6594          * have the same delta_cyc adjustment applied if backwards_tsc
6595          * is detected.  Note further, this adjustment is only done once,
6596          * as we reset last_host_tsc on all VCPUs to stop this from being
6597          * called multiple times (one for each physical CPU bringup).
6598          *
6599          * Platforms with unreliable TSCs don't have to deal with this, they
6600          * will be compensated by the logic in vcpu_load, which sets the TSC to
6601          * catchup mode.  This will catchup all VCPUs to real time, but cannot
6602          * guarantee that they stay in perfect synchronization.
6603          */
6604         if (backwards_tsc) {
6605                 u64 delta_cyc = max_tsc - local_tsc;
6606                 list_for_each_entry(kvm, &vm_list, vm_list) {
6607                         kvm_for_each_vcpu(i, vcpu, kvm) {
6608                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
6609                                 vcpu->arch.last_host_tsc = local_tsc;
6610                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
6611                                         &vcpu->requests);
6612                         }
6613
6614                         /*
6615                          * We have to disable TSC offset matching.. if you were
6616                          * booting a VM while issuing an S4 host suspend....
6617                          * you may have some problem.  Solving this issue is
6618                          * left as an exercise to the reader.
6619                          */
6620                         kvm->arch.last_tsc_nsec = 0;
6621                         kvm->arch.last_tsc_write = 0;
6622                 }
6623
6624         }
6625         return 0;
6626 }
6627
6628 void kvm_arch_hardware_disable(void *garbage)
6629 {
6630         kvm_x86_ops->hardware_disable(garbage);
6631         drop_user_return_notifiers(garbage);
6632 }
6633
6634 int kvm_arch_hardware_setup(void)
6635 {
6636         return kvm_x86_ops->hardware_setup();
6637 }
6638
6639 void kvm_arch_hardware_unsetup(void)
6640 {
6641         kvm_x86_ops->hardware_unsetup();
6642 }
6643
6644 void kvm_arch_check_processor_compat(void *rtn)
6645 {
6646         kvm_x86_ops->check_processor_compatibility(rtn);
6647 }
6648
6649 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6650 {
6651         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6652 }
6653
6654 struct static_key kvm_no_apic_vcpu __read_mostly;
6655
6656 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6657 {
6658         struct page *page;
6659         struct kvm *kvm;
6660         int r;
6661
6662         BUG_ON(vcpu->kvm == NULL);
6663         kvm = vcpu->kvm;
6664
6665         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6666         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6667                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6668         else
6669                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6670
6671         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6672         if (!page) {
6673                 r = -ENOMEM;
6674                 goto fail;
6675         }
6676         vcpu->arch.pio_data = page_address(page);
6677
6678         kvm_set_tsc_khz(vcpu, max_tsc_khz);
6679
6680         r = kvm_mmu_create(vcpu);
6681         if (r < 0)
6682                 goto fail_free_pio_data;
6683
6684         if (irqchip_in_kernel(kvm)) {
6685                 r = kvm_create_lapic(vcpu);
6686                 if (r < 0)
6687                         goto fail_mmu_destroy;
6688         } else
6689                 static_key_slow_inc(&kvm_no_apic_vcpu);
6690
6691         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6692                                        GFP_KERNEL);
6693         if (!vcpu->arch.mce_banks) {
6694                 r = -ENOMEM;
6695                 goto fail_free_lapic;
6696         }
6697         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6698
6699         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6700                 goto fail_free_mce_banks;
6701
6702         r = fx_init(vcpu);
6703         if (r)
6704                 goto fail_free_wbinvd_dirty_mask;
6705
6706         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
6707         kvm_async_pf_hash_reset(vcpu);
6708         kvm_pmu_init(vcpu);
6709
6710         return 0;
6711 fail_free_wbinvd_dirty_mask:
6712         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6713 fail_free_mce_banks:
6714         kfree(vcpu->arch.mce_banks);
6715 fail_free_lapic:
6716         kvm_free_lapic(vcpu);
6717 fail_mmu_destroy:
6718         kvm_mmu_destroy(vcpu);
6719 fail_free_pio_data:
6720         free_page((unsigned long)vcpu->arch.pio_data);
6721 fail:
6722         return r;
6723 }
6724
6725 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6726 {
6727         int idx;
6728
6729         kvm_pmu_destroy(vcpu);
6730         kfree(vcpu->arch.mce_banks);
6731         kvm_free_lapic(vcpu);
6732         idx = srcu_read_lock(&vcpu->kvm->srcu);
6733         kvm_mmu_destroy(vcpu);
6734         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6735         free_page((unsigned long)vcpu->arch.pio_data);
6736         if (!irqchip_in_kernel(vcpu->kvm))
6737                 static_key_slow_dec(&kvm_no_apic_vcpu);
6738 }
6739
6740 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
6741 {
6742         if (type)
6743                 return -EINVAL;
6744
6745         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6746         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6747
6748         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6749         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6750         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
6751         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
6752                 &kvm->arch.irq_sources_bitmap);
6753
6754         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6755         mutex_init(&kvm->arch.apic_map_lock);
6756         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
6757
6758         pvclock_update_vm_gtod_copy(kvm);
6759
6760         return 0;
6761 }
6762
6763 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6764 {
6765         int r;
6766         r = vcpu_load(vcpu);
6767         BUG_ON(r);
6768         kvm_mmu_unload(vcpu);
6769         vcpu_put(vcpu);
6770 }
6771
6772 static void kvm_free_vcpus(struct kvm *kvm)
6773 {
6774         unsigned int i;
6775         struct kvm_vcpu *vcpu;
6776
6777         /*
6778          * Unpin any mmu pages first.
6779          */
6780         kvm_for_each_vcpu(i, vcpu, kvm) {
6781                 kvm_clear_async_pf_completion_queue(vcpu);
6782                 kvm_unload_vcpu_mmu(vcpu);
6783         }
6784         kvm_for_each_vcpu(i, vcpu, kvm)
6785                 kvm_arch_vcpu_free(vcpu);
6786
6787         mutex_lock(&kvm->lock);
6788         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6789                 kvm->vcpus[i] = NULL;
6790
6791         atomic_set(&kvm->online_vcpus, 0);
6792         mutex_unlock(&kvm->lock);
6793 }
6794
6795 void kvm_arch_sync_events(struct kvm *kvm)
6796 {
6797         kvm_free_all_assigned_devices(kvm);
6798         kvm_free_pit(kvm);
6799 }
6800
6801 void kvm_arch_destroy_vm(struct kvm *kvm)
6802 {
6803         kvm_iommu_unmap_guest(kvm);
6804         kfree(kvm->arch.vpic);
6805         kfree(kvm->arch.vioapic);
6806         kvm_free_vcpus(kvm);
6807         if (kvm->arch.apic_access_page)
6808                 put_page(kvm->arch.apic_access_page);
6809         if (kvm->arch.ept_identity_pagetable)
6810                 put_page(kvm->arch.ept_identity_pagetable);
6811         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
6812 }
6813
6814 void kvm_arch_free_memslot(struct kvm_memory_slot *free,
6815                            struct kvm_memory_slot *dont)
6816 {
6817         int i;
6818
6819         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6820                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
6821                         kvm_kvfree(free->arch.rmap[i]);
6822                         free->arch.rmap[i] = NULL;
6823                 }
6824                 if (i == 0)
6825                         continue;
6826
6827                 if (!dont || free->arch.lpage_info[i - 1] !=
6828                              dont->arch.lpage_info[i - 1]) {
6829                         kvm_kvfree(free->arch.lpage_info[i - 1]);
6830                         free->arch.lpage_info[i - 1] = NULL;
6831                 }
6832         }
6833 }
6834
6835 int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
6836 {
6837         int i;
6838
6839         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6840                 unsigned long ugfn;
6841                 int lpages;
6842                 int level = i + 1;
6843
6844                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
6845                                       slot->base_gfn, level) + 1;
6846
6847                 slot->arch.rmap[i] =
6848                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
6849                 if (!slot->arch.rmap[i])
6850                         goto out_free;
6851                 if (i == 0)
6852                         continue;
6853
6854                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
6855                                         sizeof(*slot->arch.lpage_info[i - 1]));
6856                 if (!slot->arch.lpage_info[i - 1])
6857                         goto out_free;
6858
6859                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
6860                         slot->arch.lpage_info[i - 1][0].write_count = 1;
6861                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
6862                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
6863                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
6864                 /*
6865                  * If the gfn and userspace address are not aligned wrt each
6866                  * other, or if explicitly asked to, disable large page
6867                  * support for this slot
6868                  */
6869                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
6870                     !kvm_largepages_enabled()) {
6871                         unsigned long j;
6872
6873                         for (j = 0; j < lpages; ++j)
6874                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
6875                 }
6876         }
6877
6878         return 0;
6879
6880 out_free:
6881         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6882                 kvm_kvfree(slot->arch.rmap[i]);
6883                 slot->arch.rmap[i] = NULL;
6884                 if (i == 0)
6885                         continue;
6886
6887                 kvm_kvfree(slot->arch.lpage_info[i - 1]);
6888                 slot->arch.lpage_info[i - 1] = NULL;
6889         }
6890         return -ENOMEM;
6891 }
6892
6893 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6894                                 struct kvm_memory_slot *memslot,
6895                                 struct kvm_memory_slot old,
6896                                 struct kvm_userspace_memory_region *mem,
6897                                 bool user_alloc)
6898 {
6899         int npages = memslot->npages;
6900
6901         /*
6902          * Only private memory slots need to be mapped here since
6903          * KVM_SET_MEMORY_REGION ioctl is no longer supported.
6904          */
6905         if ((memslot->id >= KVM_USER_MEM_SLOTS) && npages && !old.npages) {
6906                 unsigned long userspace_addr;
6907
6908                 /*
6909                  * MAP_SHARED to prevent internal slot pages from being moved
6910                  * by fork()/COW.
6911                  */
6912                 userspace_addr = vm_mmap(NULL, 0, npages * PAGE_SIZE,
6913                                          PROT_READ | PROT_WRITE,
6914                                          MAP_SHARED | MAP_ANONYMOUS, 0);
6915
6916                 if (IS_ERR((void *)userspace_addr))
6917                         return PTR_ERR((void *)userspace_addr);
6918
6919                 memslot->userspace_addr = userspace_addr;
6920         }
6921
6922         return 0;
6923 }
6924
6925 void kvm_arch_commit_memory_region(struct kvm *kvm,
6926                                 struct kvm_userspace_memory_region *mem,
6927                                 struct kvm_memory_slot old,
6928                                 bool user_alloc)
6929 {
6930
6931         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6932
6933         if ((mem->slot >= KVM_USER_MEM_SLOTS) && old.npages && !npages) {
6934                 int ret;
6935
6936                 ret = vm_munmap(old.userspace_addr,
6937                                 old.npages * PAGE_SIZE);
6938                 if (ret < 0)
6939                         printk(KERN_WARNING
6940                                "kvm_vm_ioctl_set_memory_region: "
6941                                "failed to munmap memory\n");
6942         }
6943
6944         if (!kvm->arch.n_requested_mmu_pages)
6945                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6946
6947         if (nr_mmu_pages)
6948                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6949         /*
6950          * Write protect all pages for dirty logging.
6951          * Existing largepage mappings are destroyed here and new ones will
6952          * not be created until the end of the logging.
6953          */
6954         if (npages && (mem->flags & KVM_MEM_LOG_DIRTY_PAGES))
6955                 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6956         /*
6957          * If memory slot is created, or moved, we need to clear all
6958          * mmio sptes.
6959          */
6960         if (npages && old.base_gfn != mem->guest_phys_addr >> PAGE_SHIFT) {
6961                 kvm_mmu_zap_all(kvm);
6962                 kvm_reload_remote_mmus(kvm);
6963         }
6964 }
6965
6966 void kvm_arch_flush_shadow_all(struct kvm *kvm)
6967 {
6968         kvm_mmu_zap_all(kvm);
6969         kvm_reload_remote_mmus(kvm);
6970 }
6971
6972 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
6973                                    struct kvm_memory_slot *slot)
6974 {
6975         kvm_arch_flush_shadow_all(kvm);
6976 }
6977
6978 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6979 {
6980         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6981                 !vcpu->arch.apf.halted)
6982                 || !list_empty_careful(&vcpu->async_pf.done)
6983                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6984                 || atomic_read(&vcpu->arch.nmi_queued) ||
6985                 (kvm_arch_interrupt_allowed(vcpu) &&
6986                  kvm_cpu_has_interrupt(vcpu));
6987 }
6988
6989 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
6990 {
6991         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
6992 }
6993
6994 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6995 {
6996         return kvm_x86_ops->interrupt_allowed(vcpu);
6997 }
6998
6999 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7000 {
7001         unsigned long current_rip = kvm_rip_read(vcpu) +
7002                 get_segment_base(vcpu, VCPU_SREG_CS);
7003
7004         return current_rip == linear_rip;
7005 }
7006 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7007
7008 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7009 {
7010         unsigned long rflags;
7011
7012         rflags = kvm_x86_ops->get_rflags(vcpu);
7013         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7014                 rflags &= ~X86_EFLAGS_TF;
7015         return rflags;
7016 }
7017 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7018
7019 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7020 {
7021         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7022             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7023                 rflags |= X86_EFLAGS_TF;
7024         kvm_x86_ops->set_rflags(vcpu, rflags);
7025         kvm_make_request(KVM_REQ_EVENT, vcpu);
7026 }
7027 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7028
7029 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7030 {
7031         int r;
7032
7033         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7034               is_error_page(work->page))
7035                 return;
7036
7037         r = kvm_mmu_reload(vcpu);
7038         if (unlikely(r))
7039                 return;
7040
7041         if (!vcpu->arch.mmu.direct_map &&
7042               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7043                 return;
7044
7045         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7046 }
7047
7048 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7049 {
7050         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7051 }
7052
7053 static inline u32 kvm_async_pf_next_probe(u32 key)
7054 {
7055         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7056 }
7057
7058 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7059 {
7060         u32 key = kvm_async_pf_hash_fn(gfn);
7061
7062         while (vcpu->arch.apf.gfns[key] != ~0)
7063                 key = kvm_async_pf_next_probe(key);
7064
7065         vcpu->arch.apf.gfns[key] = gfn;
7066 }
7067
7068 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7069 {
7070         int i;
7071         u32 key = kvm_async_pf_hash_fn(gfn);
7072
7073         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7074                      (vcpu->arch.apf.gfns[key] != gfn &&
7075                       vcpu->arch.apf.gfns[key] != ~0); i++)
7076                 key = kvm_async_pf_next_probe(key);
7077
7078         return key;
7079 }
7080
7081 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7082 {
7083         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7084 }
7085
7086 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7087 {
7088         u32 i, j, k;
7089
7090         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7091         while (true) {
7092                 vcpu->arch.apf.gfns[i] = ~0;
7093                 do {
7094                         j = kvm_async_pf_next_probe(j);
7095                         if (vcpu->arch.apf.gfns[j] == ~0)
7096                                 return;
7097                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7098                         /*
7099                          * k lies cyclically in ]i,j]
7100                          * |    i.k.j |
7101                          * |....j i.k.| or  |.k..j i...|
7102                          */
7103                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7104                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7105                 i = j;
7106         }
7107 }
7108
7109 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7110 {
7111
7112         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7113                                       sizeof(val));
7114 }
7115
7116 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7117                                      struct kvm_async_pf *work)
7118 {
7119         struct x86_exception fault;
7120
7121         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7122         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7123
7124         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7125             (vcpu->arch.apf.send_user_only &&
7126              kvm_x86_ops->get_cpl(vcpu) == 0))
7127                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7128         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7129                 fault.vector = PF_VECTOR;
7130                 fault.error_code_valid = true;
7131                 fault.error_code = 0;
7132                 fault.nested_page_fault = false;
7133                 fault.address = work->arch.token;
7134                 kvm_inject_page_fault(vcpu, &fault);
7135         }
7136 }
7137
7138 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7139                                  struct kvm_async_pf *work)
7140 {
7141         struct x86_exception fault;
7142
7143         trace_kvm_async_pf_ready(work->arch.token, work->gva);
7144         if (is_error_page(work->page))
7145                 work->arch.token = ~0; /* broadcast wakeup */
7146         else
7147                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7148
7149         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7150             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7151                 fault.vector = PF_VECTOR;
7152                 fault.error_code_valid = true;
7153                 fault.error_code = 0;
7154                 fault.nested_page_fault = false;
7155                 fault.address = work->arch.token;
7156                 kvm_inject_page_fault(vcpu, &fault);
7157         }
7158         vcpu->arch.apf.halted = false;
7159         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7160 }
7161
7162 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7163 {
7164         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7165                 return true;
7166         else
7167                 return !kvm_event_needs_reinjection(vcpu) &&
7168                         kvm_x86_ops->interrupt_allowed(vcpu);
7169 }
7170
7171 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
7172 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
7173 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
7174 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
7175 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
7176 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
7177 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
7178 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
7179 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
7180 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
7181 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
7182 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);